[Discuss-gnuradio] multi usrp and pin io15

2011-03-21 Thread Przemyslaw Dmochowski
Hi, I understand that multiple USRP's are synchronized thru the master clock. But why do I need to connect together pin io15 on all boards? What does it do? Przemek ___ Discuss-gnuradio mailing list Discuss-gnuradio@gnu.org

Re: [Discuss-gnuradio] lowest power of the signal that LFRX can capture

2011-02-15 Thread Przemyslaw Dmochowski
Hi, Look at the schematic of LFRX and change the resistors in the feedback to get 20dB of gain more. Your bandwidth will be limited to about 15MHz but LFRX will be still usable in the full bandwidth, or you can set lower gain to get more bandwidth if needed. With my LFRX set to 20dB of gain I

RE: [Discuss-gnuradio] USRP1, FPGA and ADC clock

2011-02-14 Thread Przemyslaw Dmochowski
will be able to get my FPGA code to get working. Przemek -Original Message- From: Matt Ettus [mailto:m...@ettus.com] Sent: 11 February 2011 19:13 To: Przemyslaw Dmochowski Cc: discuss-gnuradio@gnu.org Subject: Re: [Discuss-gnuradio] USRP1, FPGA and ADC clock The FPGA and ADC are run off

[Discuss-gnuradio] USRP1, FPGA and ADC clock

2011-02-10 Thread Przemyslaw Dmochowski
Hi, I was wonder how the RX and TX data from/to ADC is read by Altera FPGA. I see from the schematics that FPGA and ADC take the clock from the same output of AD9513. From Ad9862 I read that the ADC data is latched using CLKOUT1, but this output is not connected to FPGA, so at which moment is the