You could only do that by modifying the FPGA. It would be a very minor
mod, though. Hook up the undecimated ADC values to where the output of the
decimators go, and leave everything else intact. Then just set the
decimators as normal and you will get the rate you request.
Matt
On Tue, Feb
Thanks,
I did manage to sample two real channels at 25 MHz! I set the NCO to 0 and
the mux to A:AB. I don't know why I didn't think of this trick earlier.
Now the real part is channel 0 and and imaginary part channel 1. I will
next try to do the fpga mod. Can you point me to the correct file in
Is there any way to bypass the CIC and the HBF on the USRP N200 to just
stream decimated (no integration) real samples off the 100 MHz ADC? I'd
like to eg., record every 25th sample arriving on the ADC. I'd like to
avoid compiling my own fpga is necessary.
Is there any configuration of
