On Tue, Mar 06, 2007 at 01:30:49PM +0100, Davide Anastasia wrote: > Il giorno dom, 04/03/2007 alle 22.55 -0800, Peter Monta ha scritto: > > > > > > The test bench would be nice. > > > > > > > Attached. > > I tried this test bench, but I guess it doesn't work. Infact, I test the > bit_pack module obtaining a strange output file like the attached one. > > Any suggestion from the list and/or Verilog Guru? :) > > I use iverilog on my Ubuntu 6.06 workstation. > > Regards, > -- > Davide Anastasia > > web: http://www.davideanastasia.com/ > email: [EMAIL PROTECTED]
Davide, and everyone else, Do not post large messages to the list. Davide, your message contained 1.3MB of basically content free junk, and given our 800 members, has generated over 1GB of traffic on the FSF T1, saturating it for over an hour. As a result, there's now a hard cap of 40KB on list postings. If you've got big stuff to share, put it somewhere accessible and then include a link in your posting. Eric _______________________________________________ Discuss-gnuradio mailing list Discuss-gnuradio@gnu.org http://lists.gnu.org/mailman/listinfo/discuss-gnuradio
