On Mon, Mar 5, 2012 at 9:26 AM, David Knox ingangout.ci...@ncf.ca wrote:
I just don't want to loose all the flexibility of software by moving the
critical but interesting things to hardware.
(* But of course, it all depends upon your goals. *)
George (and others),
I just don't want to loose all the flexibility of software by moving the
critical but interesting things to hardware.
(* But of course, it all depends upon your goals. *)
George (and others),
I think that the above statement is the basic
issue here and seems to
George,
On 03/04/2012 12:51 AM, George Nychis wrote:
Hi all,
I'm going to be hacking carrier sense in to the FPGA on the USRP2 very
soon. Basically, taking what I did with the in-band project from the
USRP1 with carrier sense, and moving it forward to USRP2.
The idea is, just like you
George,
I do think we need something like what you have suggested but I am still
a bit puzzled about the right way of implementing it.
Best regards,
Andre
I think a more fundamental issue is that carrier sense isn't actually
defined in any kind of general way. Certainly for *some* types of
I totally like and support your idea and would love to help realizing
it. Using the timestamp logic inside UHD as a reference is a great idea
that also came to my mind a while ago.
There are a few things from the architecture point of view though that
need to be discussed. Let's take a CSMA
Definitely, there are MACs whose form of carrier sense is detecting
preamble rather than detecting energy. In my same piece of work, we
put a matched filter in the FPGA and the host specifies the
coefficients of the match filter, then you gate on that. But, I don't
think it's unreasonable
On Sun, Mar 4, 2012 at 10:01 AM, Marcus D. Leech mle...@ripnet.com wrote:
George,
I do think we need something like what you have suggested but I am still
a bit puzzled about the right way of implementing it.
Best regards,
Andre
I think a more fundamental issue is that carrier sense
On 03/04/2012 04:01 PM, Marcus D. Leech wrote:
George,
I do think we need something like what you have suggested but I am still
a bit puzzled about the right way of implementing it.
Best regards,
Andre
I think a more fundamental issue is that carrier sense isn't actually
defined in any
On 03/04/2012 04:10 PM, George Nychis wrote:
I totally like and support your idea and would love to help realizing
it. Using the timestamp logic inside UHD as a reference is a great idea
that also came to my mind a while ago.
There are a few things from the architecture point
In the amateur radio world, AX.25 packet radio terminal node
controllers supported KISS mode, which left the CSMA and HDLC framing
in the TNC but offloaded the state-machine for connection management to
the host CPU stack.
KISS merely provided a way to forward the frame metadata and payload
Let me put it this way... I'm going to build it because I need it ;) But
what I'm asking/hoping for is for it to be useful beyond just me and
actually have a lifespan beyond my immediate use of it. So, I'd like to
get some feedback on how others might like to see it tied in to UHD, or the
type
Hi all,
I'm going to be hacking carrier sense in to the FPGA on the USRP2 very
soon. Basically, taking what I did with the in-band project from the
USRP1 with carrier sense, and moving it forward to USRP2.
The idea is, just like you can set a timestamp to gate a packet on its
way out: only
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