On Thu, Jan 14, 2010 at 10:52, Yan Nie wrote:
> I'm trying build my own fpga bitstream by modifying usrp_sounder project.
> I've saveral questions on the module master_control.
The master_control module is actually a common file with the standard
build, not specific to the usrp_sounder image.
>
Hi,
I'm trying build my own fpga bitstream by modifying usrp_sounder project. I've
saveral questions on the module master_control.
what store in reg_0, reg_1, reg_2, and reg3?
what assign to io_0 through io_3?
Can I monitor the signal from io_tx pins in daughter board by oscilloscope?
What th
