*Hi Partners,* * *
*Good Morning, hope you are doing good. Please find the below requirement and let me know if you have any consultants available.* *Please do send me your consultants resume with contact, availability, current location and expected rate.* * * *PLEASE SEND RESUMES TO **sat...@e-zencomp.com** only …..* Job Title: Verification Engineers Location : *Austin, TX* *Duration: 6 Months +* *Start Date: ASAP* *Skills: **ASIC** / FPGA Verification using OVM or VMM. Extensive Hands-on experience in System Verilog and Verilog. Verification experience in PCIe, HDMI, HD-SDI, Image Processing Pipeline, DDR3C, H.264, XAUI, J2K Decoder etc. logic block is preferrable. Cadence NC-Sim tool exposure is highly desirable.* -- Thanks & Regards, *V Satyam Reddy * EZEN Computer Services Inc, “Leading by Innovative Thoughts" 5 Independence Way,Ste#300, Princeton, NJ 08540 Tel : 609-945-3178 Fax: 609-452-5613 sat...@e-zencomp.com || www.e-zencomp.com ****Partner to PTC Abortext Products* Note: We respect your on-line privacy. This is not an unsolicited mail. Under Bill 1618 Title III passed by the 105th US Congress this mail cannot be considered Spam as long as we include contact information and a method to be removed from our mailing list. If you are not interested in receiving our e-mails then please reply with "REMOVE" in the Subject line. I am sorry for the inconvenience caused to you". -- You received this message because you are subscribed to the Google Groups "Dot Net Discussions" group. To post to this group, send email to dot-net-discussi...@googlegroups.com. To unsubscribe from this group, send email to dot-net-discussions+unsubscr...@googlegroups.com. For more options, visit this group at http://groups.google.com/group/dot-net-discussions?hl=en.
