This enables writeback for the CP read pointer and
scratch regs on the remaining radeon asics.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/r100.c| 97 +-
drivers/gpu/drm/radeon/r300.c| 15 +++--
drivers/gpu/drm/radeon/r420.c
When writeback is enabled, the GPU shadows writes to certain
registers into a buffer in memory. The driver can then read
the values from the shadow rather than reading back from the
register. Writeback can be disabled by setting the no_wb
module param to 0.
On r6xx/r7xx/evergreen, the following
Move common code to init function.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/r600.c | 14 +-
drivers/gpu/drm/radeon/r600_blit_kms.c | 16 ++--
drivers/gpu/drm/radeon/rv770.c | 14 +-
3 files changed, 16 insertions(+), 28
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/drm_crtc_helper.c | 10 +-
1 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/drm_crtc_helper.c
b/drivers/gpu/drm/drm_crtc_helper.c
index 11fe9c8..7b1eb2f 100644
--- a/drivers/gpu/drm/drm_crtc_helper.c
+++
https://bugs.freedesktop.org/show_bug.cgi?id=29363
Pavel Ondra?ka changed:
What|Removed |Added
Attachment #37649|application/octet-stream|application/x-bzip2
mime
https://bugs.freedesktop.org/show_bug.cgi?id=29363
--- Comment #10 from Pavel Ondra?ka 2010-08-06 12:25:51
PDT ---
Created an attachment (id=37650)
--> (https://bugs.freedesktop.org/attachment.cgi?id=37650)
screenshot
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https://bugs.freedesktop.org/show_bug.cgi?id=29363
--- Comment #9 from Pavel Ondra?ka 2010-08-06 12:24:15
PDT ---
Created an attachment (id=37649)
--> (https://bugs.freedesktop.org/attachment.cgi?id=37649)
output with patch, RADEON_DEBUG=vp
With your patch some units and buildings are being
https://bugs.freedesktop.org/show_bug.cgi?id=28517
--- Comment #10 from Sven Arvidsson 2010-08-06 11:42:49 PDT ---
Created an attachment (id=37647)
--> (https://bugs.freedesktop.org/attachment.cgi?id=37647)
RADEON_DEBUG=vp log with patch from 29363
(In reply to comment #9)
> This patch:
https://bugs.freedesktop.org/show_bug.cgi?id=28600
Chris Wilson changed:
What|Removed |Added
Component|DRM/Intel |DRM/Radeon
AssignedTo|jbarnes at
https://bugs.freedesktop.org/show_bug.cgi?id=28517
--- Comment #9 from Tom Stellard 2010-08-06 11:27:49
PDT ---
This patch: https://bugs.freedesktop.org/attachment.cgi?id=37644 from bug 29363
should help with this bug too.
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Tom Stellard changed:
What|Removed |Added
Attachment #37619|0 |1
is obsolete|
On 08/05/2010 11:13 AM, Shuang He wrote:
> Could you help report a bug for this issue by following
> http://intellinuxgraphics.org/how_to_report_bug.html
>
I have the same issue on a GM45 and Thomas's hack works in fixing it. It
is still present in 2.6.35.
Regards,
David.
https://bugs.freedesktop.org/show_bug.cgi?id=28955
--- Comment #10 from Droste 2010-08-06 08:37:29 PDT ---
I tried it and it doesn't solve the problem.
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You are the
https://bugs.freedesktop.org/show_bug.cgi?id=29363
--- Comment #7 from Pavel Ondra?ka 2010-08-06 08:03:55
PDT ---
(In reply to comment #6)
> Created an attachment (id=37619)
View: https://bugs.freedesktop.org/attachment.cgi?id=37619
Review: https://bugs.freedesktop.org/review?bug=29363=37619
https://bugs.freedesktop.org/show_bug.cgi?id=28517
--- Comment #8 from Sven Arvidsson 2010-08-06 03:33:54 PDT ---
Created an attachment (id=37624)
--> (https://bugs.freedesktop.org/attachment.cgi?id=37624)
RADEON_DEBUG=vp log
(In reply to comment #7)
> Can you try again with the latest git
- buffer offsets in the base regs are 256b aligned so
shift properly when comparing, fixed by Andre Maasikas
- mipmap size was calculated wrong when nlevel=0
- texture bo offsets were used after the bo base address was added
- vertex resource size register is size - 1, not size
Signed-off-by:
https://bugs.freedesktop.org/show_bug.cgi?id=29140
steckdenis at yahoo.fr changed:
What|Removed |Added
Summary|[rs690] Freeze at Xorg |[rs690] Freeze at Xorg
https://bugs.freedesktop.org/show_bug.cgi?id=29140
steckdenis at yahoo.fr changed:
What|Removed |Added
Product|xorg|DRI
Version|git
radeontool patched with attachement 34810
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--- You are receiving this mail because: ---
You are the assignee for the bug.
HPD pins are reversed
Fixes:
https://bugs.freedesktop.org/show_bug.cgi?id=29387
Signed-off-by: Alex Deucher
Cc: stable at kernel.org
---
drivers/gpu/drm/radeon/radeon_atombios.c | 14 --
1 files changed, 12 insertions(+), 2 deletions(-)
diff --git
https://bugs.freedesktop.org/show_bug.cgi?id=28517
--- Comment #7 from Tom Stellard 2010-08-05 23:37:28
PDT ---
Can you try again with the latest git code and post the output with
RADEON_DEBUG=vp
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--- You are
From: Ben Skeggs
Nouveau will need this on GeForce 8 and up to account for the GPU
reordering physical VRAM for some memory types.
Signed-off-by: Ben Skeggs
---
drivers/gpu/drm/nouveau/nouveau_bo.c | 12 ++-
drivers/gpu/drm/nouveau/nouveau_channel.c |6 +-
From: Ben Skeggs
Existing core code/drivers call drm_mm_put_block on ttm_mem_reg.mm_node
directly. Future patches will modify TTM behaviour in such a way that
ttm_mem_reg.mm_node doesn't necessarily belong to drm_mm.
Signed-off-by: Ben Skeggs
---
From: Ben Skeggs
In order to properly deal with GPU reordering of blocks in physical VRAM,
Nouveau needs to be able to have better control over VRAM allocations.
Currently nouveau is extremely wasteful and forces massive amounts of
padding/alignment to avoid buffer
https://bugs.freedesktop.org/show_bug.cgi?id=28517
--- Comment #7 from Tom Stellard tstel...@gmail.com 2010-08-05 23:37:28 PDT
---
Can you try again with the latest git code and post the output with
RADEON_DEBUG=vp
--
Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email
- buffer offsets in the base regs are 256b aligned so
shift properly when comparing, fixed by Andre Maasikas
- mipmap size was calculated wrong when nlevel=0
- texture bo offsets were used after the bo base address was added
- vertex resource size register is size - 1, not size
Signed-off-by:
https://bugs.freedesktop.org/show_bug.cgi?id=29140
steckde...@yahoo.fr changed:
What|Removed |Added
Product|xorg|DRI
Version|git
https://bugs.freedesktop.org/show_bug.cgi?id=29140
steckde...@yahoo.fr changed:
What|Removed |Added
Summary|[rs690] Freeze at Xorg |[rs690] Freeze at Xorg
Signed-off-by: Chris Wilson ch...@chris-wilson.co.uk
---
drivers/gpu/drm/drm_crtc_helper.c | 10 +-
1 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/drm_crtc_helper.c
b/drivers/gpu/drm/drm_crtc_helper.c
index 11fe9c8..7b1eb2f 100644
---
https://bugs.freedesktop.org/show_bug.cgi?id=29363
--- Comment #7 from Pavel Ondračka dra...@centrum.cz 2010-08-06 08:03:55 PDT
---
(In reply to comment #6)
Created an attachment (id=37619)
View: https://bugs.freedesktop.org/attachment.cgi?id=37619
Review:
https://bugs.freedesktop.org/show_bug.cgi?id=28955
--- Comment #10 from Droste tdro...@gmx.de 2010-08-06 08:37:29 PDT ---
I tried it and it doesn't solve the problem.
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--- You are receiving this mail because: ---
https://bugs.freedesktop.org/show_bug.cgi?id=29363
Tom Stellard tstel...@gmail.com changed:
What|Removed |Added
Attachment #37619|0 |1
is obsolete|
https://bugs.freedesktop.org/show_bug.cgi?id=28517
--- Comment #9 from Tom Stellard tstel...@gmail.com 2010-08-06 11:27:49 PDT
---
This patch: https://bugs.freedesktop.org/attachment.cgi?id=37644 from bug 29363
should help with this bug too.
--
Configure bugmail:
https://bugs.freedesktop.org/show_bug.cgi?id=28600
Chris Wilson ch...@chris-wilson.co.uk changed:
What|Removed |Added
Component|DRM/Intel |DRM/Radeon
https://bugs.freedesktop.org/show_bug.cgi?id=29363
--- Comment #9 from Pavel Ondračka dra...@centrum.cz 2010-08-06 12:24:15 PDT
---
Created an attachment (id=37649)
-- (https://bugs.freedesktop.org/attachment.cgi?id=37649)
output with patch, RADEON_DEBUG=vp
With your patch some units and
Signed-off-by: Marek Olšák mar...@gmail.com
---
drivers/gpu/drm/radeon/radeon_kms.c | 24 +++-
1 files changed, 19 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon_kms.c
b/drivers/gpu/drm/radeon/radeon_kms.c
index ddcd3b1..0e5deea 100644
---
When writeback is enabled, the GPU shadows writes to certain
registers into a buffer in memory. The driver can then read
the values from the shadow rather than reading back from the
register. Writeback can be disabled by setting the no_wb
module param to 0.
On r6xx/r7xx/evergreen, the following
This enables writeback for the CP read pointer and
scratch regs on the remaining radeon asics.
Signed-off-by: Alex Deucher alexdeuc...@gmail.com
---
drivers/gpu/drm/radeon/r100.c| 97 +-
drivers/gpu/drm/radeon/r300.c| 15 +++--
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