On Wed, Jul 13, 2011 at 5:41 PM, Benjamin Herrenschmidt
wrote:
> On Wed, 2011-07-13 at 10:42 -0400, Alex Deucher wrote:
>> On Wed, Jul 13, 2011 at 2:28 AM, Benjamin Herrenschmidt
>> wrote:
>> > The writeback ring pointer and IH ring pointer are read using le32_to_cpu
>> > so we do not want the
On Wed, Jul 13, 2011 at 5:42 PM, Benjamin Herrenschmidt
wrote:
> On Wed, 2011-07-13 at 10:48 -0400, Alex Deucher wrote:
>> On Wed, Jul 13, 2011 at 10:43 AM, Alex Deucher
>> wrote:
>> > On Wed, Jul 13, 2011 at 2:28 AM, Benjamin Herrenschmidt
>> > wrote:
>> >> We should have a read memory
On Wed, Jul 13, 2011 at 5:40 PM, Benjamin Herrenschmidt
wrote:
> On Wed, 2011-07-13 at 10:38 -0400, Alex Deucher wrote:
>
>> > ? ? ? ? ? ? ? ?case 6:
>> > - ? ? ? ? ? ? ? ? ? ? ? args.v6.ulCrtcPclkFreq.ucCRTC = crtc_id;
>> > - ? ? ? ? ? ? ? ? ? ? ? args.v6.ulCrtcPclkFreq.ulPixelClock =
>> >
2011/7/13 Michel D?nzer :
> From: Michel D?nzer
>
> Use the fence of the new frontbuffer, if any.
>
> Generating a new fence could cause us to wait for completely unrelated
> rendering to finish before performing the flip.
>
> Signed-off-by: Michel D?nzer
Reviewed-by: Alex Deucher
> ---
>
>
Include the device id in the bus-id to give userspace a way to open
the correct "cardN" when there are multiple device instances.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/drm_platform.c |5 +++--
1 files changed, 3 insertions(+), 2 deletions(-)
diff --git
On Wed, Jul 13, 2011 at 01:51:42PM -0700, Ben Widawsky wrote:
>
>
> Version 2 of the patch series is pretty much the same as version 1. 2 of the
> patches have already been picked up by the kernel and mesa so they are
> gone.
>
> The only major change is in mesa where I no longer load a binary
On Wed, 13 Jul 2011 13:51:43 -0700, Ben Widawsky wrote:
>
> Signed-off-by: Ben Widawsky
> ---
> intel/Makefile.am |3 ++-
> intel/intel_debug.h | 44
> 2 files changed, 46 insertions(+), 1 deletions(-)
>
> diff --git a/intel/Makefile.am
art --
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On Wed, Jul 13, 2011 at 09:40:31AM +0100, Chris Wilson wrote:
> On Wed, 13 Jul 2011 17:19:22 +0900, KOSAKI Motohiro jp.fujitsu.com> wrote:
> > (2011/07/13 16:41), Chris Wilson wrote:
> > > On Wed, 13 Jul 2011 09:19:24 +0900, KOSAKI Motohiro > > jp.fujitsu.com> wrote:
> > >> (2011/07/12 19:06),
On Wed, 13 Jul 2011 13:09:28 -0700, "Keith Packard"
wrote:
Non-text part: multipart/signed
>
> We've tried several times to make this machine 'just work', but every
> patch that does causes many other machines to fail. This adds a quirk
> which special cases this hardware and forces ssc to be
>
On Wed, Jul 13, 2011 at 05:19:22PM +0900, KOSAKI Motohiro wrote:
> (2011/07/13 16:41), Chris Wilson wrote:
> >> (snip)
> >> while (total_scan >= SHRINK_BATCH) {
> >> long this_scan = SHRINK_BATCH;
> >> int shrink_ret;
> >>
On 07/12, Dave Airlie wrote:
>
> On Tue, Jul 12, 2011 at 7:15 PM, Oleg Nesterov wrote:
> > Hello.
> >
> > I tried many times to ask about the supposed behaviour of
> > block_all_signals() in drm, but it seems nobody can answer.
>
> Its not hard to explain, basically there exists hardware that you
.
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(2011/07/13 16:41), Chris Wilson wrote:
> On Wed, 13 Jul 2011 09:19:24 +0900, KOSAKI Motohiro jp.fujitsu.com> wrote:
>> (2011/07/12 19:06), Chris Wilson wrote:
>>> On Tue, 12 Jul 2011 18:36:50 +0900, KOSAKI Motohiro >> jp.fujitsu.com> wrote:
Hi,
sorry for the delay.
> On
From: Michel D?nzer
Signed-off-by: Michel D?nzer
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/radeon/radeon_display.c |9 ++---
1 files changed, 2 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon_display.c
From: Michel D?nzer
Use the fence of the new frontbuffer, if any.
Generating a new fence could cause us to wait for completely unrelated
rendering to finish before performing the flip.
Signed-off-by: Michel D?nzer
---
v2:
* Rebase against drm-core-next.
* Leave
(Note that this is duplicated under various other names such
as R600_BUF_SWAP_32BIT etc...). At least now all the definitions
agree.
Signed-off-by: Benjamin Herrenschmidt
---
(resent adding dri-devel to the CC list to hit patchwork)
drivers/gpu/drm/radeon/radeon_reg.h |2 +-
1 files
When not using MSIs, there is no guarantee that DMA from the device
has been fully flushed to point where it's visible to the CPU when
taking an interrupt. To get this guarantee, we need to perform an
MMIO read from the device, which will flush all outstanding DMAs
from bridges between the device
We should have a read memory barrier between reading the WPTR from
memory and reading ring entries based on that value (ie, we need to
ensure both loads are done in order by the CPU).
It could be argued that the MMIO reads in r600_ack_irq() might be
enough to get that barrier but I prefer keeping
The writeback ring pointer and IH ring pointer are read using le32_to_cpu
so we do not want the chip to byteswap them on big-endian.
We still want to byteswap the ring itself and the IBs, so we don't touch
that but we remove setting of the byteswap bits in CP_RB_RPTR_ADDR and
IH_CNTL.
In
v6 of the structure was programmed incorrectly:
args.v6.ulCrtcPclkFreq.ulPixelClock = cpu_to_le32(clock / 10);
ulPixelClock is a 24-bit bitfield. This statement would thus
do a 32-bit swap of (clock / 10) and drop the top 8 bits which
are ... the LSB. Not what we want. Instead use masks &
Just defining rdev->rmmio properly in the first place should do
the trick. In some cases, the cast were also complete dups as
the original variable was already of the right type.
Signed-off-by: Benjamin Herrenschmidt
---
(resent adding dri-devel to the CC list to hit patchwork)
https://bugs.freedesktop.org/show_bug.cgi?id=39202
--- Comment #5 from Siganderson 2011-07-13 15:27:24 PDT
---
Created an attachment (id=49063)
--> (https://bugs.freedesktop.org/attachment.cgi?id=49063)
dmesg
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---
https://bugs.freedesktop.org/show_bug.cgi?id=39202
--- Comment #4 from Siganderson 2011-07-13 15:26:57 PDT
---
Created an attachment (id=49062)
--> (https://bugs.freedesktop.org/attachment.cgi?id=49062)
xorg conf
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https://bugs.freedesktop.org/show_bug.cgi?id=39202
--- Comment #3 from Siganderson 2011-07-13 15:26:34 PDT
---
Created an attachment (id=49061)
--> (https://bugs.freedesktop.org/attachment.cgi?id=49061)
xorg log
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Signed-off-by: Ben Widawsky
---
intel/Makefile.am |3 ++-
intel/intel_debug.h | 44
2 files changed, 46 insertions(+), 1 deletions(-)
diff --git a/intel/Makefile.am b/intel/Makefile.am
index b6a9014..7a44aaf 100644
--- a/intel/Makefile.am
Version 2 of the patch series is pretty much the same as version 1. 2 of the
patches have already been picked up by the kernel and mesa so they are
gone.
The only major change is in mesa where I no longer load a binary blob
from an environment variable, but instead compile the bytes directly in
https://bugs.freedesktop.org/show_bug.cgi?id=39202
--- Comment #2 from Alex Deucher 2011-07-13 13:22:55 PDT
---
Please attach your xorg log and config and dmesg output.
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ntel_init_quirks(struct drm_device *dev)
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keith.packard at intel.com
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https://bugs.freedesktop.org/show_bug.cgi?id=35988
--- Comment #9 from leonardo 2011-07-13 13:09:19 PDT ---
I have the same card on DELL Studio 15". I wouldn't say that power management
does not work. I'm using "profile" method with "low" setting. After about ~20
mins of uptime this is the
https://bugs.freedesktop.org/show_bug.cgi?id=39202
--- Comment #1 from Siganderson 2011-07-13 12:25:57 PDT
---
video card: ATI Radeon HD 5670 512 MB Ram
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You are the
https://bugs.freedesktop.org/show_bug.cgi?id=39202
Summary: KDE desktop effects with 3.0 rc6 kernel
Product: Mesa
Version: git
Platform: All
OS/Version: Linux (All)
Status: NEW
Severity: normal
Priority: medium
available
URL:
<http://lists.freedesktop.org/archives/dri-devel/attachments/20110713/2d5de019/attachment.pgp>
t;http://lists.freedesktop.org/archives/dri-devel/attachments/20110713/640c0dae/attachment.pgp>
On Wed, Jul 13, 2011 at 10:44 AM, Alex Deucher wrote:
> On Wed, Jul 13, 2011 at 2:28 AM, Benjamin Herrenschmidt
> wrote:
>> When not using MSIs, there is no guarantee that DMA from the device
>> has been fully flushed to point where it's visible to the CPU when
>> taking an interrupt. To get
On Wed, Jul 13, 2011 at 10:43 AM, Alex Deucher wrote:
> On Wed, Jul 13, 2011 at 2:28 AM, Benjamin Herrenschmidt
> wrote:
>> We should have a read memory barrier between reading the WPTR from
>> memory and reading ring entries based on that value (ie, we need to
>> ensure both loads are done in
On Wed, Jul 13, 2011 at 2:28 AM, Benjamin Herrenschmidt
wrote:
> (Note that this is duplicated under various other names such
> as R600_BUF_SWAP_32BIT etc...). At least now all the definitions
> agree.
>
> Signed-off-by: Benjamin Herrenschmidt
Reviewed-by: Alex Deucher
> ---
>
> (resent
On Wed, Jul 13, 2011 at 2:28 AM, Benjamin Herrenschmidt
wrote:
> When not using MSIs, there is no guarantee that DMA from the device
> has been fully flushed to point where it's visible to the CPU when
> taking an interrupt. To get this guarantee, we need to perform an
> MMIO read from the
On Wed, Jul 13, 2011 at 2:28 AM, Benjamin Herrenschmidt
wrote:
> We should have a read memory barrier between reading the WPTR from
> memory and reading ring entries based on that value (ie, we need to
> ensure both loads are done in order by the CPU).
>
> It could be argued that the MMIO reads
On Wed, Jul 13, 2011 at 2:28 AM, Benjamin Herrenschmidt
wrote:
> The writeback ring pointer and IH ring pointer are read using le32_to_cpu
> so we do not want the chip to byteswap them on big-endian.
>
> We still want to byteswap the ring itself and the IBs, so we don't touch
> that but we remove
On Wed, Jul 13, 2011 at 2:28 AM, Benjamin Herrenschmidt
wrote:
> v6 of the structure was programmed incorrectly:
>
> ?args.v6.ulCrtcPclkFreq.ulPixelClock = cpu_to_le32(clock / 10);
>
> ulPixelClock is a 24-bit bitfield. This statement would thus
> do a 32-bit swap of (clock / 10) and drop the top
On Wed, Jul 13, 2011 at 2:28 AM, Benjamin Herrenschmidt
wrote:
> Just defining rdev->rmmio properly in the first place should do
> the trick. In some cases, the cast were also complete dups as
> the original variable was already of the right type.
>
> Signed-off-by: Benjamin Herrenschmidt
On Mit, 2011-07-13 at 08:32 +0100, Dave Airlie wrote:
> 2011/7/12 Michel D?nzer :
> > From: Michel D?nzer
> >
> > Use the fence of the new frontbuffer, if any.
>
> What tree is this against, I can't apply it to drm-fixes or drm-core-next
> here.
I created it against 2.6.39.y. I'll respin
On Wed, 13 Jul 2011 17:19:22 +0900, KOSAKI Motohiro wrote:
> (2011/07/13 16:41), Chris Wilson wrote:
> > On Wed, 13 Jul 2011 09:19:24 +0900, KOSAKI Motohiro > jp.fujitsu.com> wrote:
> >> (2011/07/12 19:06), Chris Wilson wrote:
> >>> On Tue, 12 Jul 2011 18:36:50 +0900, KOSAKI Motohiro >>>
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(2011/07/12 19:06), Chris Wilson wrote:
> On Tue, 12 Jul 2011 18:36:50 +0900, KOSAKI Motohiro jp.fujitsu.com> wrote:
>> Hi,
>>
>> sorry for the delay.
>>
>>> On Wed, 29 Jun 2011 20:53:54 -0700, Keith Packard
>>> wrote:
On Fri, 24 Jun 2011 17:03:22 +0900, KOSAKI Motohiro >>> jp.fujitsu.com>
On Wed, 13 Jul 2011 09:19:24 +0900, KOSAKI Motohiro wrote:
> (2011/07/12 19:06), Chris Wilson wrote:
> > On Tue, 12 Jul 2011 18:36:50 +0900, KOSAKI Motohiro > jp.fujitsu.com> wrote:
> >> Hi,
> >>
> >> sorry for the delay.
> >>
> >>> On Wed, 29 Jun 2011 20:53:54 -0700, Keith Packard
> >>>
2011/7/12 Michel D?nzer :
> From: Michel D?nzer
>
> Use the fence of the new frontbuffer, if any.
What tree is this against, I can't apply it to drm-fixes or drm-core-next here.
Dave.
Hi Linus,
Minor set of fixes from Alex including one hotplug regression and one
intel AGP fix.
Dave.
The following changes since commit 620917de59eeb934b9f8cf35cc2d95c1ac8ed0fc:
Linux 3.0-rc7 (2011-07-11 16:51:52 -0700)
are available in the git repository at:
https://bugs.freedesktop.org/show_bug.cgi?id=39193
Summary: glCheckFramebufferStatusEXT segfaults in Gallium when
checking status on a framebuffer bound to a texture
that's bound to a pixmap
Product: Mesa
Version:
On Mit, 2011-07-13 at 08:32 +0100, Dave Airlie wrote:
2011/7/12 Michel Dänzer mic...@daenzer.net:
From: Michel Dänzer michel.daen...@amd.com
Use the fence of the new frontbuffer, if any.
What tree is this against, I can't apply it to drm-fixes or drm-core-next
here.
I created it
Hi Linus,
Minor set of fixes from Alex including one hotplug regression and one
intel AGP fix.
Dave.
The following changes since commit 620917de59eeb934b9f8cf35cc2d95c1ac8ed0fc:
Linux 3.0-rc7 (2011-07-11 16:51:52 -0700)
are available in the git repository at:
On Wed, 13 Jul 2011 17:19:22 +0900, KOSAKI Motohiro
kosaki.motoh...@jp.fujitsu.com wrote:
(2011/07/13 16:41), Chris Wilson wrote:
On Wed, 13 Jul 2011 09:19:24 +0900, KOSAKI Motohiro
kosaki.motoh...@jp.fujitsu.com wrote:
(2011/07/12 19:06), Chris Wilson wrote:
On Tue, 12 Jul 2011
On Wed, 13 Jul 2011 09:19:24 +0900, KOSAKI Motohiro
kosaki.motoh...@jp.fujitsu.com wrote:
(2011/07/12 19:06), Chris Wilson wrote:
On Tue, 12 Jul 2011 18:36:50 +0900, KOSAKI Motohiro
kosaki.motoh...@jp.fujitsu.com wrote:
Hi,
sorry for the delay.
On Wed, 29 Jun 2011 20:53:54 -0700,
Hello.
I tried many times to ask about the supposed behaviour of
block_all_signals() in drm, but it seems nobody can answer.
So I am going to send the patch which simply removes
block_all_signals() and friends. There are numeruous problems
with this interace, I can't even enumerate them. But I
(2011/07/12 19:06), Chris Wilson wrote:
On Tue, 12 Jul 2011 18:36:50 +0900, KOSAKI Motohiro
kosaki.motoh...@jp.fujitsu.com wrote:
Hi,
sorry for the delay.
On Wed, 29 Jun 2011 20:53:54 -0700, Keith Packard kei...@keithp.com wrote:
On Fri, 24 Jun 2011 17:03:22 +0900, KOSAKI Motohiro
(2011/07/13 16:41), Chris Wilson wrote:
On Wed, 13 Jul 2011 09:19:24 +0900, KOSAKI Motohiro
kosaki.motoh...@jp.fujitsu.com wrote:
(2011/07/12 19:06), Chris Wilson wrote:
On Tue, 12 Jul 2011 18:36:50 +0900, KOSAKI Motohiro
kosaki.motoh...@jp.fujitsu.com wrote:
Hi,
sorry for the delay.
On Wed, Jul 13, 2011 at 2:28 AM, Benjamin Herrenschmidt
b...@kernel.crashing.org wrote:
Just defining rdev-rmmio properly in the first place should do
the trick. In some cases, the cast were also complete dups as
the original variable was already of the right type.
Signed-off-by: Benjamin
On Wed, Jul 13, 2011 at 2:28 AM, Benjamin Herrenschmidt
b...@kernel.crashing.org wrote:
v6 of the structure was programmed incorrectly:
args.v6.ulCrtcPclkFreq.ulPixelClock = cpu_to_le32(clock / 10);
ulPixelClock is a 24-bit bitfield. This statement would thus
do a 32-bit swap of (clock /
https://bugs.freedesktop.org/show_bug.cgi?id=39193
Summary: glCheckFramebufferStatusEXT segfaults in Gallium when
checking status on a framebuffer bound to a texture
that's bound to a pixmap
Product: Mesa
Version:
2011/7/12 Michel Dänzer mic...@daenzer.net:
From: Michel Dänzer michel.daen...@amd.com
Use the fence of the new frontbuffer, if any.
What tree is this against, I can't apply it to drm-fixes or drm-core-next here.
Dave.
___
dri-devel mailing list
On Wed, Jul 13, 2011 at 2:28 AM, Benjamin Herrenschmidt
b...@kernel.crashing.org wrote:
The writeback ring pointer and IH ring pointer are read using le32_to_cpu
so we do not want the chip to byteswap them on big-endian.
We still want to byteswap the ring itself and the IBs, so we don't touch
On Wed, Jul 13, 2011 at 2:28 AM, Benjamin Herrenschmidt
b...@kernel.crashing.org wrote:
We should have a read memory barrier between reading the WPTR from
memory and reading ring entries based on that value (ie, we need to
ensure both loads are done in order by the CPU).
It could be argued
On Wed, Jul 13, 2011 at 2:28 AM, Benjamin Herrenschmidt
b...@kernel.crashing.org wrote:
When not using MSIs, there is no guarantee that DMA from the device
has been fully flushed to point where it's visible to the CPU when
taking an interrupt. To get this guarantee, we need to perform an
MMIO
On Wed, Jul 13, 2011 at 2:28 AM, Benjamin Herrenschmidt
b...@kernel.crashing.org wrote:
(Note that this is duplicated under various other names such
as R600_BUF_SWAP_32BIT etc...). At least now all the definitions
agree.
Signed-off-by: Benjamin Herrenschmidt b...@kernel.crashing.org
On Wed, Jul 13, 2011 at 10:43 AM, Alex Deucher alexdeuc...@gmail.com wrote:
On Wed, Jul 13, 2011 at 2:28 AM, Benjamin Herrenschmidt
b...@kernel.crashing.org wrote:
We should have a read memory barrier between reading the WPTR from
memory and reading ring entries based on that value (ie, we
On Wed, Jul 13, 2011 at 10:44 AM, Alex Deucher alexdeuc...@gmail.com wrote:
On Wed, Jul 13, 2011 at 2:28 AM, Benjamin Herrenschmidt
b...@kernel.crashing.org wrote:
When not using MSIs, there is no guarantee that DMA from the device
has been fully flushed to point where it's visible to the CPU
(Note that this is duplicated under various other names such
as R600_BUF_SWAP_32BIT etc...). At least now all the definitions
agree.
Signed-off-by: Benjamin Herrenschmidt b...@kernel.crashing.org
---
(resent adding dri-devel to the CC list to hit patchwork)
drivers/gpu/drm/radeon/radeon_reg.h
We should have a read memory barrier between reading the WPTR from
memory and reading ring entries based on that value (ie, we need to
ensure both loads are done in order by the CPU).
It could be argued that the MMIO reads in r600_ack_irq() might be
enough to get that barrier but I prefer keeping
When not using MSIs, there is no guarantee that DMA from the device
has been fully flushed to point where it's visible to the CPU when
taking an interrupt. To get this guarantee, we need to perform an
MMIO read from the device, which will flush all outstanding DMAs
from bridges between the device
Just defining rdev-rmmio properly in the first place should do
the trick. In some cases, the cast were also complete dups as
the original variable was already of the right type.
Signed-off-by: Benjamin Herrenschmidt b...@kernel.crashing.org
---
(resent adding dri-devel to the CC list to hit
The writeback ring pointer and IH ring pointer are read using le32_to_cpu
so we do not want the chip to byteswap them on big-endian.
We still want to byteswap the ring itself and the IBs, so we don't touch
that but we remove setting of the byteswap bits in CP_RB_RPTR_ADDR and
IH_CNTL.
In
From: Michel Dänzer michel.daen...@amd.com
Signed-off-by: Michel Dänzer michel.daen...@amd.com
Reviewed-by: Alex Deucher alexander.deuc...@amd.com
---
drivers/gpu/drm/radeon/radeon_display.c |9 ++---
1 files changed, 2 insertions(+), 7 deletions(-)
diff --git
From: Michel Dänzer michel.daen...@amd.com
Use the fence of the new frontbuffer, if any.
Generating a new fence could cause us to wait for completely unrelated
rendering to finish before performing the flip.
Signed-off-by: Michel Dänzer michel.daen...@amd.com
---
v2:
* Rebase against
On Wed, Jul 13, 2011 at 09:39:41AM -0700, Keith Packard wrote:
Here's most of the patches I'm hoping to land after 3.0:
Is this one intentionally not in or did it slip through?
drm/i915: gracefully bail out when init_clock_gating-pointer is not set [1]
[1]
https://bugs.freedesktop.org/show_bug.cgi?id=39202
Summary: KDE desktop effects with 3.0 rc6 kernel
Product: Mesa
Version: git
Platform: All
OS/Version: Linux (All)
Status: NEW
Severity: normal
Priority: medium
On Wed, 13 Jul 2011 19:22:14 +0200, Wolfram Sang w.s...@pengutronix.de wrote:
Is this one intentionally not in or did it slip through?
I thought I had replied to that -- it doesn't apply to either -fixes or
-next at this point. I can try to fix it, but I'd prefer it if you'd
figure out how
https://bugs.freedesktop.org/show_bug.cgi?id=39202
--- Comment #1 from Siganderson dj_...@webmail.it 2011-07-13 12:25:57 PDT ---
video card: ATI Radeon HD 5670 512 MB Ram
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On Tue, 5 Jul 2011 09:55:34 +0100, Chris Wilson ch...@chris-wilson.co.uk
wrote:
Alan Cox reported a missing check on the kmalloc return value for the
allocation of a temporary mode used for searching for the LVDS downlock
frequency. This allocation is roughly 200 bytes, a little too large to
Sorry for not pinging you when I didn't hear back.
No problem! Will fix it.
Thanks,
Wolfram
--
Pengutronix e.K. | Wolfram Sang|
Industrial Linux Solutions | http://www.pengutronix.de/ |
signature.asc
Description: Digital
https://bugs.freedesktop.org/show_bug.cgi?id=35988
--- Comment #9 from leonardo gene...@bsod.eu 2011-07-13 13:09:19 PDT ---
I have the same card on DELL Studio 15. I wouldn't say that power management
does not work. I'm using profile method with low setting. After about ~20
mins of uptime this is
We've tried several times to make this machine 'just work', but every
patch that does causes many other machines to fail. This adds a quirk
which special cases this hardware and forces ssc to be
disabled. There's no way to override this from the command line; that
would be a significantly more
Here's most of the patches I'm hoping to land after 3.0:
* FBC cleanups from Chris Wilson. Fixes 'missing' CPU writes to the
front buffer. We've enabled FBC by default, if we find regressions
again, we'll turn it off before the release.
* DP and HDMI support for formats other than 8bpc
https://bugs.freedesktop.org/show_bug.cgi?id=39202
--- Comment #2 from Alex Deucher ag...@yahoo.com 2011-07-13 13:22:55 PDT ---
Please attach your xorg log and config and dmesg output.
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Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
intel/Makefile.am |3 ++-
intel/intel_debug.h | 44
2 files changed, 46 insertions(+), 1 deletions(-)
diff --git a/intel/Makefile.am b/intel/Makefile.am
index b6a9014..7a44aaf 100644
---
Version 2 of the patch series is pretty much the same as version 1. 2 of the
patches have already been picked up by the kernel and mesa so they are
gone.
The only major change is in mesa where I no longer load a binary blob
from an environment variable, but instead compile the bytes directly in
On Wed, 13 Jul 2011 13:51:43 -0700, Ben Widawsky b...@bwidawsk.net wrote:
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
intel/Makefile.am |3 ++-
intel/intel_debug.h | 44
2 files changed, 46 insertions(+), 1 deletions(-)
diff
On Wed, 2011-07-13 at 10:38 -0400, Alex Deucher wrote:
case 6:
- args.v6.ulCrtcPclkFreq.ucCRTC = crtc_id;
- args.v6.ulCrtcPclkFreq.ulPixelClock =
cpu_to_le32(clock / 10);
+ args.v6.ulDispEngClkFreq =
On Wed, 2011-07-13 at 10:42 -0400, Alex Deucher wrote:
On Wed, Jul 13, 2011 at 2:28 AM, Benjamin Herrenschmidt
b...@kernel.crashing.org wrote:
The writeback ring pointer and IH ring pointer are read using le32_to_cpu
so we do not want the chip to byteswap them on big-endian.
We still
On Wed, 2011-07-13 at 10:48 -0400, Alex Deucher wrote:
On Wed, Jul 13, 2011 at 10:43 AM, Alex Deucher alexdeuc...@gmail.com wrote:
On Wed, Jul 13, 2011 at 2:28 AM, Benjamin Herrenschmidt
b...@kernel.crashing.org wrote:
We should have a read memory barrier between reading the WPTR from
On Wed, Jul 13, 2011 at 01:51:42PM -0700, Ben Widawsky wrote:
Version 2 of the patch series is pretty much the same as version 1. 2 of the
patches have already been picked up by the kernel and mesa so they are
gone.
The only major change is in mesa where I no longer load a binary blob
https://bugs.freedesktop.org/show_bug.cgi?id=39202
--- Comment #3 from Siganderson dj_...@webmail.it 2011-07-13 15:26:34 PDT ---
Created an attachment (id=49061)
-- (https://bugs.freedesktop.org/attachment.cgi?id=49061)
xorg log
--
Configure bugmail:
https://bugs.freedesktop.org/show_bug.cgi?id=39202
--- Comment #4 from Siganderson dj_...@webmail.it 2011-07-13 15:26:57 PDT ---
Created an attachment (id=49062)
-- (https://bugs.freedesktop.org/attachment.cgi?id=49062)
xorg conf
--
Configure bugmail:
https://bugs.freedesktop.org/show_bug.cgi?id=39202
--- Comment #5 from Siganderson dj_...@webmail.it 2011-07-13 15:27:24 PDT ---
Created an attachment (id=49063)
-- (https://bugs.freedesktop.org/attachment.cgi?id=49063)
dmesg
--
Configure bugmail:
2011/7/13 Michel Dänzer mic...@daenzer.net:
From: Michel Dänzer michel.daen...@amd.com
Use the fence of the new frontbuffer, if any.
Generating a new fence could cause us to wait for completely unrelated
rendering to finish before performing the flip.
Signed-off-by: Michel Dänzer
On Wed, Jul 13, 2011 at 5:40 PM, Benjamin Herrenschmidt
b...@kernel.crashing.org wrote:
On Wed, 2011-07-13 at 10:38 -0400, Alex Deucher wrote:
case 6:
- args.v6.ulCrtcPclkFreq.ucCRTC = crtc_id;
- args.v6.ulCrtcPclkFreq.ulPixelClock
On Wed, Jul 13, 2011 at 5:41 PM, Benjamin Herrenschmidt
b...@kernel.crashing.org wrote:
On Wed, 2011-07-13 at 10:42 -0400, Alex Deucher wrote:
On Wed, Jul 13, 2011 at 2:28 AM, Benjamin Herrenschmidt
b...@kernel.crashing.org wrote:
The writeback ring pointer and IH ring pointer are read using
Include the device id in the bus-id to give userspace a way to open
the correct cardN when there are multiple device instances.
Signed-off-by: Rob Clark r...@ti.com
---
drivers/gpu/drm/drm_platform.c |5 +++--
1 files changed, 3 insertions(+), 2 deletions(-)
diff --git
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