st line of your message.
Thanks,
Paul
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On Tue, Jun 26, 2012 at 02:04:00PM -0700, Jesse Barnes wrote:
> On Tue, 26 Jun 2012 00:36:24 +0200
> Lekensteyn wrote:
>
> > This is rather a hack to fix brightness hotkeys on a Clevo laptop. CADL is
> > not
> > used anywhere in the driver code at the moment, but it could be used in
> > BIOS as
This patchset is about update of crtc and plane. The interface of crtc and
plane to control overlay is integrated internally. For this some code
fixings are added. Also this supports the exynos specific property for
crtc and plane.
Joonyoung Shim (11):
drm/exynos: fix point to call overlay_o
> On Tue, Jun 26, 2012 at 08:48:18PM -0600, Stephen Warren wrote:
> > On 06/26/2012 08:32 PM, Mark Zhang wrote:
> > >> On 06/26/2012 07:46 PM, Mark Zhang wrote:
> > > On Tue, 26 Jun 2012 12:55:13 +0200 Thierry Reding
> > > wrote:
> > >> ...
> > I'm not sure I understand how informatio
On Tue, Jun 26, 2012 at 08:48:18PM -0600, Stephen Warren wrote:
> On 06/26/2012 08:32 PM, Mark Zhang wrote:
> >> On 06/26/2012 07:46 PM, Mark Zhang wrote:
> > On Tue, 26 Jun 2012 12:55:13 +0200
> > Thierry Reding wrote:
> >> ...
> I'm not sure I understand how information about the ca
On Tue, Jun 26, 2012 at 04:48:14PM -0600, Stephen Warren wrote:
> On 06/26/2012 01:51 PM, Thierry Reding wrote:
> > On Tue, Jun 26, 2012 at 12:10:42PM -0600, Stephen Warren wrote:
> >> On 06/26/2012 04:55 AM, Thierry Reding wrote:
> >>> Hi,
> >>>
> >>> while I haven't got much time to work on the
Your patch missed signed-off-by and also please use text format.
Thanks,
Inki Dae
From: Cooper Yuan [mailto:coopery...@gmail.com]
Sent: Wednesday, June 27, 2012 4:11 AM
To: dri-devel@lists.freedesktop.org
Cc: inki@samsung.com
Subject: DRI: exynos: fix buffer pitch calculation
---
status = "okay";
>
> connector at 0 {
> nvidia,edid = /incbin/("tegra-medcom.edid");
> };
> };
> hdmi {
> status = "okay";
>
> connector at 0 {
> nvidia,ddc-i2c-bus = <&tegra_i2c1>;
> };
> };
> };
>
> Perhaps even completely omit the connector node, and put the properties
> directly within the rgb/hdmi node itself. After all the HDMI output
> really is the connector as far as Tegra goes.
Heh. I seem to remember you objecting to this in a previous series[0]
which is actually the reason that I moved them to the top-level in the
first place. =)
Thierry
[0]: http://www.spinics.net/lists/linux-tegra/msg05298.html
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ve part of a bus
abstraction (sync points and channels). This could all be implemented
using a library of functions instead of a bus-type midlayer, though. I
think we've also had that discussion before.
Thierry
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Name
o describe
something that's not reachable from the CPU. Yet it is defined in the
GIC.
Thierry
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;
> > I'll let you decide, as I don't have a strong opinion either way. I
> > guess whatever is the more common way wins.
>
> I'd certainly prefer all the nodes to use the full/absolute address.
> That way, the DT will exactly match the addresses in the documentation.
Okay, I'll leave the ranges property as it is now.
Thierry
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GE_ALIGN(args->pitch * args->height);
exynos_gem_obj = exynos_drm_gem_create(dev, args->flags, args->size);
--
1.7.0.4
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On 06/26/2012 08:32 PM, Mark Zhang wrote:
>> On 06/26/2012 07:46 PM, Mark Zhang wrote:
> On Tue, 26 Jun 2012 12:55:13 +0200
> Thierry Reding wrote:
>> ...
I'm not sure I understand how information about the carveout would be
obtained from the IOMMU API, though.
>>>
>>> I think th
On 06/26/2012 07:46 PM, Mark Zhang wrote:
>>> On Tue, 26 Jun 2012 12:55:13 +0200
>>> Thierry Reding wrote:
...
>> I'm not sure I understand how information about the carveout would be
>> obtained from the IOMMU API, though.
>
> I think that can be similar with current gart implementation. Define
Hey,
Due to inertia, I thought I would take a shot at implicit synchronization as
well.
I have just barely enough to make it work for nouveau to synchronize with itself
now using the cpu. Hopefully the general idea is correct but I feel the
implementation wrong.
There are 2 ways to get deadlocks
> On 06/26/2012 07:46 PM, Mark Zhang wrote:
> >>> On Tue, 26 Jun 2012 12:55:13 +0200
> >>> Thierry Reding wrote:
> ...
> >> I'm not sure I understand how information about the carveout would be
> >> obtained from the IOMMU API, though.
> >
> > I think that can be similar with current gart implemen
> -Original Message-
> From: Subash Patel [mailto:subas...@gmail.com]
> Sent: Tuesday, June 26, 2012 3:23 AM
> To: dri-devel@lists.freedesktop.org; linux-samsung-...@vger.kernel.org;
> linaro-mm-...@lists.linaro.org
> Cc: ol...@chromium.org; inki@samsung.com; airl...@redhat.com; Subas
> -Original Message-
> From: Subash Patel [mailto:subas...@gmail.com]
> Sent: Tuesday, June 26, 2012 3:23 AM
> To: dri-devel@lists.freedesktop.org; linux-samsung-...@vger.kernel.org;
> linaro-mm-...@lists.linaro.org
> Cc: ol...@chromium.org; inki@samsung.com; airl...@redhat.com; Subas
> > On Tue, 26 Jun 2012 12:55:13 +0200
> > Thierry Reding wrote:
> >
> > > > Old Signed by an unknown key
> > >
> > > Hi,
> > >
> > > while I haven't got much time to work on the actual code right now,
> > > I think it might still be useful if we could get the device tree
> > > binding to a point
On Wed, 27 Jun 2012 00:55:37 +0200 (CEST)
Jesper Juhl wrote:
> If we ever hit the default case in the switch statement we'll return
> from the function without freeing the memory we just allocated to
> 'intel_plane' (but that has not been used).
>
> This patch gets rid of the leak by freeing the
On Wed, 27 Jun 2012 00:55:37 +0200 (CEST)
Jesper Juhl wrote:
> If we ever hit the default case in the switch statement we'll return
> from the function without freeing the memory we just allocated to
> 'intel_plane' (but that has not been used).
>
> This patch gets rid of the leak by freeing the
From: Jerome Glisse
After unrecovered GPU lockup avoid any GPU activities to avoid
things like kernel segfault and alike to happen in any of the
path that assume hw is working.
cc: stable at vger.kernel.org
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/radeon/radeon_device.c |9 ---
On 26.06.2012 16:41, Thierry Reding wrote:
> On Tue, Jun 26, 2012 at 04:01:05PM +0300, Terje Bergstr?m wrote:
>> We also assign certain host1x common resources per device by convention,
>> f.ex. sync points, channels etc. We currently encode that information in
>> the device node (3D uses sync poi
On Tue, Jun 26, 2012 at 4:33 PM, Alex Deucher wrote:
> On Tue, Jun 26, 2012 at 10:50 AM, Dave Airlie wrote:
>> From: Dave Airlie
>>
>> PCI express gen2.0 can support 5GT link speeds, this add code to
>> decide if this can be used for the device. We currently disable
>> it for via/serverengines r
On 06/26/2012 01:51 PM, Thierry Reding wrote:
> On Tue, Jun 26, 2012 at 12:10:42PM -0600, Stephen Warren wrote:
>> On 06/26/2012 04:55 AM, Thierry Reding wrote:
>>> Hi,
>>>
>>> while I haven't got much time to work on the actual code right
>>> now, I think it might still be useful if we could get
On Tue, Jun 26, 2012 at 4:09 PM, Adam Jackson wrote:
> On Tue, 2012-06-26 at 15:50 +0100, Dave Airlie wrote:
>> From: Dave Airlie
>>
>> PCI express gen2.0 can support 5GT link speeds, this add code to
>> decide if this can be used for the device. We currently disable
>> it for via/serverengines r
Hi Thierry,
On Tue, 26 Jun 2012 12:55:13 +0200
Thierry Reding wrote:
> * PGP Signed by an unknown key
>
> Hi,
>
> while I haven't got much time to work on the actual code right now, I
> think it might still be useful if we could get the device tree binding
> to a point where everybody is happy
On 26.06.2012 13:55, Thierry Reding wrote:
> host1x {
> compatible = "nvidia,tegra20-host1x", "simple-bus";
> reg = <0x5000 0x00024000>;
> interrupts = <0 64 0x04 /* cop syncpt */
> 0 65 0x04 /* mpcore syncpt */
>
think that we need
> to refer to "gart" and "carveout" here in the end.
>
> http://lists.linuxfoundation.org/pipermail/iommu/2012-June/004266.html
Yes, if IOMMU or some layer above can provide the same information, then
that is certainly better than explicitly referencing it in the DT.
I'm not sure I understand how information about the carveout would be
obtained from the IOMMU API, though.
Thierry
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l call to of_platform_populate() since the
> > host1x node is also marked compatible with "simple-bus".
> >
> We should not rely on OF code doing the instantiation of the children,
> as expressed by Grant Likely. [1]
At the end of that email, Grant specifically mentions that using the
simple-bus is one option to instantiate children. Or to add the bus
compatible (nvidia,tegra20-host1x in our case) to the list of busses
when calling of_platform_populate().
However I think if we have a custom bus_type implementation for host1x
anyway, then it makes sense to instantiate the children from that
instead to allow for easier integration.
Thierry
> > An alternative would be to call of_platform_populate() from the host1x
> > driver. This has the advantage that it could integrate better with the
> > host1x bus implementation that Terje is working on, but it also needs
> > additional code to tear down the devices when the host1x driver is
> > unloaded because a module reload would try to create duplicate devices
> > otherwise.
> >
> [snip]
>
> [1]
> http://www.mail-archive.com/linuxppc-dev at lists.ozlabs.org/msg28044.html
>
> Thanks,
> Lucas
>
>
>
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If we ever hit the default case in the switch statement we'll return
from the function without freeing the memory we just allocated to
'intel_plane' (but that has not been used).
This patch gets rid of the leak by freeing the memory just before we
return.
Signed-off-by: Jesper Juhl
---
drivers/
From: Dave Airlie
This attempts to enable PCIE gen2 where possible, disabling
via radeon.pcie_gen2 in case of regression, so we can test it.
Signed-off-by: Dave Airlie
---
drivers/gpu/drm/radeon/evergreen.c |5 +
drivers/gpu/drm/radeon/r600.c |5 +
drivers/gpu/drm/radeon
From: Dave Airlie
This patch assumes SI is the same as NI wrt gen2 enabling, and just
calls the evergreen code.
Signed-off-by: Dave Airlie
---
drivers/gpu/drm/radeon/si.c |4 +++-
1 files changed, 3 insertions(+), 1 deletions(-)
diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/r
From: Dave Airlie
PCI express gen2.0 can support 5GT link speeds, this add code to
decide if this can be used for the device. We currently disable
it for via/serverengines root ports due to known issues.
Signed-off-by: Dave Airlie
---
drivers/gpu/drm/drm_pci.c | 37 ++
rveout property which might be a better replacement for the
> > "crippled" GART on Tegra20. Alternatively the CMA might work just as
> > well instead.
>
>
> We use carveout for Tegra2. Memory management is a big question mark
> still for tegradrm that I'm trying to find a solution for.
AIUI CMA is one particular implementation of the carveout concept, so I
think we should use it, or extend it if it doesn't suit us.
Thierry
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Hi Linus,
just two changes, one udl endian fix, one nouveau memory corruption on
some GPUs.
Dave.
The following changes since commit 6b16351acbd415e66ba16bf7d473ece1574cf0bc:
Linux 3.5-rc4 (2012-06-24 12:53:04 -0700)
are available in the git repository at:
git://people.freedesktop.org/~
From: Dave Airlie
This ports over the dpms code from udlfb, and should mean
a better chance of turning on some udl devices.
Signed-off-by: Dave Airlie
---
drivers/gpu/drm/udl/udl_modeset.c | 44 +++--
1 file changed, 37 insertions(+), 7 deletions(-)
diff --gi
Hello Thierry,
I still haven't found the time to look at device tree things in detail,
but still some comments inline. Overall I think the tree looks ok and is
a great thing to get started.
Am Dienstag, den 26.06.2012, 12:55 +0200 schrieb Thierry Reding:
> Hi,
>
> while I haven't got much time t
Am Dienstag, den 26.06.2012, 23:07 +0200 schrieb Daniel Vetter:
> On Tue, Jun 26, 2012 at 02:04:00PM -0700, Jesse Barnes wrote:
> > On Tue, 26 Jun 2012 00:36:24 +0200
> > Lekensteyn wrote:
> >
> > > This is rather a hack to fix brightness hotkeys on a Clevo laptop. CADL
> > > is not
> > > used a
On Tue, 26 Jun 2012 00:36:24 +0200
Lekensteyn wrote:
> This is rather a hack to fix brightness hotkeys on a Clevo laptop. CADL is not
> used anywhere in the driver code at the moment, but it could be used in BIOS
> as
> is the case with the Clevo laptop.
>
> The Clevo B7130 requires the CADL fi
On Tue, Jun 26, 2012 at 02:04:00PM -0700, Jesse Barnes wrote:
> On Tue, 26 Jun 2012 00:36:24 +0200
> Lekensteyn wrote:
>
> > This is rather a hack to fix brightness hotkeys on a Clevo laptop. CADL is
> > not
> > used anywhere in the driver code at the moment, but it could be used in
> > BIOS as
From: Jerome Glisse
After unrecovered GPU lockup avoid any GPU activities to avoid
things like kernel segfault and alike to happen in any of the
path that assume hw is working.
cc: sta...@vger.kernel.org
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/radeon/radeon_device.c |9 ---
dr
On Tue, 26 Jun 2012 00:36:24 +0200
Lekensteyn wrote:
> This is rather a hack to fix brightness hotkeys on a Clevo laptop. CADL is not
> used anywhere in the driver code at the moment, but it could be used in BIOS
> as
> is the case with the Clevo laptop.
>
> The Clevo B7130 requires the CADL fi
Hans and Laurent,
Thanks for the feedback.
On Tue, Jun 26, 2012 at 2:40 AM, Hans Verkuil wrote:
> On Tue 26 June 2012 11:11:06 Laurent Pinchart wrote:
>> Hi Dima and Tomasz,
>>
>> Sorry for the late reply.
>>
>> On Tuesday 26 June 2012 10:40:44 Tomasz Stanislawski wrote:
>> > Hi Dima Zavin,
>> >
Hans and Laurent,
Thanks for the feedback.
On Tue, Jun 26, 2012 at 2:40 AM, Hans Verkuil wrote:
> On Tue 26 June 2012 11:11:06 Laurent Pinchart wrote:
>> Hi Dima and Tomasz,
>>
>> Sorry for the late reply.
>>
>> On Tuesday 26 June 2012 10:40:44 Tomasz Stanislawski wrote:
>> > Hi Dima Zavin,
>> >
On Tue, Jun 26, 2012 at 1:40 AM, Tomasz Stanislawski
wrote:
> Hi Dima Zavin,
> Thank you for the patch and for a ping remainder :).
>
> You are right. The unmap is missing in __vb2_queue_cancel.
> I will apply your fix into next version of V4L2 support for dmabuf.
>
> Please refer to some comments
On 06/26/2012 01:31 PM, Thierry Reding wrote:
> On Tue, Jun 26, 2012 at 11:43:38AM -0600, Stephen Warren wrote:
>> On 06/26/2012 07:41 AM, Thierry Reding wrote:
>>> On Tue, Jun 26, 2012 at 04:01:05PM +0300, Terje Bergström
>>> wrote:
On 26.06.2012 13:55, Thierry Reding wrote:
>> ...
> stat
On Tue, Jun 26, 2012 at 1:40 AM, Tomasz Stanislawski
wrote:
> Hi Dima Zavin,
> Thank you for the patch and for a ping remainder :).
>
> You are right. The unmap is missing in __vb2_queue_cancel.
> I will apply your fix into next version of V4L2 support for dmabuf.
>
> Please refer to some comments
On 06/26/2012 01:27 PM, Thierry Reding wrote:
> On Tue, Jun 26, 2012 at 11:41:43AM -0600, Stephen Warren wrote:
>> On 06/26/2012 08:02 AM, Terje Bergström wrote:
>>> On 26.06.2012 16:41, Thierry Reding wrote:
>>>
On Tue, Jun 26, 2012 at 04:01:05PM +0300, Terje Bergström
wrote:
> We a
On 06/26/2012 04:55 AM, Thierry Reding wrote:
> Hi,
>
> while I haven't got much time to work on the actual code right now, I
> think it might still be useful if we could get the device tree binding
> to a point where everybody is happy with it. That'll also save me some
> time once I get to writi
On 06/26/2012 07:01 AM, Terje Bergström wrote:
> On 26.06.2012 13:55, Thierry Reding wrote:
...
>> An alternative would be to call of_platform_populate() from the host1x
[alternative to making the host1x node contain compatible="simple-bus".]
>> driver. This has the advantage that it could integr
On 06/26/2012 07:41 AM, Thierry Reding wrote:
> On Tue, Jun 26, 2012 at 04:01:05PM +0300, Terje Bergström wrote:
>> On 26.06.2012 13:55, Thierry Reding wrote:
...
>>> status = "disabled";
>>>
>>> gart = <&gart>;
>>>
>>> /* video-encoding/decoding */ mpe { reg = <0x5404
>>> 0x0004>; interr
On 06/26/2012 08:02 AM, Terje Bergström wrote:
> On 26.06.2012 16:41, Thierry Reding wrote:
>
>> On Tue, Jun 26, 2012 at 04:01:05PM +0300, Terje Bergström wrote:
>>> We also assign certain host1x common resources per device by convention,
>>> f.ex. sync points, channels etc. We currently encode th
On 06/26/2012 01:31 PM, Thierry Reding wrote:
> On Tue, Jun 26, 2012 at 11:43:38AM -0600, Stephen Warren wrote:
>> On 06/26/2012 07:41 AM, Thierry Reding wrote:
>>> On Tue, Jun 26, 2012 at 04:01:05PM +0300, Terje Bergstr?m
>>> wrote:
On 26.06.2012 13:55, Thierry Reding wrote:
>> ...
> stat
On 06/26/2012 01:27 PM, Thierry Reding wrote:
> On Tue, Jun 26, 2012 at 11:41:43AM -0600, Stephen Warren wrote:
>> On 06/26/2012 08:02 AM, Terje Bergstr?m wrote:
>>> On 26.06.2012 16:41, Thierry Reding wrote:
>>>
On Tue, Jun 26, 2012 at 04:01:05PM +0300, Terje Bergstr?m
wrote:
> We a
};
};
connectors {
#address-cells = <1>;
#size-cells = <0>;
connector at 0 {
reg = <0>;
output = <&hdmi>;
ddc = <&d
On Tue, Jun 26, 2012 at 12:10:42PM -0600, Stephen Warren wrote:
> On 06/26/2012 04:55 AM, Thierry Reding wrote:
> > Hi,
> >
> > while I haven't got much time to work on the actual code right now, I
> > think it might still be useful if we could get the device tree binding
> > to a point where ever
On Tue, Jun 26, 2012 at 11:46:42AM -0600, Stephen Warren wrote:
> On 06/26/2012 07:01 AM, Terje Bergström wrote:
> > On 26.06.2012 13:55, Thierry Reding wrote:
> ...
> >> An alternative would be to call of_platform_populate() from the host1x
>
> [alternative to making the host1x node contain compa
On Tue, Jun 26, 2012 at 11:43:38AM -0600, Stephen Warren wrote:
> On 06/26/2012 07:41 AM, Thierry Reding wrote:
> > On Tue, Jun 26, 2012 at 04:01:05PM +0300, Terje Bergström wrote:
> >> On 26.06.2012 13:55, Thierry Reding wrote:
> ...
> >>> status = "disabled";
> >>>
> >>> gart = <&gart>;
> >>>
>
On Tue, Jun 26, 2012 at 11:41:43AM -0600, Stephen Warren wrote:
> On 06/26/2012 08:02 AM, Terje Bergström wrote:
> > On 26.06.2012 16:41, Thierry Reding wrote:
> >
> >> On Tue, Jun 26, 2012 at 04:01:05PM +0300, Terje Bergström wrote:
> >>> We also assign certain host1x common resources per device
From: Ben Skeggs
nv_two_heads() was never meant to be used outside of pre-nv50 code. The
code checks for >= NV_10 for 2 CRTCs, then downgrades a few specific
chipsets to 1 CRTC based on (pci_device & 0x0ff0).
The breakage example seen is on GTX 560Ti, with a pciid of 0x1200, which
gets detected
---
drivers/gpu/drm/exynos/exynos_drm_gem.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/gpu/drm/exynos/exynos_drm_gem.c
b/drivers/gpu/drm/exynos/exynos_drm_gem.c
index 5c8b683..acb9f42 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_gem.c
+++ b/drivers/gpu/drm/
On 06/26/2012 04:55 AM, Thierry Reding wrote:
> Hi,
>
> while I haven't got much time to work on the actual code right now, I
> think it might still be useful if we could get the device tree binding
> to a point where everybody is happy with it. That'll also save me some
> time once I get to writi
On 06/26/2012 07:01 AM, Terje Bergstr?m wrote:
> On 26.06.2012 13:55, Thierry Reding wrote:
...
>> An alternative would be to call of_platform_populate() from the host1x
[alternative to making the host1x node contain compatible="simple-bus".]
>> driver. This has the advantage that it could integr
On 06/26/2012 07:41 AM, Thierry Reding wrote:
> On Tue, Jun 26, 2012 at 04:01:05PM +0300, Terje Bergstr?m wrote:
>> On 26.06.2012 13:55, Thierry Reding wrote:
...
>>> status = "disabled";
>>>
>>> gart = <&gart>;
>>>
>>> /* video-encoding/decoding */ mpe { reg = <0x5404
>>> 0x0004>; interr
On 06/26/2012 08:02 AM, Terje Bergstr?m wrote:
> On 26.06.2012 16:41, Thierry Reding wrote:
>
>> On Tue, Jun 26, 2012 at 04:01:05PM +0300, Terje Bergstr?m wrote:
>>> We also assign certain host1x common resources per device by convention,
>>> f.ex. sync points, channels etc. We currently encode th
On Tue 26 June 2012 11:11:06 Laurent Pinchart wrote:
> Hi Dima and Tomasz,
>
> Sorry for the late reply.
>
> On Tuesday 26 June 2012 10:40:44 Tomasz Stanislawski wrote:
> > Hi Dima Zavin,
> > Thank you for the patch and for a ping remainder :).
> >
> > You are right. The unmap is missing in __vb
On Tue, Jun 26, 2012 at 10:50 AM, Dave Airlie wrote:
> From: Dave Airlie
>
> PCI express gen2.0 can support 5GT link speeds, this add code to
> decide if this can be used for the device. We currently disable
> it for via/serverengines root ports due to known issues.
>
> Signed-off-by: Dave Airlie
Hi Dima and Tomasz,
Sorry for the late reply.
On Tuesday 26 June 2012 10:40:44 Tomasz Stanislawski wrote:
> Hi Dima Zavin,
> Thank you for the patch and for a ping remainder :).
>
> You are right. The unmap is missing in __vb2_queue_cancel.
> I will apply your fix into next version of V4L2 suppo
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Hi Dima Zavin,
Thank you for the patch and for a ping remainder :).
You are right. The unmap is missing in __vb2_queue_cancel.
I will apply your fix into next version of V4L2 support for dmabuf.
Please refer to some comments below.
On 06/20/2012 08:12 AM, Dima Zavin wrote:
> Tomasz,
>
> I've en
Hey,
Due to inertia, I thought I would take a shot at implicit synchronization as
well.
I have just barely enough to make it work for nouveau to synchronize with itself
now using the cpu. Hopefully the general idea is correct but I feel the
implementation wrong.
There are 2 ways to get deadlocks
https://bugs.freedesktop.org/show_bug.cgi?id=40790
ojab changed:
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https://bugs.freedesktop.org/show_bug.cgi?id=40790
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CC||ojab at ojab.ru
--- Comment #11 from ojab 2012-0
At Mon, 25 Jun 2012 21:38:56 +0200,
Sven Joachim wrote:
>
> Am 25.06.2012 um 21:24 schrieb Takashi Iwai:
>
> >> > And, does the patch below help?
> >>
> >> Somewhat: at least I get 1280x1024 again, but at 60 rather than 75 Hz.
> >
> > I guess it worked casually because 1280x1024 at 75 was the hi
https://bugs.freedesktop.org/show_bug.cgi?id=40790
--- Comment #10 from ojab 2012-06-26 02:20:10 PDT ---
I have the same issue on
01:05.0 VGA compatible controller: Advanced Micro Devices [AMD] nee ATI RS780D
[Radeon HD 3300]
OpenGL renderer string: Gallium 0.4 on AMD RS780
OpenGL version string:
On Tue, Jun 26, 2012 at 4:33 PM, Alex Deucher wrote:
> On Tue, Jun 26, 2012 at 10:50 AM, Dave Airlie wrote:
>> From: Dave Airlie
>>
>> PCI express gen2.0 can support 5GT link speeds, this add code to
>> decide if this can be used for the device. We currently disable
>> it for via/serverengines r
On 26.06.2012 16:41, Thierry Reding wrote:
> On Tue, Jun 26, 2012 at 04:01:05PM +0300, Terje Bergström wrote:
>> We also assign certain host1x common resources per device by convention,
>> f.ex. sync points, channels etc. We currently encode that information in
>> the device node (3D uses sync poi
Hi Thierry,
On Tue, 26 Jun 2012 12:55:13 +0200
Thierry Reding wrote:
> * PGP Signed by an unknown key
>
> Hi,
>
> while I haven't got much time to work on the actual code right now, I
> think it might still be useful if we could get the device tree binding
> to a point where everybody is happy
On 26.06.2012 13:55, Thierry Reding wrote:
> host1x {
> compatible = "nvidia,tegra20-host1x", "simple-bus";
> reg = <0x5000 0x00024000>;
> interrupts = <0 64 0x04 /* cop syncpt */
> 0 65 0x04 /* mpcore syncpt */
>
On Tue, Jun 26, 2012 at 10:50 AM, Dave Airlie wrote:
> From: Dave Airlie
>
> PCI express gen2.0 can support 5GT link speeds, this add code to
> decide if this can be used for the device. We currently disable
> it for via/serverengines root ports due to known issues.
>
> Signed-off-by: Dave Airlie
On Tue, Jun 26, 2012 at 4:09 PM, Adam Jackson wrote:
> On Tue, 2012-06-26 at 15:50 +0100, Dave Airlie wrote:
>> From: Dave Airlie
>>
>> PCI express gen2.0 can support 5GT link speeds, this add code to
>> decide if this can be used for the device. We currently disable
>> it for via/serverengines r
On Tue, 2012-06-26 at 15:50 +0100, Dave Airlie wrote:
> From: Dave Airlie
>
> PCI express gen2.0 can support 5GT link speeds, this add code to
> decide if this can be used for the device. We currently disable
> it for via/serverengines root ports due to known issues.
^
Pa
From: Dave Airlie
This patch assumes SI is the same as NI wrt gen2 enabling, and just
calls the evergreen code.
Signed-off-by: Dave Airlie
---
drivers/gpu/drm/radeon/si.c |4 +++-
1 files changed, 3 insertions(+), 1 deletions(-)
diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/r
From: Dave Airlie
This attempts to enable PCIE gen2 where possible, disabling
via radeon.pcie_gen2 in case of regression, so we can test it.
Signed-off-by: Dave Airlie
---
drivers/gpu/drm/radeon/evergreen.c |5 +
drivers/gpu/drm/radeon/r600.c |5 +
drivers/gpu/drm/radeon
From: Dave Airlie
PCI express gen2.0 can support 5GT link speeds, this add code to
decide if this can be used for the device. We currently disable
it for via/serverengines root ports due to known issues.
Signed-off-by: Dave Airlie
---
drivers/gpu/drm/drm_pci.c | 37 ++
nd DRI developer
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From: Dave Airlie
This ports over the dpms code from udlfb, and should mean
a better chance of turning on some udl devices.
Signed-off-by: Dave Airlie
---
drivers/gpu/drm/udl/udl_modeset.c | 44 +++--
1 file changed, 37 insertions(+), 7 deletions(-)
diff --gi
On Tue, Jun 26, 2012 at 04:02:24PM +0300, Hiroshi Doyu wrote:
> Hi Thierry,
>
> On Tue, 26 Jun 2012 12:55:13 +0200
> Thierry Reding wrote:
>
> > * PGP Signed by an unknown key
> >
> > Hi,
> >
> > while I haven't got much time to work on the actual code right now, I
> > think it might still be
On Tue, Jun 26, 2012 at 02:47:56PM +0200, Lucas Stach wrote:
> Hello Thierry,
>
> I still haven't found the time to look at device tree things in detail,
> but still some comments inline. Overall I think the tree looks ok and is
> a great thing to get started.
>
> Am Dienstag, den 26.06.2012, 12:
Hi Linus,
just two changes, one udl endian fix, one nouveau memory corruption on
some GPUs.
Dave.
The following changes since commit 6b16351acbd415e66ba16bf7d473ece1574cf0bc:
Linux 3.5-rc4 (2012-06-24 12:53:04 -0700)
are available in the git repository at:
git://people.freedesktop.org/~
On Tue, Jun 26, 2012 at 04:01:05PM +0300, Terje Bergström wrote:
> On 26.06.2012 13:55, Thierry Reding wrote:
>
> > host1x {
> > compatible = "nvidia,tegra20-host1x", "simple-bus";
> > reg = <0x5000 0x00024000>;
> > interrupts = <0 64 0x04 /* cop syncp
Hello Thierry,
I still haven't found the time to look at device tree things in detail,
but still some comments inline. Overall I think the tree looks ok and is
a great thing to get started.
Am Dienstag, den 26.06.2012, 12:55 +0200 schrieb Thierry Reding:
> Hi,
>
> while I haven't got much time t
https://bugzilla.kernel.org/show_bug.cgi?id=42876
--- Comment #14 from Vlad 2012-06-26 04:41:55 ---
I had the same issue again after 3.2 kernel with 3.4.0. However at least
vanilla 3.4.3 boots fine again.
--
Configure bugmail: https://bugzilla.kernel.org/userprefs.cgi?tab=email
--- You
Hi,
while I haven't got much time to work on the actual code right now, I
think it might still be useful if we could get the device tree binding
to a point where everybody is happy with it. That'll also save me some
time once I get to writing the code because I won't have to redo it over
again. =)
On Tue 26 June 2012 11:11:06 Laurent Pinchart wrote:
> Hi Dima and Tomasz,
>
> Sorry for the late reply.
>
> On Tuesday 26 June 2012 10:40:44 Tomasz Stanislawski wrote:
> > Hi Dima Zavin,
> > Thank you for the patch and for a ping remainder :).
> >
> > You are right. The unmap is missing in __vb
https://bugs.freedesktop.org/show_bug.cgi?id=40790
ojab changed:
What|Removed |Added
Attachment #51166|0 |1
is obsolete|
https://bugs.freedesktop.org/show_bug.cgi?id=50149
--- Comment #15 from Roman ?makal 2012-06-25
19:30:13 PDT ---
Actually i cant. My laptop cooling broken 2 weeks ago so i have to buy new fan
for it. Will try these patches as soon as i fix it
--
Configure bugmail: https://bugs.freedesktop.org/
https://bugs.freedesktop.org/show_bug.cgi?id=40790
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CC||o...@ojab.ru
--- Comment #11 from ojab 2012-06-2
https://bugs.freedesktop.org/show_bug.cgi?id=40790
--- Comment #10 from ojab 2012-06-26 02:20:10 PDT ---
I have the same issue on
01:05.0 VGA compatible controller: Advanced Micro Devices [AMD] nee ATI RS780D
[Radeon HD 3300]
OpenGL renderer string: Gallium 0.4 on AMD RS780
OpenGL version string:
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