drm-blob-props - will send it out to the list when I get in
tomorrow morning. Got sidetracked fixing up more unify-flip-modeset issues
instead :\
Cheers,
Daniel
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h my fairly rudimentary test, so I'll reshuffle the Weston patches
as quickly as possible tomorrow and give it a spin.
Cheers,
Daniel
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On 2015ë
05ì 07ì¼ 09:04, Krzysztof Kozlowski wrote:
> From: Krzysztof Kozlowski
>
> The Exynos DRM code does not modify the ops provided by CRTC driver in
> exynos_drm_crtc_create() call.
Please check coding style with checkpatch.pl before posting it. I can
see below warning,
WARNING: line
On 2015ë
05ì 06ì¼ 21:10, Tobias Jakobi wrote:
> The index for the hardware layer is always >=0. Previous
> code that also used -1 as special index is now gone.
>
> Also apply this to 'ch_enabled' (decon/fimd), since the
> variable is on the same line (and is again always unsigned).
I can see
From: Alex Deucher
Some of the vce clocks are automatic, others need to
be manually enabled. For ease, just disable cg when
vce is active.
v2: rebased, call vce_v1_0_enable_mgcg directly
Signed-off-by: Alex Deucher
Signed-off-by: Christian König
---
drivers/gpu/drm/radeon/si_dpm.c | 9
From: Alex Deucher
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/radeon_asic.c | 2 ++
drivers/gpu/drm/radeon/sid.h | 1 +
drivers/gpu/drm/radeon/vce_v1_0.c| 57
3 files changed, 60 insertions(+)
diff --git a/drivers/gpu/drm/radeon/ra
From: Christian König
Initial support for VCE 1.0 using newest firmware.
v2: rebased
v3: fix for TN
v4: fix FW size calculation
Signed-off-by: Christian König
---
drivers/gpu/drm/radeon/ni.c | 46
drivers/gpu/drm/radeon/radeon.h | 1 +
drivers/gpu/drm/radeon/ra
From: Alex Deucher
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/si_dpm.c | 102 ++--
1 file changed, 98 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/radeon/si_dpm.c b/drivers/gpu/drm/radeon/si_dpm.c
index ff8b83f..69cd4ca 100644
--- a
From: Alex Deucher
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/trinity_dpm.c | 76
1 file changed, 76 insertions(+)
diff --git a/drivers/gpu/drm/radeon/trinity_dpm.c
b/drivers/gpu/drm/radeon/trinity_dpm.c
index a5b02c5..e0d0780 100644
--- a/driv
From: Alex Deucher
This implements the function to set the vce clocks
on TN hardware.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/ni.c | 31 +++
drivers/gpu/drm/radeon/nid.h | 7 +++
drivers/gpu/drm/radeon/radeon_asic.c | 1 +
drive
From: Christian König
For setting clocks with VCE v1.0
v2: (chk) rebased on current tree
Signed-off-by: Christian König
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/radeon.h | 7 ++
drivers/gpu/drm/radeon/radeon_asic.c | 1 +
drivers/gpu/drm/radeon/radeon_asic.h | 1 +
From: Christian König
They seem to work fine with the kernel interface.
Signed-off-by: Christian König
---
drivers/gpu/drm/radeon/radeon_vce.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/radeon/radeon_vce.c
b/drivers/gpu/drm/radeon/radeon_vce.c
ind
From: Christian König
Previously we were completely over allocating, fix this
by actually implementing the size calculation.
Signed-off-by: Christian König
---
drivers/gpu/drm/radeon/radeon.h | 2 --
drivers/gpu/drm/radeon/radeon_asic.h | 1 +
drivers/gpu/drm/radeon/radeon_vce.c | 3
/test_next-20150511/20150511004533/boot/tegra124-jetson-tk1/tegra124-jetson-tk1/tegra_defconfig_log.txt
Reverting commit 672cb1d6aec7da2799afd1b529d5136d84ed2561 ("drm: Add
reference counting to blob properties") gets it booting again:
http://nvt.pwsan.com/pub/pwalmsley-teste
.6): https://www.dropbox.com/s/f5yqqx2l6pz284z/fez_bad.png?dl=0
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Hey Inki,
Inki Dae wrote:
> On 2015ë
05ì 06ì¼ 21:10, Tobias Jakobi wrote:
>> The index for the hardware layer is always >=0. Previous
>> code that also used -1 as special index is now gone.
>>
>> Also apply this to 'ch_enabled' (decon/fimd), since the
>> variable is on the same line (and is a
VOP can support BGR formats in all windows thanks to red/blue swap option
provided in WINx_CTRL0 registers. This patch enables support for
ABGR, XBGR, BGR888 and BGR565 formats by using this feature.
Signed-off-by: Tomasz Figa
---
drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 33
https://bugzilla.kernel.org/show_bug.cgi?id=98101
Bug ID: 98101
Summary: kernel BUG at drivers/gpu/drm/drm_vma_manager.c:209!
Product: Drivers
Version: 2.5
Kernel Version: 4.01
Hardware: All
OS: Linux
Tree: Ma
On Mon, May 11, 2015 at 03:59:55PM -0400, Alex Deucher wrote:
> > > > The link training with the monitor seems to fail periodically. You
> > may have to play with the timing in the link training sequence. It looks
> > like you also have some power management related issues. Does booting
MD Radeon HD 3650 Mobility
The item used for the report is Assault Android Cactus demo.
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:) I'll workout this ASAP.
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adeon_atom_mode_fixup() before the mode is set.
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https://bugzilla.kernel.org/show_bug.cgi?id=97701
Jouni Mettälä changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolution|---
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On Thu, May 7, 2015 at 1:44 PM, Christian König
wrote:
> On 07.05.2015 19:13, Marek Olšák wrote:
>>
>> Ping
>>
>> On Wed, Apr 29, 2015 at 7:40 PM, Marek Olšák wrote:
>>>
>>> From: Marek Olšák
>>>
>>> Userspace will be able to tell whether a GPU reset occured by comparing
>>> an old refer
of DPCD elements was broken at some point.
Digging further.
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From: Stephane Viau
Each interface (DSI/eDP/HDMI) has to control its own PLL.
This change only add the register description for each one of them.
Let's not make the register description common as some registers
may not be implemented the same way for each interface PHY.
v2:
- Add description fo
This change includes the generated file of the following:
rnndb: Add 28nm PLL register description
Each interface (DSI/eDP/HDMI) has to control its own PLL.
This change only add the register description for each one of them.
Let's not make the register description common as some
I just want to make things easier. If we adding this in panel's meta data, it
will be harder to make crtc gets this, since normally encoder talks with panel
and crtc talks with encoder. But yes, adding this in panel's metadata makes
more sense so if there is a better way to do that, I'm happy to
Drivers may need to store the state of shared resources, such as PLLs
or FIFO space, into the atomic state. Allow this by making it possible
to subclass drm_atomic_state.
Cc: dri-devel at lists.freedesktop.org
Acked-by: Ander Conselvan de Oliveira
Signed-off-by: Maarten Lankhorst
---
drivers/gp
.
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On Fri 08-05-15 15:49:22, Mel Gorman wrote:
> On Wed, May 06, 2015 at 09:28:09AM +0200, Jan Kara wrote:
> > Provide new function get_vaddr_frames(). This function maps virtual
> > addresses from given start and fills given array with page frame numbers of
> > the corresponding pages. If given star
On Mon, May 11, 2015 at 2:40 PM, Dave Jones wrote:
> On Fri, May 08, 2015 at 11:40:55AM -0400, Dave Jones wrote:
> > On Fri, May 08, 2015 at 01:23:59PM +, Deucher, Alexander wrote:
>
> > > > I just bought a new radeon (1002:682c), to pair with my shiny new
> displayport
> > > > monitor.
On Mon, May 11, 2015 at 04:00:19PM +0200, Jan Kara wrote:
> > > +int get_vaddr_frames(unsigned long start, unsigned int nr_frames,
> > > + bool write, bool force, struct frame_vector *vec)
> > > +{
> > > + struct mm_struct *mm = current->mm;
> > > + struct vm_area_struct *vma;
> > > +
On Fri, May 08, 2015 at 11:40:55AM -0400, Dave Jones wrote:
> On Fri, May 08, 2015 at 01:23:59PM +, Deucher, Alexander wrote:
> > > I just bought a new radeon (1002:682c), to pair with my shiny new
> displayport
> > > monitor.
> > > It shows a display during through the BIOS POST, and
dri-devel/attachments/20150511/4842241d/attachment.html>
On Mon, May 11, 2015 at 09:38:20AM +0800, Mark Zhang wrote:
> Normally this flag is set by panel driver so that crtc can enable
> the "one-shot" mode(not scan frames continuously).
>
> Signed-off-by: Mark Zhang
> ---
> include/uapi/drm/drm_mode.h | 1 +
> 1 file changed, 1 insertion(+)
>
> diff
On Sun, May 10, 2015 at 01:00:23AM +0900, Masanari Iida wrote:
> This patch fix spelling typo in intel_runtime_pm.c
>
> Signed-off-by: Masanari Iida
Queued for -next, thanks for the patch.
-Daniel
> ---
> drivers/gpu/drm/i915/intel_runtime_pm.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 de
On Fri, May 08, 2015 at 05:45:07PM +0300, ville.syrjala at linux.intel.com
wrote:
> From: Ville Syrjälä
>
> Currently we're adding CEA modes after the inferred modes, which means
> we might get multiple modes that are very close to each other, but
> slightly different, which seems a bit silly.
On Fri, May 08, 2015 at 12:57:01PM -0400, Steven Rostedt wrote:
> On Fri, 8 May 2015 12:18:10 -0400
> Steven Rostedt wrote:
>
> > On Fri, 8 May 2015 12:08:31 -0400
> > Steven Rostedt wrote:
> >
> >
> > > Maybe it's my bios still (it is an older box). I'll just block out
> > > compiling in SND_
On Sat, May 09, 2015 at 03:52:13PM +0100, Daniel Stone wrote:
> Add an ioctl which allows users to create blob properties from supplied
> data. Currently this only supports modes, creating a drm_display_mode from
> the userspace drm_mode_modeinfo.
>
> v2: Removed size/type checks.
> Rebased on
On Sat, May 09, 2015 at 03:52:10PM +0100, Daniel Stone wrote:
> 672cb1d6ae mistakenly added an extra parameter to the kerneldoc for
> drm_property_unreference_blob which wasn't actually present.
>
> Signed-off-by: Daniel Stone
> ---
> drivers/gpu/drm/drm_crtc.c | 1 -
> 1 file changed, 1 deletio
On Sun, May 10, 2015 at 9:50 PM, Nicholas Krause wrote:
>
>
> On May 10, 2015 3:45:36 PM EDT, patrik.r.jakobsson at gmail.com wrote:
>>On Sun, May 10, 2015 at 02:40:40PM -0400, nick wrote:
>>>
>>>
>>> On 2015-05-10 02:35 PM, patrik.r.jakobsson at gmail.com wrote:
>>> > On Sun, May 10, 2015 at 01:4
This HACK adds a workqueue to refresh the display periodically.
This is used just for testing.
Signed-off-by: Mark Zhang
---
drivers/gpu/drm/tegra/dc.c | 47 +
drivers/gpu/drm/tegra/drm.h | 1 +
2 files changed, 48 insertions(+)
diff --git a/drivers
Signed-off-by: Mark Zhang
---
drivers/gpu/drm/tegra/dc.c | 34
drivers/gpu/drm/tegra/drm.h | 3 +++
drivers/gpu/drm/tegra/dsi.c | 63 +
3 files changed, 95 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/tegra/dc.c
Signed-off-by: Mark Zhang
---
drivers/gpu/drm/panel/panel-sharp-lq101r1sx01.c | 26 +
1 file changed, 26 insertions(+)
diff --git a/drivers/gpu/drm/panel/panel-sharp-lq101r1sx01.c
b/drivers/gpu/drm/panel/panel-sharp-lq101r1sx01.c
index 654575607864..a0a7c80f23d6 100644
-
Signed-off-by: Mark Zhang
---
drivers/gpu/drm/drm_mipi_dsi.c | 36
include/drm/drm_mipi_dsi.h | 2 ++
2 files changed, 38 insertions(+)
diff --git a/drivers/gpu/drm/drm_mipi_dsi.c b/drivers/gpu/drm/drm_mipi_dsi.c
index 2d5ca8eec13a..9bc6ff75eb8f 100644
-
The "idle" function of a drm panel is used to tell panel
there are no more frames coming in and it should remain the
last frame it gets.
Normally this only makes sense for smart panels which has
internal framebuffer.
The "busy" function is opposite to "idle".
Signed-off-by: Mark Zhang
---
inclu
If dc is about to work in one-shot mode, we need to set dc's scan
mode to NC(Non-contiguous).
There are 2 things which can make dc send frame again:
- TE signal is received
- Driver sets the NC_HOST_TRIG_ENABLE
Signed-off-by: Mark Zhang
---
drivers/gpu/drm/tegra/dc.c | 43 +++
Signed-off-by: Mark Zhang
---
drivers/gpu/drm/panel/panel-sharp-lq101r1sx01.c | 17 -
1 file changed, 16 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/panel/panel-sharp-lq101r1sx01.c
b/drivers/gpu/drm/panel/panel-sharp-lq101r1sx01.c
index b69f88cd15b2..654575607864 1
te-polarity indicates the polarity of panel's TE(Tearing Effect) signal.
Normally the TE pin is connected to the host SoC. The display
controller will send a new frame to panel when the TE signal is
triggered.
Signed-off-by: Mark Zhang
---
Documentation/devicetree/bindings/panel/sharp,lq101r1sx0
Add 2 DRM mode flag: TE polarity high/low.
Signed-off-by: Mark Zhang
---
include/uapi/drm/drm_mode.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm/drm_mode.h
index 5447a338e893..b577cdfb76df 100644
--- a/include/uapi/drm/drm_mode.h
+++ b/inc
Signed-off-by: Mark Zhang
---
drivers/gpu/drm/panel/panel-sharp-lq101r1sx01.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/panel/panel-sharp-lq101r1sx01.c
b/drivers/gpu/drm/panel/panel-sharp-lq101r1sx01.c
index 19a67d2598c0..b69f88cd15b2 100644
--- a/drivers/gpu/drm
Sharp lq101r1sx01 has internal framebuffer so it doesn't
require crtc sending frames to it continuously.
So set the one-shot flag in the driver.
Signed-off-by: Mark Zhang
---
drivers/gpu/drm/panel/panel-sharp-lq101r1sx01.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/panel
Normally this flag is set by panel driver so that crtc can enable
the "one-shot" mode(not scan frames continuously).
Signed-off-by: Mark Zhang
---
include/uapi/drm/drm_mode.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm/drm_mode.h
index dbeba
This patch set adds the Tegra dc one-shot support. The patch set is
tested on Dalmore + Sharp lq101r1sx01.
Basically this patch set is just for RFC. Some DRM files are changes,
I guess maybe there are better solutions for that. Also, Thierry
mentioned that "te-polarity" can be designed as a GPIO s
ssignee for the bug.
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