It may caused a dead lock if we flush the hpd work in bridge disable time.
The normal flow would like:
IN --> DRM IOCTL
1. Acquire crtc_ww_class_mutex (DRM IOCTL)
IN --> analogix_dp_bridge
2. Acquire hpd work lock (Flush hpd work)
3. HPD work already in idle, no need to
Turn off the panel power in suspend time would help to reduce
power waste.
Signed-off-by: Yakir Yang
---
Changes in v12: None
Changes in v11: None
Changes in v10: None
Changes in v9: None
Changes in v8: None
Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes i
On Rockchip platform, sometimes driver would failed at reading EDID
message, and it's caused by the AUX reply flag wouldn't received under
the 100*10us wait time.
But after expand the wait time a little, the AUX reply flag would be
set, so maybe the wait time is a little critical. Besides the anal
Display Port monitor could support kinds of mode which indicate
in monitor edid, not just one single display resolution which
defined in panel or devivetree property display timing.
Note: Gustavo Padovan try to remove the controller and phy
power on function in bind time at bellow commit:
This change just make a little clean to make code more like
drm core expect, move hdp detect code from bridge->enable(),
and place them into connector->detect().
Note: Gustavo Padovan try to remove the controller and phy
power on function in bind time at bellow commit:
drm/exynos: do not s
Some edp screen do not have hpd signal, so we can't just return
failed when hpd plug in detect failed.
This is an hardware property, so we need add a devicetree property
"analogix,need-force-hpd" to indicate this sutiation.
Signed-off-by: Yakir Yang
Acked-by: Rob Herring
Tested-by: Javier Marti
There are some IP limit on rk3288 that only support 4 physical lanes
of 2.7/1.6 Gbps/lane, so seprate them out by device_type flag.
Signed-off-by: Yakir Yang
Tested-by: Javier Martinez Canillas
---
Changes in v12: None
Changes in v11: None
Changes in v10:
- Remove the surplus "plat_data" check.
RK3288 need some special registers setting, we can separate
them out by the dev_type of plat_data.
Signed-off-by: Yakir Yang
---
Changes in v12: None
Changes in v11: None
Changes in v10: None
Changes in v9: None
Changes in v8: None
Changes in v7: None
Changes in v6: None
Changes in v5: None
Chang
Add dt binding documentation for rockchip display port PHY.
Signed-off-by: Yakir Yang
Acked-by: Rob Herring
Reviewed-by: Heiko Stuebner
---
Changes in v12: None
Changes in v11:
- Correct the title of this rockchip dp phy document(Rob)
- Add the ack from Rob Herring
Changes in v10: None
Changes
Add phy driver for the Rockchip DisplayPort PHY module. This
is required to get DisplayPort working in Rockchip SoCs.
Signed-off-by: Yakir Yang
Reviewed-by: Heiko Stuebner
---
Changes in v12:
- Re-order the include headers file alphabetically in phy-rockchip-dp.c (Jingoo)
Changes in v11: None
C
Rockchip DP driver is a helper driver of analogix_dp coder driver,
so most of the DT property should be descriped in analogix_dp document.
Signed-off-by: Yakir Yang
Acked-by: Rob Herring
Reviewed-by: Heiko Stuebner
---
Changes in v12: None
Changes in v11: None
Changes in v10:
- Add the ack from
Rockchip have three clocks for dp controller, we leave pclk_edp
to analogix_dp driver control, and keep the sclk_edp_24m and
sclk_edp in platform driver.
Signed-off-by: Yakir Yang
---
Changes in v12: None
Changes in v11: None
Changes in v10:
- Correct the ROCKCHIP_ANALOGIX_DP indentation in Kconf
After exynos_dp have been split the common IP code into analogix_dp driver,
the analogix_dp driver have deprecated some Samsung platform properties which
could be dynamically parsed from EDID/MODE/DPCD message, so this is an update
for Exynos DTS file for dp-controller.
Beside the backward compati
Analogix dp driver is split from exynos dp driver, so we just
make an copy of exynos_dp.txt, and then simplify exynos_dp.txt
Beside update some exynos dtsi file with the latest change
according to the devicetree binding documents.
Signed-off-by: Yakir Yang
Acked-by: Rob Herring
---
Changes in v
Both hsync/vsync polarity and interlace mode can be parsed from
drm display mode, and dynamic_range and ycbcr_coeff can be judge
by the video code.
But presumably Exynos still relies on the DT properties, so take
good use of mode_fixup() in to achieve the compatibility hacks.
Signed-off-by: Yakir
link_rate and lane_count already configured in analogix_dp_set_link_train(),
so we don't need to config those repeatly after training finished, just
remove them out.
Beside Display Port 1.2 already support 5.4Gbps link rate, the maximum sets
would change from {1.62Gbps, 2.7Gbps} to {1.62Gbps, 2.7G
Fix some obvious alignment problems, like alignment and line
over 80 characters problems, make this easy to be maintained
later.
Signed-off-by: Yakir Yang
Acked-by: Jingoo Han
Reviewed-by: Krzysztof Kozlowski
Tested-by: Javier Martinez Canillas
---
Changes in v12:
- Add the ack from Jingoo
Ch
Split the dp core driver from exynos directory to bridge directory,
and rename the core driver to analogix_dp_*, rename the platform
code to exynos_dp.
Beside the new analogix_dp driver would export six hooks.
"analogix_dp_bind()" and "analogix_dp_unbind()"
"analogix_dp_suspned()" and "analogix_dp
Hi all,
The Samsung Exynos eDP controller and Rockchip RK3288 eDP controller
share the same IP, so a lot of parts can be re-used. I split the common
code into bridge directory, then rk3288 and exynos only need to keep
some platform code. Cause I can't find the exact IP name of exynos dp
contro
On Wed, Dec 23, 2015 at 06:20:33PM +0100, Jean-Francois Moine wrote:
> On Wed, 23 Dec 2015 10:05:34 +
> Liviu Dudau wrote:
>
> > > What was the reason to keep the "ports" node instead of the device?
> >
> > The function is an extract of common code sprinkled through a few DRM
> > drivers,
>
https://bugzilla.kernel.org/show_bug.cgi?id=64661
--- Comment #8 from Jason Schulz ---
(In reply to Austin Robertson from comment #7)
> What versions of the nVidia driver and kernel do you have this working with?
> I've been trying to resolve the same problem.
I am currently using version 4.3.3
On Wed, 23 Dec 2015 10:05:34 +
Liviu Dudau wrote:
> > What was the reason to keep the "ports" node instead of the device?
>
> The function is an extract of common code sprinkled through a few DRM drivers,
> they all used port rather than port->parent.
Sorry for I could find such drivers. Ma
this sort of
error.
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Hi Stephen,
I would like to add the HDLCD DRM driver tree to linux-next. I'm planning
to send a pull request for inclusion into v4.5 and I hope that getting a
wider exposure for a few weeks is beneficial.
Please add the following git tree:
git://linux-arm.org/linux-ld for-upstream/hdlcd
It i
From: Dave Airlie
Seems to get included twice.
Signed-off-by: Dave Airlie
---
drivers/gpu/drm/amd/powerplay/inc/hwmgr.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
index eb0f1b2..f997b8d 100644
--- a/
From: Maruthi Srinivas Bayyavarapu
ACP SRAM banks gets turned on when ACP is powered on.
Not all banks are used for playback/capture. So, power on
required banks during audio device open and power off during
audio device close.
Signed-off-by: Maruthi Bayyavarapu
Reviewed-by: Alex Deucher
Signe
From: Maruthi Srinivas Bayyavarapu
genpd will power off/on ACP to manage runtime ACP PM. ACP runtime PM
hooks are added to get it deinitialized and initialized respectively,
after it is powered off/on.
When system goes to suspend when audio usecase is active, ACP will
be powered off through genp
From: Maruthi Srinivas Bayyavarapu
ACP IP has internal DMA controller with multiple channels which
can be programmed in cyclic/non cyclic manner. ACP can generate
interrupt upon completion of DMA transfer, if required.
The PCM driver provides the platform DMA component to ALSA core.
Signed-off-b
From: Maruthi Srinivas Bayyavarapu
ACP IP have internal DMA controller, DW I2S controller and DSPs
as separate power tiles. DMA and I2S devices are added to generic
pm domain, so that entire IP can be powered off/on at appropriate
times. Unused DSPs are made to be powered off though they are powe
From: Maruthi Bayyavarapu
This adds the ACP (Audio CoProcessor) IP driver and wires
it up to the amdgpu driver. The ACP block provides the DMA
engine for i2s based ALSA driver. This is required for audio
on APUs that utilize an i2s codec.
Acked-by: Christian König
Reviewed-by: Jammy Zhou
Rev
Hardware blocks on the GPU like ACP generate interrupts in
the GPU interrupt controller, but are driven by a separate
driver. Add an irq domain to the GPU driver so that
blocks like ACP can register a Linux interrupt.
Acked-by: Christian König
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/a
This provides an interface to get access to the base address
of PCI resources (MMIO, DOORBELL, etc.). Only MMIO and
DOORBELL are implemented right now. This is necessary to
properly utilize shared drivers on platform devices. IP
modules can use this interface to get the base address
of the resou
This patch set implements support for i2s audio and new AMD GPUs.
The i2s codec is fed by a DMA engine on the GPU. To handle this
we create mfd cells which we hang the i2s codec and DMA engine on.
Because of this, this patch set covers two subsystems: drm and alsa.
The drm patches add support for
Hi Jingoo,
On 12/23/2015 12:24 PM, Yakir Yang wrote:
> Hi Jingoo,
>
> On 12/22/2015 08:26 PM, Jingoo Han wrote:
>> On Wednesday, December 16, 2015 12:58 PM, Yakir Yang wrote:
>>> After test on rockchiop platform, i found sometims driver would failed
>>> at reading EDID message. After debugging mor
Hi Dave,
Just one more patch in drm-misc before I disappear into the swiss alps. I
was a bit on the fence whether this should go into -fixes, but then
figured meh. If it blows up in reality (the linked bug is just our QA) we
can always cherry-pick afterwards.
Cheers, Daniel
The following change
ngl.org/sdk/docs/man/html/glDrawElementsBaseVertex.xhtml
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We were getting build warning:
drivers/gpu/drm/vc4/vc4_validate.c: In function 'validate_gl_shader_rec':
drivers/gpu/drm/vc4/vc4_validate.c:864:4:
warning: format '%d' expects argument of type 'int', but argument 4 has type
'size_t' [-Wformat=]
DRM_ERROR("BO offset overflow (%d + %d > %d)\n",
vb
Hi Dave (and/or Linus, depending on the new arrival and eggnog
schedules) -
Here's a batch of i915 fixes all around. It may be slightly bigger than
one would hope for at this stage, but they've all been through testing
in our -next before being picked up for v4.4. Also, I missed Dave's
fixes pull
Hi Jingoo,
On 12/22/2015 08:26 PM, Jingoo Han wrote:
> On Wednesday, December 16, 2015 12:58 PM, Yakir Yang wrote:
>> After test on rockchiop platform, i found sometims driver would failed
>> at reading EDID message. After debugging more, i found that it's okay
>> to read_a byte from i2c, but it w
Add support for Synopsys DesignWare MIPI DSI controller which is
embedded in the rk3288 SoCs.
Signed-off-by: Chris Zhong
---
Changes in v6.3:
- move the mipi_en gate to ockchip_drm_crtc_mode_config
Changes in v6.2:
- Remove the atomic feature check (Mark Yao)
Changes in v6.1:
- Add atomic API
On 23 December 2015 at 03:38, Liviu Dudau wrote:
> On Fri, Nov 20, 2015 at 02:22:03PM +, Liviu Dudau wrote:
>> Hello,
>>
>> This is v2 of the patchset trying to make drm_of_component_probe() cope with
>> finding
>> both local crtc ports and remote encoder ones. Heiko Stübner was nice
>> eno
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On Tue, 22 Dec 2015 17:38:00 +
Liviu Dudau wrote:
> On Fri, Nov 20, 2015 at 02:22:03PM +, Liviu Dudau wrote:
> > Hello,
> >
> > This is v2 of the patchset trying to make drm_of_component_probe() cope
> > with finding
> > both local crtc ports and remote encoder ones. Heiko Stübner was
On Tue, Dec 22, 2015 at 11:17 PM, Dave Airlie wrote:
> From: Dave Airlie
>
> Seems to get included twice.
>
> Signed-off-by: Dave Airlie
Reviewed-by: Alex Deucher
Do you want to pull this in directly, or should I queue it for my next
pull request?
> ---
> drivers/gpu/drm/amd/powerplay/inc/h
On Wed, Dec 23, 2015 at 2:40 AM, Jani Nikula wrote:
>
>
> git://anongit.freedesktop.org/drm-intel tags/drm-intel-fixes-2015-12-23
Btw, since you're already using tags, mind using *signed* tags
instead? It's just good housekeeping..
Linus
On Wed, Dec 23, 2015 at 2:40 AM, Jani Nikula wrote:
>
> Hi Dave (and/or Linus, depending on the new arrival and eggnog
> schedules) -
I'll pull it directly. Dave just sent me his pending drm fixes, he may
or may not be around any more, it's already christmas eve down under.
Linus
On Tue, Dec 22, 2015 at 04:31:22PM +, Tvrtko Ursulin wrote:
>
> On 22/12/15 14:31, Chris Wilson wrote:
> >On Tue, Dec 22, 2015 at 03:05:14PM +0100, Daniel Vetter wrote:
> >>On Tue, Dec 22, 2015 at 11:37:18AM +0100, Daniel Vetter wrote:
> >>>Hi Dave,
> >>>
> >>>Final 4.5 feature pull for drm/i9
On Wed, Dec 23, 2015 at 10:03:00AM +, Daniel Stone wrote:
> Hi,
>
> On 22 December 2015 at 17:41, Liviu Dudau wrote:
> > The HDLCD controller is a display controller that supports resolutions
> > up to 4096x4096 pixels. It is present on various development boards
> > produced by ARM Ltd and e
Hi Dave,
Today's linux-next merge of the drm tree got a conflict in:
drivers/gpu/drm/i915/intel_display.c
between commit:
57a2af6bbc7a ("drm/i915: Kill intel_crtc->cursor_bo")
from the drm-intel-fixes tree and commit:
6285262259ca ("drm/i915: Only run commit when crtc is active, v2.")
On Wed, Dec 23, 2015 at 10:39:06AM +0100, Jean-Francois Moine wrote:
> On Tue, 22 Dec 2015 17:38:00 +
> Liviu Dudau wrote:
>
> > On Fri, Nov 20, 2015 at 02:22:03PM +, Liviu Dudau wrote:
> > > Hello,
> > >
> > > This is v2 of the patchset trying to make drm_of_component_probe() cope
> >
Hi,
On 22 December 2015 at 17:41, Liviu Dudau wrote:
> The HDLCD controller is a display controller that supports resolutions
> up to 4096x4096 pixels. It is present on various development boards
> produced by ARM Ltd and emulated by the latest Fast Models from the
> company.
I didn't get to tak
On 12/22/2015 08:05 PM, Jingoo Han wrote:
> On Wednesday, December 16, 2015 12:26 PM, Yakir Yang wrote:
>> Fix some obvious alignment problems, like alignment and line
>> over 80 characters problems, make this easy to be maintained
>> later.
>>
>> Signed-off-by: Yakir Yang
>> Reviewed-by: Krzyszt
Hi Jingoo,
Thanks for your respond.
On 12/22/2015 08:09 PM, Jingoo Han wrote:
> On Wednesday, December 16, 2015 12:28 PM, Yakir Yang wrote:
>> link_rate and lane_count already configured in analogix_dp_set_link_train(),
>> so we don't need to config those repeatly after training finished, just
>>
On 12/22/2015 08:13 PM, Jingoo Han wrote:
> On Wednesday, December 16, 2015 12:35 PM, Yakir Yang wrote:
>> After exynos_dp have been split the common IP code into analogix_dp driver,
>> the analogix_dp driver have deprecated some Samsung platform properties which
>> could be dynamically parsed fro
Hi Jingoo,
Thanks for your respond.
On 12/22/2015 08:20 PM, Jingoo Han wrote:
> On Wednesday, December 16, 2015 12:41 PM, Yakir Yang wrote:
>> Add phy driver for the Rockchip DisplayPort PHY module. This
>> is required to get DisplayPort working in Rockchip SoCs.
>>
>> Signed-off-by: Yakir Yang
https://bugzilla.kernel.org/show_bug.cgi?id=64661
Austin Robertson changed:
What|Removed |Added
CC||austinrobertson at gmail.com
--- Comme
Hi Linus,
Not much happening, should have dequeued this lot earlier,
One amdgpu, one nouveau and one exynos fix.
Dave.
The following changes since commit 76b8ebdc4c7a8299e6365428a36cc0fb1c2a4103:
Merge tag 'media/v4.4-3' of
git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media
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