Re: [PATCH v2 4/6] gpu: host1x: Disassemble more instructions

2017-09-05 Thread Dmitry Osipenko
On 05.09.2017 11:10, Mikko Perttunen wrote: > The disassembler for debug dumps was missing some newer host1x opcodes. > Add disassembly support for these. > > Signed-off-by: Mikko Perttunen > --- > drivers/gpu/host1x/hw/debug_hw.c | 57 > --- > drivers/gpu/h

Re: [PATCH v2 1/6] gpu: host1x: Enable Tegra186 syncpoint protection

2017-09-05 Thread Dmitry Osipenko
On 05.09.2017 11:10, Mikko Perttunen wrote: > Since Tegra186 the Host1x hardware allows syncpoints to be assigned to > specific channels, preventing any other channels from incrementing > them. > > Enable this feature where available and assign syncpoints to channels > when submitting a job. Syncp

Re: [PATCH v2 5/6] gpu: host1x: Fix incorrect comment for channel_request

2017-09-05 Thread Dmitry Osipenko
On 05.09.2017 11:10, Mikko Perttunen wrote: > This function actually doesn't sleep in the version that was merged. > > Signed-off-by: Mikko Perttunen > --- > drivers/gpu/host1x/channel.c | 3 +-- > 1 file changed, 1 insertion(+), 2 deletions(-) > > diff --git a/drivers/gpu/host1x/channel.c b/dr

Re: [PATCH v2 6/6] drm/tegra: Use u64_to_user_ptr helper

2017-09-05 Thread Dmitry Osipenko
On 05.09.2017 11:10, Mikko Perttunen wrote: > Use the u64_to_user_ptr helper macro to cast IOCTL argument u64 values > to user pointers instead of writing out the cast manually. > > Signed-off-by: Mikko Perttunen > --- This patch doesn't apply to linux-next, you should probably rebase this serie

Re: [PATCH v2 0/6] Host1x and VIC support for Tegra186

2017-09-05 Thread Mikko Perttunen
On 05.09.2017 14:10, Daniel Vetter wrote: Since this is new hw support, is there also open source userspace using all this? The VIC HW in Tegra186 is backwards compatible with the one in Tegra210, which has open userspace (https://github.com/cyndis/vaapi-tegra-driver), so that userspace shou

[PATCH v3] drm/nouveau/therm: initial implementation of new gp1xx temperature sensor

2017-09-05 Thread Rhys Kidd
v2: - add nv138 and drop nv13b chipsets (Ilia Mirkin) - refactor out status variable and instead mask tsensor (Ilia Mirkin) - switch SHADOWed state message away from nvkm_error() (Ilia Mirkin) - rename internal temperature variable (Karol Herbst) v3: - use nvkm_trace() for SHADOWed state mess

[PATCH 2/2] drm/i915/mst: Use MST sideband message transaction for dpms

2017-09-05 Thread Dhinakaran Pandiyan
Use the POWER_DOWN_PHY and POWER_UP_PHY sideband message trasactions to set power states for downstream sinks. Apart from giving us the ability to set power state for individual sinks, this fixes the below test for me $ xrandr --display :0 --output DP-2-2-8 --off $ xrandr --display :0 --output DP-

[PATCH 1/2] drm/dp/mst: Sideband message transaction to power up/down nodes

2017-09-05 Thread Dhinakaran Pandiyan
The POWER_DOWN_PHY and POWER_UP_PHY sideband message transactions allow the source to reqest any node in a mst path or a whole path to be powered down or up. This allows drivers to target a specific sink in the MST topology, an improvement over just power managing the imediate downstream device. Se

[Bug 101731] System freeze with AMDGPU when playing The Witcher 3

2017-09-05 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=101731 --- Comment #39 from Shmerl --- For the reference, I just tested it with Linux 4.13.0 using amdgpu display code branch from AMD. Unfortunately the freeze still happens with it. -- You are receiving this mail because: You are the assignee for t

[Bug 100596] [BXT/GLK/SKL/KBL/BDW/IVB/HSW/BSW/BYT] gem_userptr_blits/map-fixed-invalidate* showing bad address

2017-09-05 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=100596 Chris Wilson changed: What|Removed |Added Component|DRM/Intel |IGT QA Contact|intel-gfx-bugs@li

[Bug 102552] Null dereference due to not checking return value of util_format_description

2017-09-05 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=102552 --- Comment #2 from Ilia Mirkin --- What format is this happening with? There should be a description for every format, maybe except PIPE_FORMAT_NONE. -- You are receiving this mail because: You are the assignee for the bug.___

[Bug 102553] Venus PRO R9 M265X amdgpu: Kernel OOPS si_dpm_set_power_state unable to handle kernel NULL pointer dereference

2017-09-05 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=102553 Bug ID: 102553 Summary: Venus PRO R9 M265X amdgpu: Kernel OOPS si_dpm_set_power_state unable to handle kernel NULL pointer dereference Product: DRI Version: unsp

Re: [PATCH 2/2] RFC: drm/pl111: Support using the VGA bridge as fallback

2017-09-05 Thread Eric Anholt
Daniel Vetter writes: > On Fri, Sep 01, 2017 at 11:46:29AM +0200, Linus Walleij wrote: >> If we cannot find a panel, assume that the output from the >> PL111 is connected directly to a "dumb" VGA connector, >> so look up the connector from that bridge. >> >> Signed-off-by: Linus Walleij >> ---

[Bug 102552] Null dereference due to not checking return value of util_format_description

2017-09-05 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=102552 Pauk Denis changed: What|Removed |Added CC||pauk.de...@gmail.com --- Comment #1 from P

[Bug 101768] [HSW] [IGT] kms_cursor_legacy@flip-vs-cursor-busy-crc-* produces a GPU hang

2017-09-05 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=101768 --- Comment #5 from Hector Velazquez --- Created attachment 133977 --> https://bugs.freedesktop.org/attachment.cgi?id=133977&action=edit Output (Legacy test) -- You are receiving this mail because: You are the assignee for the bug._

[Bug 101768] [HSW] [IGT] kms_cursor_legacy@flip-vs-cursor-busy-crc-* produces a GPU hang

2017-09-05 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=101768 --- Comment #4 from Hector Velazquez --- Created attachment 133976 --> https://bugs.freedesktop.org/attachment.cgi?id=133976&action=edit Output (Atomic test) -- You are receiving this mail because: You are the assignee for the bug._

[Bug 102552] Null dereference due to not checking return value of util_format_description

2017-09-05 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=102552 Bug ID: 102552 Summary: Null dereference due to not checking return value of util_format_description Product: Mesa Version: git Hardware: x86-64 (AMD64) OS

[Bug 101768] [HSW] [IGT] kms_cursor_legacy@flip-vs-cursor-busy-crc-* produces a GPU hang

2017-09-05 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=101768 --- Comment #3 from Hector Velazquez --- Created attachment 133975 --> https://bugs.freedesktop.org/attachment.cgi?id=133975&action=edit Dmesg.log -- You are receiving this mail because: You are the assignee for the bug.

[Bug 101768] [HSW] [IGT] kms_cursor_legacy@flip-vs-cursor-busy-crc-* produces a GPU hang

2017-09-05 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=101768 --- Comment #2 from Hector Velazquez --- The following tests show new FAIL on HSW Tests List: igt@kms_cursor_legacy@flip-vs-cursor-busy-crc-atomic igt@kms_cursor_legacy@flip-vs-cursor-busy-crc-legacy ==

Re: [PATCH 3/4] drm: Drop drm_get_link_status_name()

2017-09-05 Thread Manasi Navare
On Fri, Sep 01, 2017 at 07:53:27PM +0300, ville.syrj...@linux.intel.com wrote: > From: Ville Syrjälä > > drm_get_link_status_name() isn't used so kill it. > > Fixes the following sparse warning: > drm_connector.c:618:1: warning: symbol 'drm_get_link_status_name' was not > declared. Should it be

[Bug 101160] Venus PRO R9 M265X amdgpu: ring 0 test failed

2017-09-05 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=101160 mercuriete changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Constify load detect mode

2017-09-05 Thread Ville Syrjälä
On Mon, May 22, 2017 at 09:42:01AM +0200, Daniel Vetter wrote: > On Thu, May 18, 2017 at 10:38:37PM +0300, ville.syrj...@linux.intel.com wrote: > > From: Ville Syrjälä > > > > Make the mode used for load detection const, and adjust all relevant > > functions to accept a const mode. > > > > Signe

[Bug 102338] QXL driver causes oops on boot, kernel 4.12

2017-09-05 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=102338 kris...@collabora.co.uk changed: What|Removed |Added Assignee|dri-devel@lists.freedesktop |kris...@collabora.co.uk

Re: [PATCH 1/4] drm/bridge: adv7511: Properly update EDID when no EDID was found

2017-09-05 Thread John Stultz
On Tue, Sep 5, 2017 at 5:10 AM, Lars-Peter Clausen wrote: > Currently adv7511_get_modes() bails out early when no EDID could be > retrieved. This leaves the previous EDID in place, which is typically not > the intended behavior and might confuse applications. Instead the EDID > should be cleared w

[Bug 102338] QXL driver causes oops on boot, kernel 4.12

2017-09-05 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=102338 --- Comment #3 from Takashi Iwai --- (In reply to Takashi Iwai from comment #2) > Now we hit this on openSUSE Tumbleweed, 4.12.9 & later, too. > https://bugs.freedesktop.org/show_bug.cgi?id=102338 Doh, a recursive call. The right one is: h

[Bug 102338] QXL driver causes oops on boot, kernel 4.12

2017-09-05 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=102338 Takashi Iwai changed: What|Removed |Added CC||ti...@suse.de --- Comment #2 from Takash

Re: [PATCH v2 1/2] drm/bridge: add Silicon Image SiI9234 driver

2017-09-05 Thread Laurent Pinchart
Hi Maciej, On Tuesday, 5 September 2017 16:01:54 EEST Maciej Purski wrote: > Hi Laurent, > > Thank you for your reply. The problem was already discussed when adding > sil8620 driver. It can be solved later. I'm CC-ing Andrzej Hajda, as he > used to discuss it with you. I'm afraid it can't be sol

[Bug 101731] System freeze with AMDGPU when playing The Witcher 3

2017-09-05 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=101731 --- Comment #38 from Shmerl --- (In reply to Samuel Pitoiset from comment #37) > No, I can't reproduce the issue with the trace on my system. I should > probably set up a wine install at some point. Let me know if you need a GOG key for TW3. I'

[PATCH v3 1/2] drm/bridge: add Silicon Image SiI9234 driver

2017-09-05 Thread Maciej Purski
SiI9234 transmitter converts eTMDS/HDMI signal to MHL 1.0. It is controlled via I2C bus. Its interaction with other devices in video pipeline is performed mainly on HW level. The only interaction it does on device driver level is filtering-out unsupported video modes, it exposes drm_bridge interfac

[PATCH v3 2/2] ARM: dts: exynos: Add HDMI and Sil9234 to Trats2 board

2017-09-05 Thread Maciej Purski
Add HDMI and Sil9234 MHL converter to Trats2 board. Following in SoC devices have been enabled: - HDMI (HDMI signal encoder), - Mixer (video buffer scanout device), - I2C_5 bus (used for HDMI DDC) - I2C_8 bus (used for HDMI_PHY control). Based on previous work by: Tomasz Stanislawski Signed-off-

[PATCH v3 0/2] add Silicon Image SiI9234 driver

2017-09-05 Thread Maciej Purski
Hi everyone, These patches are a continuation of work by Tomasz Stanislawski on sii9324 driver, which was described in th following letter: https://lists.freedesktop.org/archives/dri-devel/2014-April/057481.html The main differences from the previous code are: * driver moved to /gpu/drm/bridge/

Re: [PATCH 01/14] drm/cirrus: split out bo unpinning from cirrus_bo_push_sysram

2017-09-05 Thread Varad Gautam
Hi Gabriel, On Mon, Sep 4, 2017 at 4:11 PM, Gabriel Krisman Bertazi wrote: > Varad Gautam writes: > > >> int cirrus_bo_push_sysram(struct cirrus_bo *bo) >> { >> int i, ret; >> - if (!bo->pin_count) { >> + >> + ret = cirrus_bo_reserve(bo, false); >> + if (ret) >> +

Re: [PATCH v2 1/2] drm/bridge: add Silicon Image SiI9234 driver

2017-09-05 Thread Maciej Purski
Hi Laurent, Thank you for your reply. The problem was already discussed when adding sil8620 driver. It can be solved later. I'm CC-ing Andrzej Hajda, as he used to discuss it with you. https://patchwork.freedesktop.org/patch/114224/ https://lists.freedesktop.org/archives/dri-devel/2015-Decembe

[PATCH 1/4] drm/bridge: adv7511: Properly update EDID when no EDID was found

2017-09-05 Thread Lars-Peter Clausen
Currently adv7511_get_modes() bails out early when no EDID could be retrieved. This leaves the previous EDID in place, which is typically not the intended behavior and might confuse applications. Instead the EDID should be cleared when no EDID could be retrieved. All functions that are called afte

[PATCH 4/4] drm/bridge: adv7511: Constify HDMI CODEC platform data

2017-09-05 Thread Lars-Peter Clausen
The HDMI codec platform data is global driver state shared by all instances. As such it should not be modified (and is not), to make this explicit declare it as const. Signed-off-by: Lars-Peter Clausen --- drivers/gpu/drm/bridge/adv7511/adv7511_audio.c | 2 +- 1 file changed, 1 insertion(+), 1 d

[PATCH 2/4] drm/bridge: adv7511: Remove private copy of the EDID

2017-09-05 Thread Lars-Peter Clausen
The adv7511 driver keeps a private copy of the EDID in its driver state struct. But this copy is only used in adv7511_get_modes() where it is also retrieved, so there is no need to keep this extra copy around. If a need to access the EDID elsewhere in the driver ever arises the copy that is stored

[PATCH 3/4] drm/bridge: adv7511: Enable connector polling when no interrupt is specified

2017-09-05 Thread Lars-Peter Clausen
Fall back to polling the connector for connect and disconnect events when no interrupt is specified. Otherwise these events will not be noticed and monitor hotplug does not work. Signed-off-by: Lars-Peter Clausen --- drivers/gpu/drm/bridge/adv7511/adv7511_drv.c | 6 +- 1 file changed, 5 inse

[Bug 101731] System freeze with AMDGPU when playing The Witcher 3

2017-09-05 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=101731 --- Comment #37 from Samuel Pitoiset --- (In reply to Shmerl from comment #34) > (In reply to Samuel Pitoiset from comment #27) > > An apitrace that reproduces the issue would be very useful. > > Hi Samuel. Any luck with reproducing or narrowin

[PATCH] drm/exynos/hdmi: Fix unsafe list iteration

2017-09-05 Thread Maciej Purski
Function hdmi_mode_fixup() used bare list_for_each entry, which was unsafe and caused memory corruption detected by kasan. It now uses drm_for_each_connector_iter macro, which is now recommended by the documentation and safe. Signed-off-by: Maciej Purski --- drivers/gpu/drm/exynos/exynos_hdmi.c

Re: [PATCH] drm/ttm: Fix configuration error around populate_and_map() functions

2017-09-05 Thread Christian König
Am 05.09.2017 um 13:32 schrieb Tom St Denis: Fixed kbuild errors when IOMMU/SWIOTLB are disabled. Signed-off-by: Tom St Denis Reviewed-by: Christian König --- drivers/gpu/drm/ttm/ttm_page_alloc.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/ttm/ttm_page_alloc.c

[PATCH] drm/ttm: Fix configuration error around populate_and_map() functions

2017-09-05 Thread Tom St Denis
Fixed kbuild errors when IOMMU/SWIOTLB are disabled. Signed-off-by: Tom St Denis --- drivers/gpu/drm/ttm/ttm_page_alloc.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/ttm/ttm_page_alloc.c b/drivers/gpu/drm/ttm/ttm_page_alloc.c index 6a660d196d87..052e1f102113 100644 ---

Re: [PATCH v2 0/6] Host1x and VIC support for Tegra186

2017-09-05 Thread Daniel Vetter
On Tue, Sep 05, 2017 at 11:43:00AM +0300, Mikko Perttunen wrote: > Hi, > > not many changes in v2: > > Changed address-cells and size-cells for the Host1x device tree node > to have value 1, since all subdevices fit in the lower 4G. Also dropped > the incorrect change about this from the dt-bindi

Re: [PATCH] drm: gma500: fix logic error

2017-09-05 Thread Daniel Vetter
On Tue, Sep 05, 2017 at 09:47:26AM +0200, Arnd Bergmann wrote: > gcc-8 points out a condition that almost certainly doesn't > do what the author had in mind: > > drivers/gpu/drm/gma500/mdfld_intel_display.c: In function > 'mdfldWaitForPipeEnable': > drivers/gpu/drm/gma500/mdfld_intel_display.c:10

Re: [PATCHv7 3/3] ARM:drm ivip Intel FPGA Video and Image Processing Suite

2017-09-05 Thread Daniel Vetter
On Tue, Sep 05, 2017 at 03:12:32PM +0800, Hean-Loong, Ong wrote: > From: Ong Hean Loong > > Driver for Intel FPGA Video and Image Processing Suite Frame Buffer II. > The driver only supports the Intel Arria10 devkit and its variants. > This driver can be either loaded staticlly or in modules. > T

Re: [PATCH v4] drm/bridge/sii8620: add remote control support

2017-09-05 Thread Maciej Purski
Hi Hans, According to my tests, when pressing 'Press and Hold' key, the messages received are always the same until the button is released. The second message is received after ~550 ms and each next message is received every ~100 ms. Regards, Maciej On 27/08/2017 14:40, Hans Verkuil

[Bug 102543] [BAT][HSW] igt@tools_test@tools_test - Unclaimed read from register 0x[4c]400c

2017-09-05 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=102543 Chris Wilson changed: What|Removed |Added Component|DRM/Intel |IGT Assignee|intel-gfx-bugs@li

[PATCH v2 5/6] gpu: host1x: Add Tegra186 support

2017-09-05 Thread Mikko Perttunen
Add support for the implementation of Host1x present on the Tegra186. The register space has been shuffled around a little bit, requiring addition of some chip-specific code sections. Tegra186 also adds several new features, most importantly the hypervisor, but those are not yet supported with this

[PATCH v2 3/6] arm64: tegra: Add VIC on Tegra186

2017-09-05 Thread Mikko Perttunen
Add a node for the Video Image Compositor on the Tegra186. Signed-off-by: Mikko Perttunen --- v2: - Fixed reg property in accordance with changed parent cells. arch/arm64/boot/dts/nvidia/tegra186.dtsi | 12 1 file changed, 12 insertions(+) diff --git a/arch/arm64/boot/dts/nvidia/t

[PATCH v2 2/6] arm64: tegra: Add host1x on Tegra186

2017-09-05 Thread Mikko Perttunen
Add the node for Host1x on the Tegra186, without any subdevices for now. Signed-off-by: Mikko Perttunen --- v2: - Changed address-cells and size-cells to 1 and fixed the ranges property correspondingly. arch/arm64/boot/dts/nvidia/tegra186.dtsi | 18 ++ 1 file changed, 18 inser

[PATCH v2 0/6] Host1x and VIC support for Tegra186

2017-09-05 Thread Mikko Perttunen
Hi, not many changes in v2: Changed address-cells and size-cells for the Host1x device tree node to have value 1, since all subdevices fit in the lower 4G. Also dropped the incorrect change about this from the dt-bindings patch. Thanks to Rob for pointing this out. Mikko Notes for v1: Hi every

[PATCH v2 1/6] arm64: tegra: Add #power-domain-cells for BPMP

2017-09-05 Thread Mikko Perttunen
Add #power-domain-cells for the BPMP node on Tegra186 so that the power domain provider may be used. Signed-off-by: Mikko Perttunen --- arch/arm64/boot/dts/nvidia/tegra186.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi b/arch/arm64/boot/dts/nvi

[PATCH v2 6/6] drm/tegra: Add Tegra186 support for VIC

2017-09-05 Thread Mikko Perttunen
Add Tegra186 support for VIC - no changes are required except for new firmware and compatibility string. Signed-off-by: Mikko Perttunen --- drivers/gpu/drm/tegra/drm.c | 1 + drivers/gpu/drm/tegra/vic.c | 10 ++ 2 files changed, 11 insertions(+) diff --git a/drivers/gpu/drm/tegra/drm.c

[PATCH v2 4/6] dt-bindings: host1x: Add Tegra186 information

2017-09-05 Thread Mikko Perttunen
Add the Tegra186-specific hypervisor-related register range properties. Signed-off-by: Mikko Perttunen --- v2: - Dropped incorrect note about cells properties. .../devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt | 4 1 file changed, 4 insertions(+) diff --git a/Document

[PATCH] drm: exynos: include linux/irq.h

2017-09-05 Thread Arnd Bergmann
I ran into a build error on x86: drivers/gpu/drm/exynos/exynos5433_drm_decon.c: In function 'decon_conf_irq': drivers/gpu/drm/exynos/exynos5433_drm_decon.c:706:2: error: implicit declaration of function 'irq_set_status_flags'; did you mean 'dquot_state_flag'? [-Werror=implicit-function-declarati

[PATCH v2 2/6] gpu: host1x: Enable gather filter

2017-09-05 Thread Mikko Perttunen
The gather filter is a feature present on Tegra124 and newer where the hardware prevents GATHERed command buffers from executing commands normally reserved for the CDMA pushbuffer which is maintained by the kernel driver. This commit enables the gather filter on all supporting hardware. Signed-of

[PATCH v2 4/6] gpu: host1x: Disassemble more instructions

2017-09-05 Thread Mikko Perttunen
The disassembler for debug dumps was missing some newer host1x opcodes. Add disassembly support for these. Signed-off-by: Mikko Perttunen --- drivers/gpu/host1x/hw/debug_hw.c | 57 --- drivers/gpu/host1x/hw/debug_hw_1x01.c | 3 +- drivers/gpu/host1x/hw/debug

[PATCH v2 1/6] gpu: host1x: Enable Tegra186 syncpoint protection

2017-09-05 Thread Mikko Perttunen
Since Tegra186 the Host1x hardware allows syncpoints to be assigned to specific channels, preventing any other channels from incrementing them. Enable this feature where available and assign syncpoints to channels when submitting a job. Syncpoints are currently never unassigned from channels since

[PATCH v2 6/6] drm/tegra: Use u64_to_user_ptr helper

2017-09-05 Thread Mikko Perttunen
Use the u64_to_user_ptr helper macro to cast IOCTL argument u64 values to user pointers instead of writing out the cast manually. Signed-off-by: Mikko Perttunen --- drivers/gpu/drm/tegra/drm.c | 18 ++ 1 file changed, 10 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm

[PATCH v2 0/6] Miscellaneous improvements to Host1x and TegraDRM

2017-09-05 Thread Mikko Perttunen
New in v2: - Changes in syncpoint protection and u64_to_user_ptr patches. See the patches for notes. - Added patch to support more opcodes in the debug dump disassembly. - Added patch to fix an incorrect comment. Thanks, Mikko Patch v1 notes: Hi all, here are some new features and improvem

[PATCH v2 5/6] gpu: host1x: Fix incorrect comment for channel_request

2017-09-05 Thread Mikko Perttunen
This function actually doesn't sleep in the version that was merged. Signed-off-by: Mikko Perttunen --- drivers/gpu/host1x/channel.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/gpu/host1x/channel.c b/drivers/gpu/host1x/channel.c index db9b91d1384c..2fb93c27c1d9

[PATCH v2 3/6] gpu: host1x: Improve debug disassembly formatting

2017-09-05 Thread Mikko Perttunen
The host1x driver prints out "disassembly" dumps of the command FIFO and gather contents on submission timeouts. However, the output has been quite difficult to read with unnecessary newlines and occasional missing parentheses. Fix these problems by using pr_cont to remove unnecessary newlines and

[PATCH] drm: gma500: fix logic error

2017-09-05 Thread Arnd Bergmann
gcc-8 points out a condition that almost certainly doesn't do what the author had in mind: drivers/gpu/drm/gma500/mdfld_intel_display.c: In function 'mdfldWaitForPipeEnable': drivers/gpu/drm/gma500/mdfld_intel_display.c:102:37: error: bitwise comparison always evaluates to false [-Werror=tautolo

[PATCHv7 3/3] ARM:drm ivip Intel FPGA Video and Image Processing Suite

2017-09-05 Thread Hean-Loong, Ong
From: Ong Hean Loong Driver for Intel FPGA Video and Image Processing Suite Frame Buffer II. The driver only supports the Intel Arria10 devkit and its variants. This driver can be either loaded staticlly or in modules. The OF device tree binding is located at: Documentation/devicetree/bindings/di

[PATCHv7 2/3] ARM:socfpga-defconfig Intel FPGA Video and Image Processing Suite

2017-09-05 Thread Hean-Loong, Ong
From: Ong Hean Loong Intel FPGA Video and Image Processing Suite Frame Buffer II driver config for Arria 10 devkit and its variants Signed-off-by: Ong, Hean Loong --- arch/arm/configs/socfpga_defconfig | 6 ++ 1 file changed, 6 insertions(+) diff --git a/arch/arm/configs/socfpga_defconfig

[PATCHv7] ARM:dt-bindings:display Intel FPGA Video and Image Processing Suite

2017-09-05 Thread Hean-Loong, Ong
From: Ong Hean Loong Device tree binding for Intel FPGA Video and Image Processing Suite. The binding involved would be generated from the Altera (Intel) Qsys system. The bindings would set the max width, max height and memory port width. The device tree binding only supports the Intel Arria10 de

[PATCHv7 0/3] Intel FPGA Video and Image Processing Suite

2017-09-05 Thread Hean-Loong, Ong
From: Ong Hean Loong The FPGA FrameBuffer Soft IP could be seen as the GPU and the DRM driver patch here is allocating memory for information to be streamed from the ARM/Linux to the display port. Basically the driver just wraps the information such as the pixels to be drawn by the FPGA FrameBuf