https://bugs.freedesktop.org/show_bug.cgi?id=104806
Dennis Schridde changed:
What|Removed |Added
See Also||https://bugs.freedesktop.or
https://bugs.freedesktop.org/show_bug.cgi?id=104831
Dennis Schridde changed:
What|Removed |Added
See Also||https://bugs.freedesktop.or
On Tue 30-01-18 02:56:51, He, Roger wrote:
> Hi Michal:
>
> We need a API to tell TTM module the system totally has how many swap
> cache. Then TTM module can use it to restrict how many the swap cache
> it can use to prevent triggering OOM. For Now we set the threshold of
> swap size TTM used a
Ville,
On 2018-01-26 18:43, Ville Syrjälä wrote:
>> I'm not sure if I understand the problem. This series does the following
>> in essence:
>>
>> drm_atomic_helper_check(...)
>> {
>> /* does A */
>> }
>>
>> driver_hand_rolled_atomic_helper_check(...)
>> {
>> /* does A */
>> }
>>
>> - .at
On 29/01/18 18:38, Boris Brezillon wrote:
> Note that the TX byte clk should be configured to match the DPI pixel
> clock, which means we should refuse any config where the variation is
> too big to be recovered. Anyway, we still don't have a way to configure
> the PLL rate (which is driving the T
On Mon, Jan 29, 2018 at 12:02 PM, Sean Paul wrote:
> On Thu, Jan 25, 2018 at 09:23:45PM -0800, John Stultz wrote:
>> On Wed, Jan 24, 2018 at 7:46 AM, Sean Paul wrote:
>> > On Tue, Jan 23, 2018 at 03:16:37PM -0800, John Stultz wrote:
>> >> +}
>> >> +#else /* HIKEY960 case*/
>> >> +uint32_t HisiImp
On Fri, Jan 26, 2018 at 10:33 AM, Emil Velikov wrote:
> Hi all,
>
> Couple of ideas/notes,
>
> On 10 January 2018 at 20:36, Rob Herring wrote:
>> On Wed, Jan 10, 2018 at 1:09 PM, John Stultz wrote:
>>> On Wed, Jan 10, 2018 at 5:48 AM, Rob Herring wrote:
On Tue, Jan 9, 2018 at 11:25 PM, Joh
get_nr_swap_pages is the only API we can accessed from other module now.
It can't cover the case of the dynamic swap size increment.
I mean: user can use "swapon" to enable new swap file or swap disk
dynamically or "swapoff" to disable swap space.
Above is why we always to
Linus Walleij writes:
> On Thu, Jan 25, 2018 at 4:46 AM, Eric Anholt wrote:
>
>>> + pl111_choose_max_resolution(dev, priv->memory_bw,
>>> + &mode_config->max_width,
>>> + &mode_config->max_height, &bpp);
>>> + dev_info(dev->
Linus Walleij writes:
> The Versatile PL110 implementations use multiple endpoints:
> from the PL111 port, the lines are routed through a PLD,
> and from there forked so the same lines go to a VGA DAC and
> an external TFT panel connector. This is discrete wireing
> so there is no way to turn of
Linus Walleij writes:
> With a bit of refactoring we can contain the variant data for
> the "PL110+" version that is somewhere inbetween PL110 and PL111.
> This is used on the ARM Versatile AB and Versatile PB.
Patch 2-3 are:
Reviewed-by: Eric Anholt
signature.asc
Description: PGP signature
Linus Walleij writes:
> When attaching the CMA framebuffer we need to check for
> returned error pointers.
This doesn't seem to be necessary on drm-misc-next.
signature.asc
Description: PGP signature
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Hi Michal:
We need a API to tell TTM module the system totally has how many swap cache.
Then TTM module can use it to restrict how many the swap cache it can use to
prevent triggering OOM.
For Now we set the threshold of swap size TTM used as 1/2 * total size and
leave the rest for others use.
在 2018/1/26 21:16, Thierry Escande 写道:
From: zain wang
Add a lock to vop to avoid disabling the crtc while waiting for a line
flag while enabling psr. If we disable in the middle of waiting for the
line flag, we'll end up timing out or worse.
Signed-off-by: zain wang
Signed-off-by: Sean Pau
在 2018/1/26 21:16, Thierry Escande 写道:
From: Ørjan Eide
When mapping external DMA-bufs through the PRIME mmap call, we might be
given an offset which has to be respected. However for the internal DRM
GEM mmap path, we have to ignore the fake mmap offset used to identify
the buffer only. Curre
在 2018/1/26 21:16, Thierry Escande 写道:
From: Haixia Shi
The prime fd to handle ioctl was not used with rockchip before. Support
was added in order to pass graphics_Gbm and to support potential uses
within Chrome OS (e.g. zero-copy video decode, camera).
Signed-off-by: Haixia Shi
Signed-off-
在 2018/1/26 21:16, Thierry Escande 写道:
From: Tomasz Figa
This patch removes unused fields from vop structure.
Signed-off-by: Tomasz Figa
Signed-off-by: Sean Paul
Signed-off-by: Thierry Escande
---
drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 5 -
1 file changed, 5 deletions(-)
di
https://bugs.freedesktop.org/show_bug.cgi?id=37474
Ben Crocker changed:
What|Removed |Added
Status|NEW |NEEDINFO
--- Comment #2 from Ben Crocker
https://bugs.freedesktop.org/show_bug.cgi?id=104660
Andy Furniss changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolution|---
https://bugs.freedesktop.org/show_bug.cgi?id=104806
Matt Turner changed:
What|Removed |Added
Blocks||104757
Referenced Bugs:
https://bugs.fr
On Mon, Jan 22, 2018 at 04:35:47PM +0100, Philippe Cornu wrote:
> In the dsi panel example, clock names in the "clock-names"
> field have been swapped:
> * "pclk" (peripheral clock) is <&rcc 1 CLK_F469_DSI> on stm32f4
> * "ref" (dsi phy pll ref clock) is <&clk_hse> on stm32f4
>
> Signed-off-by: Ph
On Mon, Jan 29, 2018 at 5:35 PM, wrote:
> On Mon, Jan 29, 2018 at 03:40:34PM -0500, Alex Deucher wrote:
>> On Mon, Jan 29, 2018 at 3:34 PM, wrote:
>> > As far as I can remember, not for the new features ofc, DCE programming
>> > for GCN1
>> > is very similar if not mostly the same than DCE pro
That's right, there's still more power saving to go! Starting with
kepler 2, nvidia hardware has an additional level of clockgating known
as second level clockgating. The details of this are not exact, but it
seems to work by waiting for a collection of dependent hardware blocks
to be gated before
Same as the previous patch, but for Kepler2 now
Signed-off-by: Lyude Paul
---
drivers/gpu/drm/nouveau/include/nvkm/subdev/fb.h | 1 +
drivers/gpu/drm/nouveau/nvkm/engine/device/base.c | 8 +--
drivers/gpu/drm/nouveau/nvkm/engine/gr/gk110.c| 62
drivers/gpu/drm/nouveau
This adds the NvPmEnableGating config option to nouveau, which can be
used to enable or disable clockgating for supported chipsets. Enabling
can be done by passing
config=NvPmEnableGating=1
To nouveau. If your chipset supports it, you'll see a message in your
kernel log indicating that cl
This enables BLCG optimization for kepler1. When using clockgating,
nvidia's firmware has a set of registers which are initially programmed
by the vbios with various engine delays and other mysterious settings
that are safe enough to bring up the GPU. However, the values used by
the vbios are more
Next version of my patchseries for adding clockgating support for
kepler1 and 2 on nouveau. The first version of this series can be found
here:
https://patchwork.freedesktop.org/series/36504/
One small change:
- Set therm->clkgate_enabled to false until the last patch, where we
introduce the
This adds support for enabling automatic clockgating on nvidia GPUs for
Kepler1. While this is not technically a clockgating level, it does
enable clockgating using the clockgating values initially set by the
vbios (which should be safe to use).
This introduces two therm helpers for controlling ba
On Mon, Jan 29, 2018 at 03:40:34PM -0500, Alex Deucher wrote:
> On Mon, Jan 29, 2018 at 3:34 PM, wrote:
> > As far as I can remember, not for the new features ofc, DCE programming for
> > GCN1
> > is very similar if not mostly the same than DCE programming for GCN1.1/2
> > which
> > is supporte
On Fri, Jan 26, 2018 at 02:16:27PM +0100, Thierry Escande wrote:
> Hi,
>
> This patchset includes cleanups, improvements, and bug fixes for
> Rockchip DRM driver and PSR support.
>
> this patchset depends and needs to be applied on top of Rockchip rk3399
> eDP support [1].
>
> [1] https://lkml.o
On Fri, Jan 26, 2018 at 02:17:04PM +0100, Thierry Escande wrote:
> From: "Kristian H. Kristensen"
>
> To improve PSR exit latency, we speculatively start exiting when we
> receive input events. Occasionally, this may lead to false positives,
> but most of the time we get a head start on coming ou
On Fri, Jan 26, 2018 at 02:16:56PM +0100, Thierry Escande wrote:
> From: zain wang
>
> It's too early to detect fast link training, if other step after it
> failed, we will set fast_link flag to 1, and retry set_bridge again. In
> this case we will power down and power up panel power supply, and
On Fri, Jan 26, 2018 at 02:16:55PM +0100, Thierry Escande wrote:
> From: zain wang
>
> Register ANALOGIX_DP_FUNC_EN_1(offset 0x18), Rockchip is different to
> Exynos:
>
> on Exynos edp phy,
> BIT 7 MASTER_VID_FUNC_EN_N
> BIT 6 reserved
> BIT 5 SLAVE_VID_FUNC_EN_N
>
> on
On Mon, Jan 29, 2018 at 04:14:41PM -0500, Sean Paul wrote:
> On Fri, Jan 26, 2018 at 02:16:49PM +0100, Thierry Escande wrote:
> > From: Lin Huang
> >
> > We need to check the dpcd write/read return value to see whether the
> > write/read was successful
> >
> > Cc: Kristian H. Kristensen
> > Sig
On Fri, Jan 26, 2018 at 02:16:51PM +0100, Thierry Escande wrote:
> From: Lin Huang
>
> AUX errors are caused by many different reasons. We may not know what
> happened in aux channel on failure, so let's reset aux channel if some
> errors occurred.
>
> Cc: 征增 王
> Cc: Douglas Anderson
> Signed-
The series is Reviewed-by: Felix Kuehling
Regards,
Felix
On 2018-01-29 08:55 AM, Tom St Denis wrote:
> Various TTM cleanups (mostly no functional changes).
>
> Notably patch #1 fixes a bug in the access_kmap() function.
>
> The rest are either coding style fixes or simplifications.
>
>
>
On Fri, Jan 26, 2018 at 02:16:49PM +0100, Thierry Escande wrote:
> From: Lin Huang
>
> We need to check the dpcd write/read return value to see whether the
> write/read was successful
>
> Cc: Kristian H. Kristensen
> Signed-off-by: Lin Huang
> Signed-off-by: zain wang
> Signed-off-by: Douglas
On Fri, Jan 26, 2018 at 02:16:47PM +0100, Thierry Escande wrote:
> From: Lin Huang
>
> There was a 1ms delay to detect the hpd signal, which is too short to
> detect a short pulse. This patch extends this delay to 100ms.
The commit message doesn't align with the code here. The code below matches
On Fri, Jan 26, 2018 at 02:16:28PM +0100, Thierry Escande wrote:
> From: Tomasz Figa
>
> This patch removes unused fields from vop structure.
>
> Signed-off-by: Tomasz Figa
> Signed-off-by: Sean Paul
> Signed-off-by: Thierry Escande
Reviewed-by: Sean Paul
> ---
> drivers/gpu/drm/rockchip
On Mon, Jan 29, 2018 at 3:34 PM, wrote:
> On Mon, Jan 29, 2018 at 02:39:53PM -0500, Alex Deucher wrote:
>> On Mon, Jan 29, 2018 at 2:31 PM, wrote:
>> > On Mon, Jan 29, 2018 at 01:58:46PM -0500, Alex Deucher wrote:
>> >> It's similar, but there is still a bunch of DCE specific code. No one
>> >
On Mon, Jan 29, 2018 at 02:39:53PM -0500, Alex Deucher wrote:
> On Mon, Jan 29, 2018 at 2:31 PM, wrote:
> > On Mon, Jan 29, 2018 at 01:58:46PM -0500, Alex Deucher wrote:
> >> It's similar, but there is still a bunch of DCE specific code. No one
> >> has written that DC code for DCE 6 yet. One c
On Thu, Jan 18, 2018 at 10:23:55AM +0530, Archit Taneja wrote:
> Add binding info for peripherals that support dual-channel DSI. Add
> corresponding optional bindings for DSI host controllers that may
> be configured in this mode. Add an example of an I2C controlled
> device operating in dual-chann
On Tue, Nov 14, 2017 at 08:32:48PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> I recently realized that we're not validating the mode flags/type
> passed in from userspace. Let's try to fix that.
>
> I'd also like to entirely eliminate some of the more crazy mode flags.
> PIXMUX and BC
On Mon, Jan 29, 2018 at 12:26:00PM +0200, Laurent Pinchart wrote:
> Hi Kieran,
>
> Thank you for the patch.
>
> On Monday, 22 January 2018 14:50:00 EET Kieran Bingham wrote:
> > The ADV7511 has four 256-byte maps that can be accessed via the main I²C
> > ports. Each map has it own I²C address and
On Mon, Jan 22, 2018 at 12:50:01PM +, Kieran Bingham wrote:
> The ADV7511 has four 256-byte maps that can be accessed via the main I²C
> ports. Each map has it own I²C address and acts as a standard slave
> device on the I²C bus.
>
> Allow a device tree node to override the default addresses s
On Thu, Jan 18, 2018 at 10:23:54AM +0530, Archit Taneja wrote:
> Add a section that describes dt-bindings for peripherals that support
> MIPI DSI, but have a different bus as the primary control bus, or no
> control bus at all. Add an example for a peripheral with a non-DSI
> control bus.
>
> Sign
On Mon, Jan 22, 2018 at 12:49:56PM +, Kieran Bingham wrote:
> From: Jean-Michel Hautbois
>
> The ADV7604 has thirteen 256-byte maps that can be accessed via the main
> I²C ports. Each map has it own I²C address and acts as a standard slave
> device on the I²C bus.
>
> Allow a device tree nod
On Thu, Jan 25, 2018 at 09:23:45PM -0800, John Stultz wrote:
> On Wed, Jan 24, 2018 at 7:46 AM, Sean Paul wrote:
> > On Tue, Jan 23, 2018 at 03:16:37PM -0800, John Stultz wrote:
> >> +#ifdef HIKEY
> >> +uint32_t HisiImporter::ConvertHalFormatToDrm(uint32_t hal_format) {
> >> + switch (hal_format)
On Fri, Jan 19, 2018 at 09:29:20PM +0300, Sergei Shtylyov wrote:
> Document the R-Car V3M (R8A77970) SoC in the R-Car LVDS bindings.
>
> Signed-off-by: Sergei Shtylyov
>
> ---
> Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt |1 +
> 1 file changed, 1 insertion(+)
Reviewe
On Fri, Jan 19, 2018 at 05:13:42PM +0530, Vivek Gautam wrote:
> qcom,smmu-v2 is an arm,smmu-v2 implementation with specific
> clock and power requirements. This smmu core is used with
> multiple masters on msm8996, viz. mdss, video, etc.
> Add bindings for the same.
>
> Signed-off-by: Vivek Gautam
On Mon, Jan 29, 2018 at 2:31 PM, wrote:
> On Mon, Jan 29, 2018 at 01:58:46PM -0500, Alex Deucher wrote:
>> It's similar, but there is still a bunch of DCE specific code. No one
>> has written that DC code for DCE 6 yet. One could use the DC DCE8
>> code as a guide, but it still has to be done.
On 01/29/2018 10:02 PM, Rob Herring wrote:
>> Document the R-Car V3M (R8A77970) SoC in the R-Car DU bindings.
>>
>> Signed-off-by: Sergei Shtylyov
>>
>> ---
>> Changes in version 2:
>> - documented R8A77970 DU ports;
>> - patch split from the main R8A77970 DU support patch.
>>
>> Documentation/
On Mon, Jan 29, 2018 at 01:58:46PM -0500, Alex Deucher wrote:
> It's similar, but there is still a bunch of DCE specific code. No one
> has written that DC code for DCE 6 yet. One could use the DC DCE8
> code as a guide, but it still has to be done.
I have not checked the new code, but does it m
Hi Lee,
Here's the pull request for Meghana's patch set. It's based on 4.15, and just
contains the backlight portion of the set. I couldn't include the rest as it
depends on patches that only exist in drm-misc-next atm.
Thanks for coordinating with me on this!
topic/backlight_for_lag-2018-01-29
On Fri, Jan 19, 2018 at 12:05:58AM +0300, Sergei Shtylyov wrote:
> Document the R-Car V3M (R8A77970) SoC in the R-Car DU bindings.
>
> Signed-off-by: Sergei Shtylyov
>
> ---
> Changes in version 2:
> - documented R8A77970 DU ports;
> - patch split from the main R8A77970 DU support patch.
>
>
On Mon, Jan 29, 2018 at 1:45 PM, wrote:
> On Mon, Jan 29, 2018 at 01:04:08PM -0500, Alex Deucher wrote:
>> On Mon, Jan 29, 2018 at 12:56 PM, wrote:
>> > Hi,
>> >
>> > I'm an owner of tahiti xt gpu, and I wonder what are the reasons the new
>> > display code is not available for gcn1 hardware?
>
On Fri, Jan 12, 2018 at 11:51:34AM +0530, Nautiyal, Ankit K wrote:
> From: Ankit Nautiyal
>
> We parse the EDID and add all the modes in the connector's
> modelist. This adds CEA modes with aspect ratio information
> too, regadless of if user space requested this information or
> not.
>
> This p
On Fri, Jan 12, 2018 at 11:51:33AM +0530, Nautiyal, Ankit K wrote:
> From: Ankit Nautiyal
>
> If the user mode does not support aspect-ratio, and requests for
> a modeset, then the flag bits representing aspect ratio in the
> given user-mode must be rejected.
> Similarly, while preparing a user-m
On Thu, Jan 18, 2018 at 10:23:54AM +0530, Archit Taneja wrote:
> Add a section that describes dt-bindings for peripherals that support
> MIPI DSI, but have a different bus as the primary control bus, or no
> control bus at all. Add an example for a peripheral with a non-DSI
> control bus.
>
> Sign
https://bugs.freedesktop.org/show_bug.cgi?id=103107
--- Comment #12 from Ricardo Perez ---
This tests continue failing on CFL QA
igt@gem_ctx_param@invalid-param-get
igt@gem_ctx_param@invalid-param-set
IGT-Version: 1.21-g37bd27f (x86_64) (Linux:
4.15.0-rc9-drm-intel-qa-ww4-commit-59275f1+ x86_64
On Mon, Jan 29, 2018 at 01:04:08PM -0500, Alex Deucher wrote:
> On Mon, Jan 29, 2018 at 12:56 PM, wrote:
> > Hi,
> >
> > I'm an owner of tahiti xt gpu, and I wonder what are the reasons the new
> > display code is not available for gcn1 hardware?
>
> No one has written the code.
I don't underst
On Wed, Jan 17, 2018 at 09:14:15PM +0100, Jernej Skrabec wrote:
> This commit adds all necessary compatibles and descriptions needed to
> implement A83T HDMI pipeline.
>
> Mixer is already properly described, so only compatible is added.
>
> However, A83T TV TCON, which is connected to HDMI, does
On Mon, Jan 29, 2018 at 12:56 PM, wrote:
> Hi,
>
> I'm an owner of tahiti xt gpu, and I wonder what are the reasons the new
> display code is not available for gcn1 hardware?
No one has written the code.
Alex
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Hi,
I'm an owner of tahiti xt gpu, and I wonder what are the reasons the new
display code is not available for gcn1 hardware?
regards,
--
Sylvain
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https://bugs.freedesktop.org/show_bug.cgi?id=104834
Jani Nikula changed:
What|Removed |Added
Component|General |DRM/Intel
CC|
On Thu, Jan 25, 2018 at 10:12:52AM -0500, Harry Wentland wrote:
> On 2018-01-25 08:30 AM, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > We use 32bit bitmasks to track planes/crtcs/encoders/connectors.
> > Naturally we can only do that if the index of those objects stays
> > below 32. Issue
On Wed, Jan 17, 2018 at 03:04:48PM +0530, Archit Taneja wrote:
> SDM845 uses a newer revision (v2.0+) of the 6G DSI controller. This
> revision has another clock input at the block boundary called the byte
> interface clock. Specify this new clock in the binding.
>
> A 10nm DSI PHY is used along w
On Wed, Jan 17, 2018 at 03:04:47PM +0530, Archit Taneja wrote:
> Add the compatible string for 14nm DSI PHY (used in MSM8996/APQ8096).
> From 14nm PHY onwards, the "dsi_phy_regulator" reg-name is not required,
> but "dsi_phy_lane" reg-name is. Update the doc to specify the reg-names
> each PHY revi
On Wed, Jan 17, 2018 at 03:04:46PM +0530, Archit Taneja wrote:
> The PHY regulator supply names vary across different PHY versions.
> Mention explicitly which PHYs require which supplies.
>
> Cc: Rob Herring
> Cc: devicet...@vger.kernel.org
> Signed-off-by: Archit Taneja
> ---
> Documentation/d
On Wed, Jan 17, 2018 at 03:04:45PM +0530, Archit Taneja wrote:
> "qcom,dsi-host-index" and "qcom,dsi-phy-index" DT props aren't
> acceptable and have never been used in any DT files. Remove them.
>
> Cc: Rob Herring
> Cc: devicet...@vger.kernel.org
> Signed-off-by: Archit Taneja
> ---
> Documen
Hi Tomi,
On Mon, 29 Jan 2018 16:29:21 +0200
Tomi Valkeinen wrote:
> On 18/01/18 15:43, Boris Brezillon wrote:
> > Add a driver for Cadence DPI -> DSI bridge.
> >
> > This driver only support a subset of Cadence DSI bridge capabilities.
> >
> > Here is a non-exhaustive list of missing features:
On Mon 29-01-18 16:29:42, Roger He wrote:
> ttm module needs it to determine its internal parameter setting.
Could you be more specific why?
> Signed-off-by: Roger He
> ---
> include/linux/swap.h | 6 ++
> mm/swapfile.c| 15 +++
> 2 files changed, 21 insertions(+)
>
>
https://bugs.freedesktop.org/show_bug.cgi?id=104611
--- Comment #7 from Harry Wentland ---
Did you have a chance to capture a repro dmesg with dc_log=1?
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https://bugs.freedesktop.org/show_bug.cgi?id=104274
--- Comment #5 from Harry Wentland ---
Can you try with the latest amd-staging-drm-next from
https://cgit.freedesktop.org/~agd5f/linux/log/?h=amd-staging-drm-next
We just fixed a bunch of driver unload issues. It should be fixed now.
--
You a
https://bugs.freedesktop.org/show_bug.cgi?id=104825
--- Comment #1 from Harry Wentland ---
This patch https://patchwork.freedesktop.org/patch/198719/ should fix it, but
there could be some other issues as well.
amd-staging-drm-next has fixes for a whole bunch of driver unload issues,
including w
Updated IGT results seem sane:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7698/shards.html
Would someone be able to apply this patch?
Thanks,
Leo
On 2018-01-17 03:18 PM, Sean Paul wrote:
On Wed, Jan 17, 2018 at 10:39 AM, Maarten Lankhorst
wrote:
Op 17-01-18 om 19:29 schreef Sean Paul
In dma_fence_release() there is a WARN_ON which could be triggered by
several cases of wrong dma-fence usage. This patch adds a comment to
explain two use-cases to help driver developers that use dma-fence
and trigger that WARN_ON to better understand the reasons for it.
Signed-off-by: Oded Gabbay
On Monday, 2018-01-29 14:56:04 +, Emil Velikov wrote:
> From: Emil Velikov
>
> Otherwise we'll end up without the macros set during configure stage.
> And effectively error out in sanity tests such as the mmap static
> assert.
>
> To reproduce, do a multilib build - 32bit build on 64bit mach
https://bugs.freedesktop.org/show_bug.cgi?id=104281
--- Comment #9 from Alex Deucher ---
The commit that broke it was:
commit ca37e57bbe0cf1455ea3e84eb89ed04a132d59e1 (refs/bisect/bad)
Author: Andy Lutomirski
Date: Wed Nov 22 20:39:16 2017 -0800
x86/entry/64: Add missing irqflags tracing
From: Emil Velikov
Otherwise we'll end up without the macros set during configure stage.
And effectively error out in sanity tests such as the mmap static
assert.
To reproduce, do a multilib build - 32bit build on 64bit machine.
Cc: Fabio Pedretti
Cc: Andrey Grodzovsky
Fixes: 33dcc29f7cc ("am
https://bugs.freedesktop.org/show_bug.cgi?id=104819
--- Comment #4 from Emil Velikov ---
(In reply to Eric Engestrom from comment #3)
> I think you might be hitting a bug combining C++ compilers trying to compile
> C and autotools not being smart enough.
> What happens if you try to build using M
https://bugs.freedesktop.org/show_bug.cgi?id=104819
--- Comment #3 from Eric Engestrom ---
I think you might be hitting a bug combining C++ compilers trying to compile C
and autotools not being smart enough.
What happens if you try to build using Meson?
(If you've never used Meson before, Mesa h
On Mon, Jan 29, 2018 at 4:11 AM, Lee Jones wrote:
> On Fri, 26 Jan 2018, Randy Dunlap wrote:
>
>> On 01/26/2018 01:48 AM, Lee Jones wrote:
>> > On Wed, 24 Jan 2018, Meghana Madhyastha wrote:
>> >
>> >> Add of_find_backlight, a helper function which is a generic version
>> >> of tinydrm_of_find_bac
https://bugs.freedesktop.org/show_bug.cgi?id=104837
Michel Dänzer changed:
What|Removed |Added
Version|XOrg git|unspecified
Product|DRI
Am 29.01.2018 um 15:31 schrieb Michel Dänzer:
On 2018-01-29 02:55 PM, Tom St Denis wrote:
The buf pointer was not being incremented inside the loop
meaning the same block of data would be read or written
repeatedly.
Signed-off-by: Tom St Denis
Reviewed-by: Christian König
Please add:
Cc: st
On 2018-01-29 02:55 PM, Tom St Denis wrote:
> The buf pointer was not being incremented inside the loop
> meaning the same block of data would be read or written
> repeatedly.
>
> Signed-off-by: Tom St Denis
> Reviewed-by: Christian König
Please add:
Cc: sta...@vger.kernel.org
Fixes: 09ac4fcb3
https://bugs.freedesktop.org/show_bug.cgi?id=104819
--- Comment #2 from Fabio Pedretti ---
Note I am compiling the drm source from git. The same source builds fine on
newer Ubuntu. Maybe it's something broken/old in the ubuntu 16.04 toolchain?
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On 18/01/18 15:43, Boris Brezillon wrote:
> Add a driver for Cadence DPI -> DSI bridge.
>
> This driver only support a subset of Cadence DSI bridge capabilities.
>
> Here is a non-exhaustive list of missing features:
> * burst mode
> * DPHY init/configuration steps
> * support for additional i
On Mon, 29 Jan 2018 15:59:33 +0200
Tomi Valkeinen wrote:
> On 29/01/18 15:14, Boris Brezillon wrote:
>
> >> You don't disable the dsi_sys_clk neither in the ok nor in the error
> >> paths.
> >
> > Hm, it shouldn't be enabled in the first place: the runtime resume
> > hook takes care of enabl
https://bugs.freedesktop.org/show_bug.cgi?id=104837
Bug ID: 104837
Summary: 'radeonsi: Failed to create context' with 32 bit
applications
Product: DRI
Version: XOrg git
Hardware: x86-64 (AMD64)
OS: Linux (Al
On 29/01/18 15:14, Boris Brezillon wrote:
>> You don't disable the dsi_sys_clk neither in the ok nor in the error paths.
>
> Hm, it shouldn't be enabled in the first place: the runtime resume
> hook takes care of enabling it, and we don't need this clock to access
> IP registers (which is all we
The dual ret/retval was more complex than need be. Now
we drop the retval variable and assign the appropriate VM
codes to ret instead.
Signed-off-by: Tom St Denis
Reviewed-by: Christian König
---
drivers/gpu/drm/ttm/ttm_bo_vm.c | 28 +---
1 file changed, 13 insertions(+
Add missing {} braces.
Signed-off-by: Tom St Denis
Reviewed-by: Christian König
---
drivers/gpu/drm/ttm/ttm_page_alloc_dma.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/ttm/ttm_page_alloc_dma.c
b/drivers/gpu/drm/ttm/ttm_page_alloc_dma.c
index 469e68e06
Add missing {} braces.
Signed-off-by: Tom St Denis
Reviewed-by: Christian König
---
drivers/gpu/drm/ttm/ttm_bo_util.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/ttm/ttm_bo_util.c
b/drivers/gpu/drm/ttm/ttm_bo_util.c
index 153de1bf0232..33ffe286f3a5 100
Add missing {} braces.
Signed-off-by: Tom St Denis
Reviewed-by: Christian König
---
drivers/gpu/drm/ttm/ttm_tt.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/ttm/ttm_tt.c b/drivers/gpu/drm/ttm/ttm_tt.c
index e90d3ed6283f..95a77dab8cc9 100644
--- a/driver
Remove redundant store of return code.
Signed-off-by: Tom St Denis
Reviewed-by: Christian König
---
drivers/gpu/drm/ttm/ttm_page_alloc_dma.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/ttm/ttm_page_alloc_dma.c
b/drivers/gpu/drm/ttm/ttm_page_alloc_dma.
Correct missing {} style.
Signed-off-by: Tom St Denis
Reviewed-by: Christian König
---
drivers/gpu/drm/ttm/ttm_page_alloc_dma.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/ttm/ttm_page_alloc_dma.c
b/drivers/gpu/drm/ttm/ttm_page_alloc_dma.c
index 9
Hoist the comparison of the ret to -EDEADLK above
the two code paths to simplify the function.
Signed-off-by: Tom St Denis
Reviewed-by: Christian König
---
drivers/gpu/drm/ttm/ttm_execbuf_util.c | 14 --
1 file changed, 8 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/t
Flip the logic of the comparison and remove
the redudant variable for the pool address.
Signed-off-by: Tom St Denis
Reviewed-by: Christian König
(v2): Remove {} bracing.
---
drivers/gpu/drm/ttm/ttm_page_alloc_dma.c | 15 ++-
1 file changed, 6 insertions(+), 9 deletions(-)
diff --g
Various TTM cleanups (mostly no functional changes).
Notably patch #1 fixes a bug in the access_kmap() function.
The rest are either coding style fixes or simplifications.
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