Use of 32bit RGB samples, where each component is 8bit, cannot
support formats with components greater than 8bit (ex, XRGB2101010).
Introduce MAKE_RGBA_64() which creates pixels from a 64bit sample.
Each component in a 64bit sample is 16bit long, thus a pixel with 10bit
components can be generated
Hi,
This is a reminder of previously submitted patch [1]. The set is
just rebased on the lastet master branch, but nothing still changed.
This set adds more formats for modetest, including fixes for
10bit RGB formats and adding 422/444 YUV formats.
Thanks,
-hyun
[1]
This allows dumb buffer allocation for YUV422 and YUV444 with correct
subsampling values.
Signed-off-by: Hyun Kwon
---
tests/modetest/buffers.c | 29 ++---
1 file changed, 26 insertions(+), 3 deletions(-)
diff --git a/tests/modetest/buffers.c b/tests/modetest/buffers.c
Enable YUV422 and YUV444 formats by adding to the format table
and pattern generation calls.
Signed-off-by: Hyun Kwon
---
tests/util/format.c | 4
tests/util/pattern.c | 8
2 files changed, 12 insertions(+)
diff --git a/tests/util/format.c b/tests/util/format.c
index
Xilinx ZynqMP has a hardened display pipeline. The pipeline can
be logically partitioned into 2 parts: display controller and
DisplayPort encoder / transmitter. This driver handles the display
controller part of the pipeline that handles buffer management and
blending.
Signed-off-by: Hyun Kwon
Hi Laurent,
This series is primary waiting for your ack as I didn't hear back on v7 [1].
Please take a look and let me know if there's any concern. I've addressed
most of your comments in v6.
Thanks,
-hyun
[1] https://www.mail-archive.com/dri-devel@lists.freedesktop.org/msg218915.html
Hyun
This driver creates DRM encoder and connector for ZynqMP DisplayPort.
Signed-off-by: Hyun Kwon
Acked-by: Daniel Vetter
---
v8
- Allow to initialize without any phy lane
v7
- Use correct number of lanes
v6
- Constify all function pointers
- Clean up the duplicated license paragraphs
- Do
Xilinx has various platforms for display, where users can create
using multiple IPs in the programmable FPGA fabric, or where
some hardened pipeline is available on the chip. Furthermore,
hardened pipeline can also interact with soft logics in FPGA.
The Xilinx DRM KMS module is to integrate
This add a dt binding for ZynqMP DP subsystem.
Signed-off-by: Hyun Kwon
Reviewed-by: Rob Herring
---
v6
- Add more descriptions and references
- Remove the description for child node
v4
- Specify phy related descriptions
- Specify dma related descriptions
- Remove ports
- Remove child nodes for
This is a wrapper around the ZynqMP Display and DisplayPort drivers.
Signed-off-by: Hyun Kwon
Acked-by: Daniel Vetter
---
v8
- Support reserved memory through memory-region dt binding
v6
- Accomodate the migration of logical master from platform device to device
- Remove the duplicate license
https://bugzilla.kernel.org/show_bug.cgi?id=199621
--- Comment #9 from Matthew Trescott (matthewtresc...@gmail.com) ---
There is something else strange here. Even if I run the command I mentioned
above, xrandr --verbose always says that output eDP-1 is using CRTC 0. It never
changes, even though
https://bugs.freedesktop.org/show_bug.cgi?id=107150
--- Comment #4 from Vitalii ---
(In reply to Vitalii from comment #3)
> (In reply to Roland Scheidegger from comment #2)
> > Forgot to mention, gpu resets should be logged so easily visible in the
> > system log file (although the log may not
https://bugs.freedesktop.org/show_bug.cgi?id=107150
--- Comment #3 from Vitalii ---
(In reply to Roland Scheidegger from comment #2)
> Forgot to mention, gpu resets should be logged so easily visible in the
> system log file (although the log may not help much to identify the root
> cause).
https://bugs.freedesktop.org/show_bug.cgi?id=107153
--- Comment #2 from Patrik Kullman ---
Right before this in journalctl:
[ 268.322916] hades-media /usr/lib/gdm3/gdm-x-session[896]: (--) AMDGPU(0):
HDMI max TMDS frequency 30KHz
[ 268.324908] hades-media /usr/lib/gdm3/gdm-x-session[896]:
https://bugs.freedesktop.org/show_bug.cgi?id=107153
--- Comment #1 from Patrik Kullman ---
Very similar to https://bugs.freedesktop.org/show_bug.cgi?id=106194 but still
happens in 4.18-rc3
--
You are receiving this mail because:
You are the assignee for the
https://bugs.freedesktop.org/show_bug.cgi?id=107153
Bug ID: 107153
Summary: 4.18-rc3 crash on hdmi
(0010:dm_update_crtcs_state+0x41e/0x4a0)
Product: DRI
Version: unspecified
Hardware: x86-64 (AMD64)
OS:
https://bugs.freedesktop.org/show_bug.cgi?id=99528
--- Comment #9 from Fabian Maurer ---
No, I can't reproduce the problem anymore. Also not when using mesa 17.1 -
don't really know where it's fixed, but it works reliably now.
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https://bugs.freedesktop.org/show_bug.cgi?id=100239
Bruno Jacquet (Xaapyks) changed:
What|Removed |Added
Resolution|FIXED |---
https://bugs.freedesktop.org/show_bug.cgi?id=100239
--- Comment #13 from Bruno Jacquet (Xaapyks) ---
Created attachment 140499
--> https://bugs.freedesktop.org/attachment.cgi?id=140499=edit
issue on 18.1.3
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https://bugs.freedesktop.org/show_bug.cgi?id=102322
--- Comment #28 from dwagner ---
(In reply to Michel Dänzer from comment #27)
> That could be a Mesa issue, anyway it should probably be tracked separately
> from this report.
Created separate bug report
https://bugs.freedesktop.org/show_bug.cgi?id=107152
--- Comment #2 from dwagner ---
Created attachment 140498
--> https://bugs.freedesktop.org/attachment.cgi?id=140498=edit
Xorg.log from the session ending in the "gpu fault"
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https://bugs.freedesktop.org/show_bug.cgi?id=107152
--- Comment #1 from dwagner ---
Created attachment 140497
--> https://bugs.freedesktop.org/attachment.cgi?id=140497=edit
dmesg of from booting until gpu fault few minutes later
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https://bugs.freedesktop.org/show_bug.cgi?id=107152
Bug ID: 107152
Summary: GPU fault detected: 146 / VM_CONTEXT1_PROTECTION_FAULT
/ ring gfx timeout
Product: DRI
Version: DRI git
Hardware: x86-64 (AMD64)
https://bugs.freedesktop.org/show_bug.cgi?id=107150
--- Comment #2 from Roland Scheidegger ---
Forgot to mention, gpu resets should be logged so easily visible in the system
log file (although the log may not help much to identify the root cause).
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https://bugs.freedesktop.org/show_bug.cgi?id=107150
--- Comment #1 from Roland Scheidegger ---
That would be consistent with gpu resets due to hang detection (which is known
to sometimes go wrong hence the hangs.
What graphic card is this?
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https://bugs.freedesktop.org/show_bug.cgi?id=107150
Bug ID: 107150
Summary: GPU restarts when some games are launched
Product: Mesa
Version: 18.0
Hardware: x86-64 (AMD64)
OS: Linux (All)
Status: NEW
https://bugs.freedesktop.org/show_bug.cgi?id=107149
Bug ID: 107149
Summary: Resuming from suspend can cause not working hw
acceleration
Product: DRI
Version: XOrg git
Hardware: Other
OS: All
On Tue, Jun 19, 2018 at 10:19:29AM +0200, Maciej Purski wrote:
> From: Andrzej Hajda
>
> The patch adds common part of DSI node for Exynos5250 platforms
> and a required mipi-phy node.
>
> Signed-off-by: Andrzej Hajda
> Signed-off-by: Maciej Purski
> ---
> arch/arm/boot/dts/exynos5250.dtsi |
https://bugs.freedesktop.org/show_bug.cgi?id=102322
--- Comment #27 from Michel Dänzer ---
(In reply to dwagner from comment #26)
> Today for the first time I had a sudden "crash while just browsing with
> Firefox" [...]
That could be a Mesa issue, anyway it should probably be tracked
/commits/Russell-King/drm-i2c-tda998x-find-the-drm_device-via-the-drm_connector/20180707-030507
base: git://git.armlinux.org.uk/~rmk/linux-arm.git drm-tda998x-devel
config: i386-randconfig-x018-201826 (attached as .config)
compiler: gcc-7 (Debian 7.3.0-16) 7.3.0
reproduce:
# save the attached
Dave,
This introduces a header update and support for multisample surfaces.
The following changes since commit 812a954b787ab5a91d62e597a36351628b08d079:
drm/vmwgfx: Remove an obsolete __le32 conversion (2018-07-03 20:41:23
+0200)
are available in the Git repository at:
Dave,
A series of cleanups / reorganizations and modesetting changes that
mostly target atomic state validation.
The following changes since commit 07c13bb78c8b8a9cb6ee169659528945038d5e85:
drm: Change deadlock-avoidance algorithm for the modeset locks.
(2018-07-03 09:46:05 +0200)
are
Hi,
On 07/06/2018 04:16 PM, Ville Syrjälä wrote:
On Tue, Jun 19, 2018 at 10:18:27PM +0200, Hans de Goede wrote:
On BYT and CHT the GOP sometimes initializes the pclk at a (slightly)
different frequency then the pclk which we've calculated.
This commit makes the DSI code read-back the pclk set
On Tue, 3 Jul 2018 19:40:46 +0200
Boris Brezillon wrote:
> Fix the bullet list declaration in the overview section.
>
> Signed-off-by: Boris Brezillon
Applied to drm-misc-next.
> ---
> drivers/gpu/drm/drm_writeback.c | 11 +++
> 1 file changed, 7 insertions(+), 4 deletions(-)
>
>
On Tue, 3 Jul 2018 09:50:14 +0200
Boris Brezillon wrote:
> Hello,
>
> This is the third version of this series adding writeback support
> to the VC4 display engine.
>
> This version is based on drm-misc-next and include a bunch of
> modifications to the core that I had to add to make it work
/commits/Russell-King/drm-i2c-tda998x-find-the-drm_device-via-the-drm_connector/20180707-030507
base: git://git.armlinux.org.uk/~rmk/linux-arm.git drm-tda998x-devel
config: i386-randconfig-x007-07071008 (attached as .config)
compiler: gcc-7 (Debian 7.3.0-16) 7.3.0
reproduce:
# save the attached
Hi,
On 07/06/2018 03:14 PM, Jani Nikula wrote:
On Fri, 29 Jun 2018, Hans de Goede wrote:
Hi,
On 19-06-18 22:18, Hans de Goede wrote:
Hi All,
This patch-set is the result of the work I've been doing recently to
give people a smooth "flickerfree" boot experience where the display
keeps
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