Hey Dave,
A couple more fixes, the display one is particularly important as it
appears something like this is hitting quite a few people.
Thanks,
Ben.
The following changes since commit 4ac0a807da6f79d5f2a65f991030aee503fece3a:
drm/nouveau/drm/nouveau: tegra: Call nouveau_drm_device_init()
tree: git://people.freedesktop.org/~agd5f/linux.git drm-next-4.21-wip
head: bdc69eb3108b48f3f5c133835813a09073df2e40
commit: 1db8c142b6c557a951e8f9866b98953fe91cbdd6 [122/186] drm/scheduler: Add
drm_sched_suspend/resume_timeout()
config: arm-allmodconfig (attached as .config)
compiler:
On Mon, 10 Dec 2018, Enric Balletbo i Serra wrote:
> Commit '88ba95bedb79 ("backlight: pwm_bl: Compute brightness of LED
> linearly to human eye")' allows the possibility to compute a default
> brightness table when there isn't the brightness-levels property in the
> DT. Unfortunately the changes
Hi,
[This is an automated email]
This commit has been processed because it contains a "Fixes:" tag,
fixing commit: f479c0ba4a17 drm/nouveau/kms/nv50: initial support for DP 1.2
multi-stream.
The bot has tested the following trees: v4.19.8, v4.14.87,
v4.19.8: Build OK!
v4.14.87: Failed to
Hi Daniel and Chris,
Could you take a look on all the patches? Can we get your RB or AB on all
patches including igt patch before we submit to drm-misc?
We already fix all existing issues, and also add test case in IGT as your
required.
Btw, the patch set is tested by below tests:
a. vulkan
https://bugs.freedesktop.org/show_bug.cgi?id=109022
--- Comment #2 from e88z4 ---
Out of 10 times replaying the trace, I was able to reproduce the bug twice.
[ 540.189992] amdgpu :23:00.0: GPU fault detected: 147 0x09088402 for
process glretrace pid 2006 thread glretrace:cs0 pid 2007
[
https://bugs.freedesktop.org/show_bug.cgi?id=109022
--- Comment #1 from e88z4 ---
A revision of my initial comment. I was able to reproduce the bug once while
replaying the trace and generated the same error in the dmesg output but I am
no longer able to reproduce the error while replaying the
https://bugs.freedesktop.org/show_bug.cgi?id=109007
--- Comment #3 from Daniel Drake ---
Got it. Thanks!
--
You are receiving this mail because:
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dri-devel mailing list
dri-devel@lists.freedesktop.org
https://bugs.freedesktop.org/show_bug.cgi?id=109022
Bug ID: 109022
Summary: ring gfx timeout during particular shader generation
on yuzu emulator
Product: Mesa
Version: 18.3
Hardware: x86-64 (AMD64)
OS:
tree: git://anongit.freedesktop.org/drm/drm-tip drm-tip
head: f7fe8bac92bfd7ceef37f46fbeb9a6c1bac66125
commit: 2c6557b1fc4d6cc24938a27742ac396be7b55e70 [5/10] Merge remote-tracking
branch 'drm-misc/drm-misc-next' into drm-tip
config: i386-randconfig-sb0-12120454 (attached as .config)
https://bugs.freedesktop.org/show_bug.cgi?id=109021
Bug ID: 109021
Summary: Kaveri no fix perfomance
Product: DRI
Version: unspecified
Hardware: x86-64 (AMD64)
OS: Linux (All)
Status: NEW
Severity: normal
https://bugs.freedesktop.org/show_bug.cgi?id=100949
--- Comment #11 from Luya Tshimbalanga ---
I no longer own Asus X550Z which broke few months ago, replaced by HP Envy x360
Ryzen 2500U 15 inch. Feel free to continue or close this report.
--
You are receiving this mail because:
You are the
On Tue, 11 Dec 2018 at 10:42, Eric Anholt wrote:
> Daniel Vetter writes:
> > That's why this patch doesn't just need a lot of acks that mean "yeah
> > seems fine to me", but a lot of acks that mean "yeah we'll tell you
> > when you're over the line and usurp you from that comfy chair if you
> >
We currently program userspace-provided gamma and degamma LUT's into our
hardware without really checking to see whether they satisfy our
hardware's rules. We should try to catch tables that are invalid for
our hardware early and reject the atomic transaction.
All of our platforms that accept a
Some platforms require that gamma or degamma LUT's have certain
characteristics in order to be programmed into the hardware. If a
userspace-provided LUT violates a platform's hardware requirements, we
want to be able to catch this during the atomic check and reject the
transaction rather than
Some hardware may place additional restrictions on the gamma/degamma
curves described by our LUT properties. E.g., that a gamma curve never
decreases or that the red/green/blue channels of a LUT's entries must be
equal. Let's add a couple helpers that drivers can use to test that a
tree: git://anongit.freedesktop.org/drm/drm-tip drm-tip
head: f7fe8bac92bfd7ceef37f46fbeb9a6c1bac66125
commit: 2c6557b1fc4d6cc24938a27742ac396be7b55e70 [5/10] Merge remote-tracking
branch 'drm-misc/drm-misc-next' into drm-tip
config: x86_64-randconfig-s4-12120354 (attached as .config)
framebuffer for NV12 requires the pitch to the multiplier of 4, instead
of the width. This patch corrects it.
For instance, a 480p video, whose width and pitch are 854 and 896
respectively, is excluded for NV12 plane so far.
Signed-off-by: Dongseong Hwang
Cc: Chandra Konduru
Cc: Vidya Srinivas
Noticed this while working on redoing the reference counting scheme in
the DP MST helpers. Nouveau doesn't attempt to call
drm_dp_mst_topology_mgr_destroy() at all, which leaves it leaking all of
the resources for drm_dp_mst_topology_mgr and it's children mstbs+ports.
Fixes: f479c0ba4a17
We need to call drm_dp_mst_topology_mgr_set_mst(mgr, false) when
destroying the topology manager in order to ensure that the root mstb
and all of it's descendents are actually destroyed, and additionally to
try to make sure that we leave the hub in a clean state.
Signed-off-by: Lyude Paul
Fixes:
18. 12. 11. 오후 10:20에 Andrzej Hajda 이(가) 쓴 글:
> Hi again,
>
> It seems I have missed two questions:
>
> On 11.12.2018 09:36, Andrzej Hajda wrote:
>> On 11.12.2018 09:01, Inki Dae wrote:
>>> 18. 12. 11. 오후 4:49에 Andrzej Hajda 이(가) 쓴 글:
On 11.12.2018 00:45, Inki Dae wrote:
> Hi Andrzej,
18. 12. 11. 오후 5:36에 Andrzej Hajda 이(가) 쓴 글:
> On 11.12.2018 09:01, Inki Dae wrote:
>>
>> 18. 12. 11. 오후 4:49에 Andrzej Hajda 이(가) 쓴 글:
>>> On 11.12.2018 00:45, Inki Dae wrote:
Hi Andrzej,
18. 12. 10. 오후 4:35에 Andrzej Hajda 이(가) 쓴 글:
> Hi Inki,
>
> On 10.12.2018 03:25,
https://bugs.freedesktop.org/show_bug.cgi?id=109006
--- Comment #1 from Robert Straw ---
I was going to attempt to bisect this tonight: however on a lark I decided to
try 4.20-rc6 as it is nearing completion. I am pleased to report that I am
*not* seeing this issue on 4.20-rc6. I suspect that
* There is no way to check if a device name is really a drm device
by looking it up in a virtual filesystem like on Linux
* The major device number is also dynamically allocated from a pool,
comparing it to a constant makes no sense
* In the absence of better ideas, just assume the device
From: Ville Syrjälä
Function argument for hdmi_drm_infoframe_log is made constant.
Signed-off-by: Ville Syrjälä
Signed-off-by: Uma Shankar
---
drivers/video/hdmi.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/video/hdmi.c b/drivers/video/hdmi.c
index
This patch enables modeset whenever HDR metadata
needs to be updated to sink.
Signed-off-by: Ville Syrjälä
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/i915/intel_atomic.c | 15 ++-
drivers/gpu/drm/i915/intel_hdmi.c | 4
2 files changed, 18 insertions(+), 1 deletion(-)
From: Ville Syrjälä
This patch enables infoframes on GLK+ to be
used to send HDR metadata to HDMI sink.
Signed-off-by: Ville Syrjälä
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/i915/i915_reg.h | 4
drivers/gpu/drm/i915/intel_hdmi.c | 12 +---
2 files changed, 13
From: Ville Syrjälä
ADD HLG EOTF to the list of EOTF transfer functions
supported.
Signed-off-by: Ville Syrjälä
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/drm_edid.c | 4 ++--
include/linux/hdmi.h | 1 +
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git
On Tue, 27 Nov 2018 16:28:03 +0100, Jan Tuerk wrote:
> This fixes the error in the compatible documentation for the EDT
> etm0700[g].. panels which have accidentally documented as etm0700[8]0..
>
> Signed-off-by: Jan Tuerk
> ---
> .../devicetree/bindings/display/panel/edt,et-series.txt | 6
From: Ville Syrjälä
This is to limit PORT C on GLK to drive only
HDMI. Not sure if this is mandatory, this is just
to test HDR on GLK HDMI.
Signed-off-by: Ville Syrjälä
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/i915/intel_bios.c | 7 +++
1 file changed, 7 insertions(+)
diff --git
Enable Dynamic Range and Mastering Infoframe for HDR
content, which is defined in CEA 861.3 spec.
The metadata will be computed based on blending
policy in userspace compositors and passed as a connector
property blob to driver. The same will be sent as infoframe
to panel which support HDR.
v2:
Enable writing of HDR metadata infoframe to panel.
The data will be provid by usersapace compositors, based
on blending policies and passsed to driver through a blob
property.
v2: Rebase
v3: Fixed a warning message
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/i915/intel_hdmi.c | 27
CEA 861.3 spec adds colorimetry data block for HDMI.
Parsing the block to get the colorimetry data from
panel.
v2: Rebase
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/drm_edid.c | 24
include/drm/drm_connector.h | 2 ++
2 files changed, 26 insertions(+)
diff --git
Hardware may have HDR capability on certain plane
engines. Enabling the same in drm plane structure
so that this can be communicated to user space.
Each drm driver should set this flag to true for planes
which support HDR.
v2: Rebase
Signed-off-by: Uma Shankar
---
include/drm/drm_plane.h | 3
Attach HDR metadata property to connector object.
v2: Rebase
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/i915/intel_hdmi.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c
b/drivers/gpu/drm/i915/intel_hdmi.c
index 07e803a..8a1e5cb 100644
---
HDR metadata block is introduced in CEA-861.3 spec.
Parsing the same to get the panel's HDR metadata.
v2: Rebase and added Ville's POC changes to the patch.
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/drm_edid.c | 45 +
1 file changed, 45
HDR source metadata set and get property implemented in this
patch. The blob data is received from userspace and saved in
connector state, the same is returned as blob in get property
call to userspace.
v2: Rebase and added Ville's POC changes
Signed-off-by: Uma Shankar
---
Add bit field and macro for extended tag in CEA block. Also,
declare macros for HDR metadata block.
v2: Rebase
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/drm_edid.c | 16
1 file changed, 16 insertions(+)
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
This patch adds a blob property to get HDR metadata
information from userspace. This will be send as part
of AVI Infoframe to panel.
v2: Rebase and modified the metadata structure elements
as per Ville's POC changes.
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/drm_connector.c | 6 ++
This patch series enables HDR support in drm. It basically defines
HDR metadata structures, property to pass content (after blending)
metadata from user space compositors to driver.
Dynamic Range and Mastering infoframe creation and sending.
ToDo:
1. We need to get the color framework in place
On Tue, Nov 27, 2018 at 03:42:49PM +0800, Icenowy Zheng wrote:
> Allwinner H6 SoC uses a Mali T720 GPU, which is one of the GPUs in the
> Midgard GPU product line.
>
> Add binding for the H6 Mali Midgard GPU.
>
> Signed-off-by: Icenowy Zheng
> ---
>
On Tue, Nov 27, 2018 at 03:42:48PM +0800, Icenowy Zheng wrote:
> Some SoCs adds a bus clock gate to the Mali Midgard GPU.
>
> Add the binding for the bus clock.
>
> Signed-off-by: Icenowy Zheng
> ---
> Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt | 6 ++
> 1 file changed, 6
https://bugs.freedesktop.org/show_bug.cgi?id=109007
Marek Olšák changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolution|---
Reviewed-by: Alex Deucher
From: amd-gfx on behalf of Liu, Leo
Sent: Tuesday, December 11, 2018 4:03 PM
To: amd-...@lists.freedesktop.org; dri-devel@lists.freedesktop.org
Cc: Liu, Leo
Subject: [PATCH libdrm] tests/amdgpu/vcn: fix the nop command in IBs
Just
Patch is
Reviewed-by: Boyuan Zhang
Regards,
Boyuan
-Original Message-
From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf Of Liu,
Leo
Sent: December-11-18 4:04 PM
To: amd-...@lists.freedesktop.org; dri-devel@lists.freedesktop.org
Cc: Liu, Leo
Subject: [PATCH libdrm]
Just make them properly i.e. put 0 to the Nop reg
Signed-off-by: Leo Liu
---
tests/amdgpu/vcn_tests.c | 18 --
1 file changed, 12 insertions(+), 6 deletions(-)
diff --git a/tests/amdgpu/vcn_tests.c b/tests/amdgpu/vcn_tests.c
index d9f05af8..859ec496 100644
---
https://bugs.freedesktop.org/show_bug.cgi?id=109001
--- Comment #6 from fin4...@hotmail.com ---
Comment on attachment 142770
--> https://bugs.freedesktop.org/attachment.cgi?id=142770
Xorg Log
Disable the Xfce compositor, vsync feature in that causes it tainted. That
might not help. Use the
https://bugs.freedesktop.org/show_bug.cgi?id=109020
Lionel Landwerlin changed:
What|Removed |Added
Assignee|dri-devel@lists.freedesktop |intel-3d-bugs@lists.freedes
https://bugs.freedesktop.org/show_bug.cgi?id=109020
Lionel Landwerlin changed:
What|Removed |Added
Status|NEW |NEEDINFO
--- Comment #1 from
np
Andrey
On 12/11/2018 03:18 PM, Alex Deucher wrote:
> On Tue, Dec 11, 2018 at 3:13 PM Andrey Grodzovsky
> wrote:
>> I retested GPU recovery with Bonaire ASIC and it works.
>>
>> Signed-off-by: Andrey Grodzovsky
> Reviewed-by: Alex Deucher
>
> Care to enable it in the kernel as well?
>
>
On Tue, Dec 11, 2018 at 3:13 PM Andrey Grodzovsky
wrote:
>
> I retested GPU recovery with Bonaire ASIC and it works.
>
> Signed-off-by: Andrey Grodzovsky
Reviewed-by: Alex Deucher
Care to enable it in the kernel as well?
Alex
> ---
> tests/amdgpu/deadlock_tests.c | 3 ++-
> 1 file
Enable writing of HDR metadata infoframe to panel.
The data will be provid by usersapace compositors, based
on blending policies and passsed to driver through a blob
property.
v2: Rebase
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/i915/intel_hdmi.c | 27 +++
1 file
From: Ville Syrjälä
Function argument for hdmi_drm_infoframe_log is made constant.
Signed-off-by: Ville Syrjälä
Signed-off-by: Uma Shankar
---
drivers/video/hdmi.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/video/hdmi.c b/drivers/video/hdmi.c
index
This patch enables modeset whenever HDR metadata
needs to be updated to sink.
Signed-off-by: Ville Syrjälä
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/i915/intel_atomic.c | 15 ++-
drivers/gpu/drm/i915/intel_hdmi.c | 4
2 files changed, 18 insertions(+), 1 deletion(-)
From: Ville Syrjälä
This is to limit PORT C on GLK to drive only
HDMI. Not sure if this is mandatory, this is just
to test HDR on GLK HDMI.
Signed-off-by: Ville Syrjälä
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/i915/intel_bios.c | 7 +++
1 file changed, 7 insertions(+)
diff --git
HDR source metadata set and get property implemented in this
patch. The blob data is received from userspace and saved in
connector state, the same is returned as blob in get property
call to userspace.
v2: Rebase and added Ville's POC changes
Signed-off-by: Uma Shankar
---
From: Ville Syrjälä
ADD HLG EOTF to the list of EOTF transfer functions
supported.
Signed-off-by: Ville Syrjälä
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/drm_edid.c | 4 ++--
include/linux/hdmi.h | 1 +
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git
Hardware may have HDR capability on certain plane
engines. Enabling the same in drm plane structure
so that this can be communicated to user space.
Each drm driver should set this flag to true for planes
which support HDR.
v2: Rebase
Signed-off-by: Uma Shankar
---
include/drm/drm_plane.h | 3
Enable Dynamic Range and Mastering Infoframe for HDR
content, which is defined in CEA 861.3 spec.
The metadata will be computed based on blending
policy in userspace compositors and passed as a connector
property blob to driver. The same will be sent as infoframe
to panel which support HDR.
v2:
From: Ville Syrjälä
This patch enables infoframes on GLK+ to be
used to send HDR metadata to HDMI sink.
Signed-off-by: Ville Syrjälä
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/i915/i915_reg.h | 4
drivers/gpu/drm/i915/intel_hdmi.c | 12 +---
2 files changed, 13
Add bit field and macro for extended tag in CEA block. Also,
declare macros for HDR metadata block.
v2: Rebase
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/drm_edid.c | 16
1 file changed, 16 insertions(+)
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
Attach HDR metadata property to connector object.
v2: Rebase
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/i915/intel_hdmi.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c
b/drivers/gpu/drm/i915/intel_hdmi.c
index 07e803a..8a1e5cb 100644
---
This patch adds a blob property to get HDR metadata
information from userspace. This will be send as part
of AVI Infoframe to panel.
v2: Rebase and modified the metadata structure elements
as per Ville's POC changes.
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/drm_connector.c | 6 ++
This patch series enables HDR support in drm. It basically defines
HDR metadata structures, property to pass content (after blending)
metadata from user space compositors to driver.
Dynamic Range and Mastering infoframe creation and sending.
ToDo:
1. We need to get the color framework in
CEA 861.3 spec adds colorimetry data block for HDMI.
Parsing the block to get the colorimetry data from
panel.
v2: Rebase
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/drm_edid.c | 24
include/drm/drm_connector.h | 2 ++
2 files changed, 26 insertions(+)
diff --git
HDR metadata block is introduced in CEA-861.3 spec.
Parsing the same to get the panel's HDR metadata.
v2: Rebase and added Ville's POC changes to the patch.
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/drm_edid.c | 45 +
1 file changed, 45
I retested GPU recovery with Bonaire ASIC and it works.
Signed-off-by: Andrey Grodzovsky
---
tests/amdgpu/deadlock_tests.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/tests/amdgpu/deadlock_tests.c b/tests/amdgpu/deadlock_tests.c
index 6bd36aa..a6c2635 100644
---
Any update on this patch? I thought it was interesting.
BTW adding Rob (finally) to CC...
On Mon, Oct 01, 2018 at 01:02:30AM +0200, Wolfram Sang wrote:
> On Tue, Sep 25, 2018 at 06:06:11PM +0200, Thierry Reding wrote:
> > From: Thierry Reding
> >
> > If an I2C adapter doesn't match the
https://bugs.freedesktop.org/show_bug.cgi?id=109020
Nikolay Borodin changed:
What|Removed |Added
Priority|medium |highest
--
You are receiving this
Filter planes based on the supported modifiers
Signed-off-by: Fritz Koenig
---
drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 18 ++
1 file changed, 18 insertions(+)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
index
allow_fb_modifiers needs to be set before drm_universal_plane_init
is called.
Signed-off-by: Fritz Koenig
---
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 20 ++--
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
Signed-off-by: Fritz Koenig
---
.../drm/msm/disp/dpu1/dpu_hw_catalog_format.h | 73 ---
1 file changed, 73 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog_format.h
b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog_format.h
index 3c9f028628ef..c37ba38ac83d
Simplify the initilization of a list of formats
by passing the list in directly instead of copying
it from one structure to another.
Signed-off-by: Fritz Koenig
---
drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c | 33
drivers/gpu/drm/msm/disp/dpu1/dpu_formats.h | 14 --
Pass list of supported modifiers to plane init.
Signed-off-by: Fritz Koenig
---
drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
index
https://bugs.freedesktop.org/show_bug.cgi?id=109020
Bug ID: 109020
Summary: i915 [drm]: GPU hang in dxvk in wine-4.0-rc1
Product: Mesa
Version: git
Hardware: x86-64 (AMD64)
OS: Linux (All)
Status: NEW
https://bugzilla.kernel.org/show_bug.cgi?id=201957
--- Comment #2 from e88z4 (felix.adria...@gmail.com) ---
I will try to test with amdgpu-pro sometimes this week with the kernel that I
mentioned above. If the application works as expected, it could be an issue
with mesa opengl bug.
--
You are
This patch attaches the colorspace connector property to the
hdmi connector. Based on colorspace change, modeset will be
triggered to switch to new colorspace.
Based on colorspace property value create an infoframe
with appropriate colorspace. This can be used to send an
infoframe packet with
This patch adds a colorspace connector property, enabling
userspace to switch to various supported colorspaces.
This will help enable BT2020 along with other colorspaces.
v2: Addressed Maarten and Ville's review comments. Enhanced
the colorspace enum to incorporate both HDMI and DP supported
This patch series creates a new connector property to program
colorspace to sink devices. Modern sink devices support more
than 1 type of colorspace like 601, 709, BT2020 etc. This helps
to switch based on content type which is to be displayed. The
decision lies with compositors as to in which
On 12/10/18 6:07 PM, Hans Verkuil wrote:
> On 12/10/18 5:36 PM, Hans Verkuil wrote:
>> On 12/10/18 5:34 PM, Thierry Reding wrote:
>>> From: Thierry Reding
>>>
>>> Most of the CEC support code already lives in the "output" library code.
>>> Move registration and unregistration to the library code
On Tue, Dec 11, 2018 at 10:19 PM Maxime Ripard
wrote:
>
> On Mon, Dec 10, 2018 at 09:47:19PM +0530, Jagan Teki wrote:
> > Video start delay can be computed by subtracting total vertical
> > timing with front porch timing and with adding 1 delay line for TCON.
> >
> > BSP code form BPI-M64-bsp is
ST7701 designed for small and medium sizes of TFT LCD display, is
capable of supporting up to 480RGBX864 in resolution. It provides
several system interfaces like MIPI/RGB/SPI.
Currently added support for Techstar TS8550B which is ST7701 based
480x854, 2-lane MIPI DSI LCD panel.
Driver now
On 11/12/18 10:02 PM, Maxime Ripard wrote:
On Mon, Dec 10, 2018 at 09:47:27PM +0530, Jagan Teki wrote:
Minimum PLL used for MIPI is 500MHz, as per manual, but
lowering the min rate by 300MHz can result proper working
nkms divider with the help of desired dclock rate from
panel driver.
Techstar TS8550B MIPI DSI panel is 480x854, 2-lane MIPI DSI LCD panel
with inbuilt ST7701 chip.
The default regulator names in ST7701 chip is renamed in Techstar TS8550B
so, add specific binding names for them.
Signed-off-by: Jagan Teki
---
Changes for v5:
- found the chip from vendor, so added
Forgot to ask you,
Il 11/12/2018 18:20, Giulio Benetti ha scritto:
Hi Jonathan,
Il 11/12/2018 11:49, Jonathan Liu ha scritto:
Hi Giulio,
On Thu, 6 Dec 2018 at 22:00, Giulio Benetti
wrote:
Hi Jonathan,
Il 06/12/2018 08:29, Jonathan Liu ha scritto:
Hi Giulio,
On Thu, 15 Feb 2018 at
Hi Jonathan,
Il 11/12/2018 11:49, Jonathan Liu ha scritto:
Hi Giulio,
On Thu, 6 Dec 2018 at 22:00, Giulio Benetti
wrote:
Hi Jonathan,
Il 06/12/2018 08:29, Jonathan Liu ha scritto:
Hi Giulio,
On Thu, 15 Feb 2018 at 17:54, Giulio Benetti
wrote:
Differently from other Lcd signals, HSYNC
On Mon, Dec 3, 2018 at 6:25 AM Heiko Stuebner wrote:
>
> Am Dienstag, 27. November 2018, 08:42:49 CET schrieb Icenowy Zheng:
> > Allwinner H6 SoC uses a Mali T720 GPU, which is one of the GPUs in the
> > Midgard GPU product line.
> >
> > Add binding for the H6 Mali Midgard GPU.
> >
> >
On Mon, Dec 10, 2018 at 7:22 AM Neil Armstrong wrote:
>
> The Amlogic ARM Mali Midgard requires reset controls to power on and
> software reset the GPU, adds these as optional in the bindings.
>
> Signed-off-by: Neil Armstrong
> ---
> Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt |
On Tue, Dec 11, 2018 at 10:05:43PM +0530, Jagan Teki wrote:
>
>
> On 11/12/18 10:02 PM, Maxime Ripard wrote:
> > On Mon, Dec 10, 2018 at 09:47:27PM +0530, Jagan Teki wrote:
> > > Minimum PLL used for MIPI is 500MHz, as per manual, but
> > > lowering the min rate by 300MHz can result proper
On Mon, Dec 10, 2018 at 09:47:19PM +0530, Jagan Teki wrote:
> Video start delay can be computed by subtracting total vertical
> timing with front porch timing and with adding 1 delay line for TCON.
>
> BSP code form BPI-M64-bsp is computing video start delay as
> (from linux-sunxi/
>
https://bugs.freedesktop.org/show_bug.cgi?id=100949
--- Comment #10 from Dmitry ---
The XF86-video-ati driver is probably used. Kaveri does not work with this
driver via DP. I have a black screen too.
--
You are receiving this mail because:
You are the assignee for the
On Mon, Dec 10, 2018 at 09:47:29PM +0530, Jagan Teki wrote:
> The A64 has a MIPI-DSI block which is similar to A31
> without mod clock.
>
> So, add dsi node with A64 compatible, dphy node with
> A31 compatible and finally connect dsi to tcon0 to
> make proper DSI pipeline.
>
> Signed-off-by:
On Mon, Dec 10, 2018 at 09:47:27PM +0530, Jagan Teki wrote:
> Minimum PLL used for MIPI is 500MHz, as per manual, but
> lowering the min rate by 300MHz can result proper working
> nkms divider with the help of desired dclock rate from
> panel driver.
>
> Signed-off-by: Jagan Teki
> Acked-by:
On Mon, Dec 10, 2018 at 05:34:22PM +0530, Sharat Masetty wrote:
> The gpu crashstate's base objects registers pointer can be NULL if the
> target implementation decides to capture the register dump on its own.
> This patch simply checks for NULL before dereferencing.
Hi Sharat - this doesn't
Yeah, completely correct explained.
I was unfortunately really busy today, but going to give that a look as
soon as I have time.
Christian.
Am 11.12.18 um 17:01 schrieb Grodzovsky, Andrey:
A I understand you say that by the time the fence callback runs the job
might have already been
A I understand you say that by the time the fence callback runs the job
might have already been released,
but how so if the job gets released from drm_sched_job_finish work
handler in the normal flow - so, after the HW
fence (s_fence->parent) cb is executed. Other 2 flows are error use
cases
On Tue, Dec 11, 2018 at 10:53 AM Sean Paul wrote:
>
> On Mon, Dec 10, 2018 at 10:58:20AM -0500, Alex Deucher wrote:
> > On Mon, Dec 10, 2018 at 5:04 AM Daniel Vetter
> > wrote:
> > >
> > > It's not a core function, and the matching atomic functions are also
> > > not in the core. Plus the
On Mon, Dec 10, 2018 at 10:58:20AM -0500, Alex Deucher wrote:
> On Mon, Dec 10, 2018 at 5:04 AM Daniel Vetter wrote:
> >
> > It's not a core function, and the matching atomic functions are also
> > not in the core. Plus the suspend/resume helper is also already there.
> >
> > Needs a tiny bit of
Hi Jyri,
On Tuesday, 11 December 2018 16:48:16 EET Jyri Sarha wrote:
> On 06/12/2018 22:26, Laurent Pinchart wrote:
> > The TFP410 supports configurable pixel clock sampling edge and data
> > de-skew adjustments. The configuration can be set through I2C or
> > dedicated chip pins.
> >
> > Report
On 11/12/2018 17:19, Tomi Valkeinen wrote:
> On 11/12/18 16:48, Jyri Sarha wrote:
>
>>> + /* Get the setup and hold time from vendor-specific properties. */
>>> + of_property_read_u32(dvi->dev->of_node, "ti,deskew", (u32 *));
>>> + if (deskew < -4 || deskew > 3)
>>> + return
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