On Sat, Dec 22, 2018 at 12:14:44AM +, Sinan Kaya wrote:
> This driver depends on the PCI infrastructure but the dependency has not
> been explicitly called out.
>
> Signed-off-by: Sinan Kaya
Reviewed-by: Lukas Wunner
> ---
> drivers/gpu/vga/Kconfig | 1 +
> 1 file changed, 1 insertion(+)
https://bugs.freedesktop.org/show_bug.cgi?id=108992
--- Comment #16 from Brian Schott ---
I've tested a next-20181221 kernel with IOMMU_DEFAULT_PASSTHROUGH set, and I'm
able to get the system to start properly. Still seeing some system lockups,
when playing games, but it's bette
Hi Yu,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on linus/master]
[also build test WARNING on v4.20-rc7 next-20181221]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci
Hi Yu,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on linus/master]
[also build test WARNING on v4.20-rc7]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Yu-
https://bugs.freedesktop.org/show_bug.cgi?id=104790
--- Comment #8 from lei.p...@gmail.com ---
(In reply to mirh from comment #7)
> So... How have we been doing? Can this be closed?
Still keeping Core profile 4.5, no problem so far, as far as I'm concerned, it
can be closed, not sure what fixed i
This driver depends on the PCI infrastructure but the dependency has not
been explicitly called out.
Signed-off-by: Sinan Kaya
---
drivers/gpu/vga/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/vga/Kconfig b/drivers/gpu/vga/Kconfig
index b677e5d524e6..d5f1d8e1c6f8 100644
Hi Shayenne,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on robclark/msm-next]
[also build test ERROR on v4.20-rc7 next-20181221]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci
https://bugs.freedesktop.org/show_bug.cgi?id=103900
mirh changed:
What|Removed |Added
Status|NEW |NEEDINFO
--- Comment #4 from mirh ---
There was
https://bugs.freedesktop.org/show_bug.cgi?id=109130
Bug ID: 109130
Summary: 3rd display stays black
Product: DRI
Version: unspecified
Hardware: x86-64 (AMD64)
OS: Linux (All)
Status: NEW
Severity: normal
https://bugs.freedesktop.org/show_bug.cgi?id=104790
mirh changed:
What|Removed |Added
Status|NEW |NEEDINFO
--- Comment #7 from mirh ---
So... How
On 12/21/2018 01:37 PM, Christian König wrote:
> Am 20.12.18 um 20:23 schrieb Andrey Grodzovsky:
>> Decauple sched threads stop and start and ring mirror
>> list handling from the policy of what to do about the
>> guilty jobs.
>> When stoppping the sched thread and detaching sched fences
>> from
I don't think anyone responded to this one?
regards,
dan carpenter
On Fri, Jul 13, 2018 at 06:00:18PM +0300, Dan Carpenter wrote:
> The ->nr_signal is the supposed to be the number of elements in the
> ->signal array. There was one place where it was 5 but it was supposed
> to be 4. That looks
Hi Shayenne,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on robclark/msm-next]
[also build test ERROR on v4.20-rc7 next-20181221]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci
Reviewed-by: Thomas Hellstrom
Daniel, Dave, could you help try to get this patch in -next before the
merge window. Otherwise people will start to experience random kernel
crashes. I figure we don't want to wait until first -fixes pull with
this.
Thanks,
Thomas
On Fri, 2018-12-21 at 11:35 -0800
On Thu, 2018-12-20 at 15:13 -0800, Dhinakaran Pandiyan wrote:
> On Thu, 2018-12-20 at 09:10 -0800, Rodrigo Vivi wrote:
> > On Thu, Dec 20, 2018 at 02:21:20PM +0100, Hans de Goede wrote:
> > > Call intel_psr_enable() and intel_edp_drrs_enable() on pipe
> > > updates
> > > to make
> > > sure that we
Somehow the code to put the damage blob on destroy plane state and set
the blob to NULL when duplicate plane state was not merged. May be
because the files are refactored since the patch was written. With this
fix add those.
Cc: Daniel Vetter
Signed-off-by: Deepak Rawat
---
drivers/gpu/drm/drm_
On Fri, 2018-12-21 at 10:23 -0700, Ross Zwisler wrote:
> The following commit:
>
> commit 2bdd045e3a30 ("drm/i915/psr: Check if VBT says PSR can be
> enabled.")
>
> added some code with no usable functionality. Regardless of how the
> psr
> default is set up in the BDB_DRIVER_FEATURES section, i
Am 21.12.18 um 19:35 schrieb Dmitry Osipenko:
> On 21.12.2018 21:27, Christian König wrote:
>> Am 19.12.18 um 18:53 schrieb Dmitry Osipenko:
>>> [SNIP]
@@ -931,9 +718,6 @@ static signed long
drm_syncobj_array_wait_timeout(struct drm_syncobj **syncobjs,
if (flags & DRM_SYNCO
Am 20.12.18 um 20:23 schrieb Andrey Grodzovsky:
Decauple sched threads stop and start and ring mirror
list handling from the policy of what to do about the
guilty jobs.
When stoppping the sched thread and detaching sched fences
from non signaled HW fenes wait for all signaled HW fences
to complet
Already fixed here:
https://cgit.freedesktop.org/drm/drm/commit/?id=7e07834c12b96214e95a473f7b14fc03b20e2e7a
Thanks,
Alex
On Fri, Dec 21, 2018 at 9:59 AM Brajeswar Ghosh
wrote:
>
> Remove ppatomctrl.h which is included more than once
>
> Signed-off-by: Brajeswar Ghosh
> ---
> drivers/gpu/drm/
On Thu, 20 Dec 2018 10:30:25 -0700, Jordan Crouse wrote:
> Add documentation for the interconnect and interconnect-names bindings
> for the GPU node as detailed by bindings/interconnect/interconnect.txt.
>
> Signed-off-by: Jordan Crouse
> ---
>
> Documentation/devicetree/bindings/display/msm/gp
Am 19.12.18 um 18:53 schrieb Dmitry Osipenko:
[SNIP]
@@ -931,9 +718,6 @@ static signed long drm_syncobj_array_wait_timeout(struct
drm_syncobj **syncobjs,
if (flags & DRM_SYNCOBJ_WAIT_FLAGS_WAIT_FOR_SUBMIT) {
for (i = 0; i < count; ++i) {
- if (entrie
On Sat, 8 Dec 2018 18:12:43 +0100, Martin Blumenstingl wrote:
> Add a compatible string for the Mali-450 GPU on Amlogic Meson8 and
> Meson8b SoCs. Meson8 uses an "MP6" variant with six pixel processors
> while Meson8b (as cost-reduced SoC) uses an "MP2" variant with two pixel
> processors. Both ha
On Thu, Dec 20, 2018 at 03:55:27PM +0100, Daniel Vetter wrote:
> On Thu, Dec 20, 2018 at 02:28:55PM +, Winkler, Tomas wrote:
> >
> >
> > > On Wed, 19 Dec 2018, "Winkler, Tomas" wrote:
> > > >>
> > > >> On Wed, 19 Dec 2018, "C, Ramalingam" wrote:
> > > >> > On 12/19/2018 8:05 PM, Daniel Vett
https://bugs.freedesktop.org/show_bug.cgi?id=109124
--- Comment #1 from Sylvain BERTRAND ---
git of drm/llvm/mesa/linux(amd-staging-drm-next) no older than a week.
amdgpu module
--
You are receiving this mail because:
You are the assignee for the bug.
https://bugs.freedesktop.org/show_bug.cgi?id=109122
--- Comment #2 from vele...@gmail.com ---
Created attachment 142872
--> https://bugs.freedesktop.org/attachment.cgi?id=142872&action=edit
dmesg attachment with kernel 4.19.11 and amdgpu.dc=0
--
You are receiving this mail because:
You are the
Alex Deucher writes:
> On Fri, Dec 21, 2018 at 9:16 AM Liviu Dudau wrote:
>>
>> On Thu, Dec 20, 2018 at 04:36:19PM +0100, Daniel Vetter wrote:
>> > On Thu, Dec 20, 2018 at 09:56:57AM -0500, Alex Deucher wrote:
>> > > I'm not familiar enough with ARM to know if write combining
>> > > is actually
As far as we discussed this internally looks good to me, but obviously
we need to wait for some feedback from non AMD people.
Acked-by: Andrey Grodzovsky
Andrey
On 12/21/2018 09:33 AM, Nicholas Kazlauskas wrote:
> The behavior of drm_atomic_helper_cleanup_planes differs depending on
> whether
https://bugzilla.kernel.org/show_bug.cgi?id=201539
--- Comment #8 from Tony Chaveiro (tcha...@gmail.com) ---
(In reply to Alex Deucher from comment #7)
> Does setting amdgpu.dpm=1 on 4.19 help? The default dpm implementation
> changed between 4.18 and 4.19.
amdgpu.dpm=1 produces black screen (un
On 2018-12-21 2:26 p.m., Daniel Vetter wrote:
> On Fri, Dec 21, 2018 at 10:47:27AM +0100, Michel Dänzer wrote:
>> On 2018-12-20 6:16 p.m., Michel Dänzer wrote:
>>> On 2018-12-20 6:09 p.m., Daniel Vetter wrote:
On Thu, Dec 20, 2018 at 6:03 PM Alex Deucher wrote:
> On Thu, Dec 20, 2018 at 1
https://bugzilla.kernel.org/show_bug.cgi?id=201539
Alex Deucher (alexdeuc...@gmail.com) changed:
What|Removed |Added
CC||alexdeuc...@gmail.c
On Fri, Dec 21, 2018 at 9:16 AM Liviu Dudau wrote:
>
> On Thu, Dec 20, 2018 at 04:36:19PM +0100, Daniel Vetter wrote:
> > On Thu, Dec 20, 2018 at 09:56:57AM -0500, Alex Deucher wrote:
> > > I'm not familiar enough with ARM to know if write combining
> > > is actually an architectural limitation or
The behavior of drm_atomic_helper_cleanup_planes differs depending on
whether the commit was an asynchronous update or not.
For a typical (non-async) atomic commit prepare_fb is called on the
new_plane_state and cleanup_fb is called on the old_plane_state.
However, async commits are performed in
On Thu, Dec 20, 2018 at 04:36:19PM +0100, Daniel Vetter wrote:
> On Thu, Dec 20, 2018 at 09:56:57AM -0500, Alex Deucher wrote:
> > I'm not familiar enough with ARM to know if write combining
> > is actually an architectural limitation or if it's an issue
> > with the PCIe IPs used on various platfo
On Fri, Dec 21, 2018 at 10:52:38AM +0800, Zhenyu Wang wrote:
> On 2018.12.20 12:33:35 +0100, Gerd Hoffmann wrote:
> > On Thu, Dec 20, 2018 at 08:45:09AM +, Zhang, Tina wrote:
> > >
> > >
> > > > -Original Message-
> > > > From: intel-gvt-dev
> > > > [mailto:intel-gvt-dev-boun...@list
On Fri, Dec 21, 2018 at 12:51:05PM +0900, Tomasz Figa wrote:
> On Thu, Dec 20, 2018 at 7:47 PM Daniel Vetter wrote:
> >
> > On Thu, Dec 20, 2018 at 10:07 AM Tomasz Figa wrote:
> > >
> > > Hi Helen,
> > >
> > > On Fri, Dec 14, 2018 at 10:35 AM Helen Koike
> > > wrote:
> > > >
> > > > Hi Tomasz,
Hi Linus,
drm-fixes-2018-12-21:
final drm-fixes for 4.20
array_index_nospec patch, cc: stable
Very calm week, so either everything perfect or everyone on holidays
already. Same for -next btw, I merged a few things but nothing that should
block Dave's main merge window pull, so that one is still
On Fri, 21 Dec 2018 at 12:33, Tvrtko Ursulin
wrote:
>
>
> Hi,
>
> On 21/12/2018 10:33, Vincent Guittot wrote:
> > Use the new pm runtime interface to get the accounted suspended time:
> > pm_runtime_suspended_time().
> > This new interface helps to simplify and cleanup the code that computes
> > _
On Fri, Dec 21, 2018 at 10:47:27AM +0100, Michel Dänzer wrote:
> On 2018-12-20 6:16 p.m., Michel Dänzer wrote:
> > On 2018-12-20 6:09 p.m., Daniel Vetter wrote:
> >> On Thu, Dec 20, 2018 at 6:03 PM Alex Deucher wrote:
> >>> On Thu, Dec 20, 2018 at 11:54 AM Daniel Vetter wrote:
> >>
> Not sur
Hi Sharat,
FYI, the error/warning still remains.
tree: git://people.freedesktop.org/~agd5f/linux.git amd-staging-drm-next
head: 7db9c45feec5ae730138e68b64eb945bd54891ca
commit: b411997efe8f34b22824461b118a6eacae232b9b [500/630] drm/scheduler: Add
drm_sched_suspend/resume_timeout()
config: ar
Hi Matt,
On Thu, Dec 13, 2018 at 01:55:25PM -0800, Matt Roper wrote:
> Some hardware may place additional restrictions on the gamma/degamma
> curves described by our LUT properties. E.g., that a gamma curve never
> decreases or that the red/green/blue channels of a LUT's entries must be
> equal.
On Fri, 21 Dec 2018 at 11:34, Vincent Guittot
wrote:
>
> From: Thara Gopinath
>
> This patch replaces jiffies based accounting for runtime_active_time
> and runtime_suspended_time with ktime base accounting. This makes the
> runtime debug counters inline with genpd and other pm subsytems which
>
Hi Bartlomiej,
On 12/20/2018 07:21 PM, Bartlomiej Zolnierkiewicz wrote:
> On 11/26/2018 11:02 AM, Konstantin Khorenko wrote:
>> Scrollback frame buffer is rather big - 32K,
>> so it requires 3rd order page, so let's use kvmalloc() instead of
>> ordinary kmalloc() for it.
>
> Is it actually safe to
Remove hwmgr_ppt.h which is included more than once
Signed-off-by: Brajeswar Ghosh
---
drivers/gpu/drm/amd/powerplay/inc/hwmgr.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
index e5a60aa44b5d..07d180ce4
Add komeda_kms abstracton to attach komeda_dev to DRM-KMS
CRTC: according to the komeda_pipeline
PLANE: according to komeda_layer (layer input pipeline)
PRIVATE_OBJS: komeda_pipeline/component all will be treat as private_objs
komeda_kms is for connecting DRM-KMS and komeda_dev, like reporti
Implement a simple wrapper for platform module to build komeda to module,
Also add a very simple D71 layer code to show how to discover a product.
Komeda driver direct bind the product ENTRY function xxx_identity to DT
compatible name like:
d71_product = {
.product_id = MALIDP_D71_PRODUCT_
Hi,
On 21/12/2018 10:33, Vincent Guittot wrote:
Use the new pm runtime interface to get the accounted suspended time:
pm_runtime_suspended_time().
This new interface helps to simplify and cleanup the code that computes
__I915_SAMPLE_RC6_ESTIMATED and to remove direct access to internals of
PM r
Hi Lucas,
On Wed, Dec 19, 2018 at 4:40 PM Lucas Stach wrote:
>
> On a NOP double buffer update where current buffer address is the same
> as the next buffer address, the SDW_UPDATE bit clears too late.
What does this mean, exactly? Does the hardware behave differently
if the writel to IPU_PRE_NE
Move pm_runtime accounted time to raw nsec. The subject of the patchset
has changed as the 1st patch of the previous version has been queued by
Rafael.
Patch 1 adds a new pm_runtime interface to get accounted suspended time
Patch 2 moves drm/i915 driver on the new interface and removes access to
Use the new pm runtime interface to get the accounted suspended time:
pm_runtime_suspended_time().
This new interface helps to simplify and cleanup the code that computes
__I915_SAMPLE_RC6_ESTIMATED and to remove direct access to internals of
PM runtime.
Reviewed-by: Ulf Hansson
Signed-off-by: Vi
Some drivers (like i915/drm) needs to get the accounted suspended time.
pm_runtime_suspended_time() will return the suspended accounted time
in ns unit.
Reviewed-by: Ulf Hansson
Signed-off-by: Vincent Guittot
---
drivers/base/power/runtime.c | 16
include/linux/pm_runtime.h |
From: Thara Gopinath
This patch replaces jiffies based accounting for runtime_active_time
and runtime_suspended_time with ktime base accounting. This makes the
runtime debug counters inline with genpd and other pm subsytems which
uses ktime based accounting.
timekeeping is initialized before pm_
Hi Rafael,
On Fri, 21 Dec 2018 at 09:58, Rafael J. Wysocki wrote:
>
> On Thu, Dec 20, 2018 at 11:03 PM Ulf Hansson wrote:
> >
> > On Thu, 20 Dec 2018 at 15:17, Vincent Guittot
> > wrote:
> > >
> > > From: Thara Gopinath
> > >
> > > This patch replaces jiffies based accounting for runtime_activ
v2: Adjusted the position of KOMEDA by alphabetical order
Signed-off-by: James (Qian) Wang
---
MAINTAINERS | 9 +
1 file changed, 9 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 254b7b267731..e48c2e5fd29f 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1124,6 +1124,15 @@ S:
v2: Some editing changes according to Randy Dunlap's comments
Signed-off-by: James (Qian) Wang
---
Documentation/gpu/drivers.rst| 1 +
Documentation/gpu/komeda-kms.rst | 488 +++
2 files changed, 489 insertions(+)
create mode 100644 Documentation/gpu/komeda-kms
Add komeda_kms abstracton to attach komeda_dev to DRM-KMS
CRTC: according to the komeda_pipeline
PLANE: according to komeda_layer (layer input pipeline)
PRIVATE_OBJS: komeda_pipeline/component all will be treat as private_objs
komeda_kms is for connecting DRM-KMS and komeda_dev, like reporti
komeda_framebuffer is for extending drm_framebuffer to add komeda own
attributes and komeda specific fb handling.
Changes in v3:
- Fixed style problem found by checkpatch.pl --strict.
Signed-off-by: James (Qian) Wang
---
drivers/gpu/drm/arm/display/komeda/Makefile | 3 +-
.../arm/display/ko
komeda_format_caps is for describing ARM display specific features and
limitations of a specific format, and format_caps will be linked into
&komeda_framebuffer like a extension of &drm_format_info.
And komed_format_caps_table will be initialized before the enum_resources,
since the layer features
Parse DT and initialize corresponding dev/pipeline attributes.
Changes in v3:
- Fixed style problem found by checkpatch.pl --strict.
Changes in v2:
- Unified abbreviation of "pipeline" to "pipe".
Signed-off-by: James (Qian) Wang
---
.../gpu/drm/arm/display/komeda/komeda_dev.c | 76 ++
On 12/19/18 2:26 PM, Gerd Hoffmann wrote:
If we got an error response code from the host, print it to the log.
Signed-off-by: Gerd Hoffmann
Reviewed-by: Oleksandr Andrushchenko
---
drivers/gpu/drm/virtio/virtgpu_vq.c | 12 ++--
1 file changed, 10 insertions(+), 2 deletions(-)
dif
Implement a simple wrapper for platform module to build komeda to module,
Also add a very simple D71 layer code to show how to discover a product.
Komeda driver direct bind the product ENTRY function xxx_identity to DT
compatible name like:
d71_product = {
.product_id = MALIDP_D71_PRODUCT_
Add DT bindings documentation for the ARM display processor D71 and later
IPs.
Signed-off-by: James (Qian) Wang
Changes in v3:
- Deleted unnecessary property: interrupt-names.
- Dropped 'ports' and moving 'port' up a level.
---
.../bindings/display/arm/arm,komeda.txt | 79
1. Added a brief definition of komeda_dev/pipeline/component, this change
didn't add the detailed component features and capabilities, which will
be added in the following changes.
2. Corresponding resources discovery and initialzation functions.
Signed-off-by: James (Qian) Wang
Changes in
This is the first patchset of ARM new komeda display driver, this patchset
added all basic structure of komeda, relationship of DRM-KMS with komeda,
for tring to give a brife overview of komeda-driver.
komeda is for supporting the ARM display processor D71 and later IPs, Since from
D71, Arm displa
On 2018-12-20 6:38 p.m., Kazlauskas, Nicholas wrote:
> On 12/20/18 12:09 PM, Daniel Vetter wrote:
>> On Thu, Dec 20, 2018 at 6:03 PM Alex Deucher wrote:
>>> On Thu, Dec 20, 2018 at 11:54 AM Daniel Vetter wrote:
Not sure about the gamma thing since we had opposite bugs on i915
about
https://bugs.freedesktop.org/show_bug.cgi?id=109127
--- Comment #1 from Michel Dänzer ---
(In reply to john.alexander from comment #0)
> Using recent AMDGPU source code [...]
Which commit of which branch exactly? If it's a regression, can you bisect?
Please attach the corresponding output of dm
On 2018-12-20 6:16 p.m., Michel Dänzer wrote:
> On 2018-12-20 6:09 p.m., Daniel Vetter wrote:
>> On Thu, Dec 20, 2018 at 6:03 PM Alex Deucher wrote:
>>> On Thu, Dec 20, 2018 at 11:54 AM Daniel Vetter wrote:
>>
Not sure about the gamma thing since we had opposite bugs on i915
about gamma
https://bugs.freedesktop.org/show_bug.cgi?id=109127
Bug ID: 109127
Summary: E9260 not working with recent software/firmware
Product: DRI
Version: unspecified
Hardware: x86-64 (AMD64)
OS: Linux (All)
Status: NEW
On 12/20/18 8:38 PM, Christoph Hellwig wrote:
On Thu, Dec 20, 2018 at 07:35:15PM +0100, Daniel Vetter wrote:
Err, with streaming DMA buffer sharing is trivial. The coherent DMA
allocator is what causes all kinds of horrible hacks that can't actually
work on various platforms.
Hm, I thought the
https://bugs.freedesktop.org/show_bug.cgi?id=109122
Michel Dänzer changed:
What|Removed |Added
CC||harry.wentl...@amd.com,
On 2018-12-21 4:10 a.m., Yu Zhao wrote:
> When creating frame buffer, userspace may request to attach to a
> previously allocated GEM object that is smaller than what GPU
> requires. Validation must be done to prevent out-of-bound DMA,
> which could not only corrupt memory but also reveal sensitive
On 2018-12-21 4:10 a.m., Yu Zhao wrote:
> Userspace may request pitch alignment that is not supported by GPU.
> Some requests 32, but GPU ignores it and uses default 64 when cpp is
> 4. If GEM object is allocated based on the smaller alignment, GPU
> DMA will go out of bound.
>
> For GPU that does
On 2018-12-21 4:10 a.m., Yu Zhao wrote:
> Userspace may request pitch alignment that is not supported by GPU.
> Some requests 32, but GPU ignores it and uses default 64 when cpp is
> 4. If GEM object is allocated based on the smaller alignment, GPU
> DMA will go out of bound.
>
> For GPU that does
Regards
Shashank
On 12/12/2018 2:08 AM, Uma Shankar wrote:
From: Ville Syrjälä
Function argument for hdmi_drm_infoframe_log is made constant.
Signed-off-by: Ville Syrjälä
Signed-off-by: Uma Shankar
---
drivers/video/hdmi.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff
On Thu, Dec 20, 2018 at 11:03 PM Ulf Hansson wrote:
>
> On Thu, 20 Dec 2018 at 15:17, Vincent Guittot
> wrote:
> >
> > From: Thara Gopinath
> >
> > This patch replaces jiffies based accounting for runtime_active_time
> > and runtime_suspended_time with ktime base accounting. This makes the
> > r
On 2018-12-21 4:10 a.m., Yu Zhao wrote:
> Fix race between page flip job submission and completion. We invoke
> page_flip callback to submit page flip job to GPU first and then set
> pflip_status. If GPU fires page flip done irq in between, its handler
> won't see the correct pflip_status thus will
Regards
Shashank
On 12/12/2018 2:08 AM, Uma Shankar wrote:
From: Ville Syrjälä
This patch enables infoframes on GLK+ to be
used to send HDR metadata to HDMI sink.
Signed-off-by: Ville Syrjälä
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/i915/i915_reg.h | 4
drivers/gpu/drm/i9
Regards
Shashank
On 12/12/2018 2:08 AM, Uma Shankar wrote:
From: Ville Syrjälä
ADD HLG EOTF to the list of EOTF transfer functions
supported.
Would it be possible to add some details about HLG ?
Signed-off-by: Ville Syrjälä
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/drm_edid.c | 4
[...]
> > > > Re-thinking this a bit from my earlier comments - and by following the
> > > > above reasoning, it sounds like this better belongs in the
> > > > driver/subsystem, without requiring any data from the core.
> > > >
> > > > The driver/subsystem could just store a timestamp in it's
> >
Quoting Matthias Kaehlcke (2018-12-19 15:55:24)
> Get the ref clock of the PHY from the device tree instead of
> hardcoding its name and rate.
>
> Note: This change could break old out-of-tree DTS files that
> use the 14nm PHY.
>
> Signed-off-by: Matthias Kaehlcke
> Reviewed-by: Douglas Anderson
Fix race between page flip job submission and completion. We invoke
page_flip callback to submit page flip job to GPU first and then set
pflip_status. If GPU fires page flip done irq in between, its handler
won't see the correct pflip_status thus will refuse to notify the job
completion. The job wi
On Thu, 20 Dec 2018 at 15:17, Vincent Guittot
wrote:
>
> Use the new pm runtime interface to get the accounted suspended time:
> pm_runtime_accounted_time_get()
pm_runtime_suspended_time()
This change also makes quite some nice cleanups to the code, which is
mostly because of converting to the n
On Thu, 2018-12-20 at 08:08 +0100, Daniel Vetter wrote:
> I screwed up a rebase somehow.
>
> v2: Drop bogus hunk.
>
> Cc: Lubomir Rintel
> Signed-off-by: Daniel Vetter
> ---
> Documentation/gpu/drm-kms-helpers.rst | 4 ++--
> drivers/gpu/drm/i915/intel_drv.h | 33
> ++
Quoting Matthias Kaehlcke (2018-12-19 15:55:25)
> Get the ref clock of the PHY from the device tree instead of
> hardcoding its name and rate.
>
> Note: This change could break old out-of-tree DTS files that
> use the 10nm PHY
>
> Signed-off-by: Matthias Kaehlcke
> Reviewed-by: Douglas Anderson
Assuming this is using the firmware interface then yes it's fine. If it is
using the i2c directly then it's possible to clash with the GPU driving the
camera
Gordon
On Thu, 20 Dec 2018, 18:33 Eric Anholt, wrote:
> Nicolas Saenz Julienne writes:
>
> > This patch exposes backlight control into
Move mipi_dsi_dcs_set_display_off() from innolux_panel_disable()
to innolux_panel_unprepare(), so they are consistent with
innolux_panel_enable() and innolux_panel_prepare().
This also fixes some mode check and irq timeout issue in MTK dsi code.
Since some dsi code (e.g. mtk_dsi) have following c
On Thu, 20 Dec 2018 at 15:17, Vincent Guittot
wrote:
>
> From: Thara Gopinath
>
> This patch replaces jiffies based accounting for runtime_active_time
> and runtime_suspended_time with ktime base accounting. This makes the
> runtime debug counters inline with genpd and other pm subsytems which
>
Remove reg_helper.h which is included more than once
Signed-off-by: Brajeswar Ghosh
---
.../gpu/drm/amd/display/dc/i2caux/dce110/i2c_hw_engine_dce110.c | 1 -
1 file changed, 1 deletion(-)
diff --git
a/drivers/gpu/drm/amd/display/dc/i2caux/dce110/i2c_hw_engine_dce110.c
b/drivers/gpu/drm/amd/
On Wed, 19 Dec 2018 at 17:52, Vincent Guittot
wrote:
>
> On Wed, 19 Dec 2018 at 17:36, Ulf Hansson wrote:
> >
> > On Wed, 19 Dec 2018 at 14:26, Vincent Guittot
> > wrote:
> > >
> > > On Wed, 19 Dec 2018 at 11:43, Ulf Hansson wrote:
> > > >
> > > > On Wed, 19 Dec 2018 at 11:34, Vincent Guittot
>
On Thu, 20 Dec 2018 at 15:16, Vincent Guittot
wrote:
>
> Some drivers (like i915/drm) needs to get the accounted suspended time.
> pm_runtime_suspended_time() will return the suspended accounted time
> in ns unit.
>
> Signed-off-by: Vincent Guittot
Reviewed-by: Ulf Hansson
Kind regards
Uffe
>
Hi,
On Mon, Dec 10, 2018 at 03:06:17AM +0200, Laurent Pinchart wrote:
> This patch series hooks up support for drm_bridge and drm_panel in the omapdrm
> driver.
>
> [...]
The series is
Reviewed-by: Sebastian Reichel
At the same time it is tested to break display on Droid 4. I don't
know the ex
Remove custom_float.h which is included more than once
Signed-off-by: Brajeswar Ghosh
---
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c
b/drivers/gpu/drm/amd/disp
Rob, any comment ?
On Fri, Dec 7, 2018 at 1:59 PM Mathieu Malaterre wrote:
>
> This is a partial revert of commit 5c63e407aaab ("fbdev: Convert to
> using %pOFn instead of device_node.name"). This is the minimal work to
> get a Mac Mini G4 back to a bootable state. The function
> offb_init_palett
On Thu, 2018-12-20 at 18:36 +, Gordon Hollingworth wrote:
> Assuming this is using the firmware interface then yes it's fine. If
> it is using the i2c directly then it's possible to clash with the GPU
> driving the camera
Well we're already in such a situation without this patch, as the panel
Userspace may request pitch alignment that is not supported by GPU.
Some requests 32, but GPU ignores it and uses default 64 when cpp is
4. If GEM object is allocated based on the smaller alignment, GPU
DMA will go out of bound.
For GPU that does frame buffer compression, DMA writing out of bound
When creating frame buffer, userspace may request to attach to a
previously allocated GEM object that is smaller than what GPU
requires. Validation must be done to prevent out-of-bound DMA,
which could not only corrupt memory but also reveal sensitive data.
This fix is not done in a common code pa
Regards
Shashank
On 12/12/2018 2:08 AM, Uma Shankar wrote:
Enable writing of HDR metadata infoframe to panel.
The data will be provid by usersapace compositors, based
on blending policies and passsed to driver through a blob
property.
v2: Rebase
Signed-off-by: Uma Shankar
---
drivers/gpu/
Regards
Shashank
On 12/12/2018 2:08 AM, Uma Shankar wrote:
Enable Dynamic Range and Mastering Infoframe for HDR
content, which is defined in CEA 861.3 spec.
The metadata will be computed based on blending
policy in userspace compositors and passed as a connector
property blob to driver. The s
On Thu, 20 Dec 2018 at 23:03, Ulf Hansson wrote:
>
> On Thu, 20 Dec 2018 at 15:17, Vincent Guittot
> wrote:
> >
> > From: Thara Gopinath
> >
> > This patch replaces jiffies based accounting for runtime_active_time
> > and runtime_suspended_time with ktime base accounting. This makes the
> > runt
On Thu, 20 Dec 2018 at 23:04, Ulf Hansson wrote:
>
> On Thu, 20 Dec 2018 at 15:17, Vincent Guittot
> wrote:
> >
> > Use the new pm runtime interface to get the accounted suspended time:
> > pm_runtime_accounted_time_get()
>
> pm_runtime_suspended_time()
>
> This change also makes quite some nice
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