On Thu, Feb 07, 2019 at 07:22:37AM +, C, Ramalingam wrote:
> Sure. Intention was enabling the HDCP2.2 testing on CI for ICL. I will
> drop this patch, instead I will cherry-pick the one you have published
> for other branch.
We still need this for merging in some form, otherwise CI on our end
Hi Dave and Daniel, i915 display fixes for v5.0-rc6.
BR,
Jani.
The following changes since commit 8834f5600cf3c8db365e18a3d5cac2c2780c81e5:
Linux 5.0-rc5 (2019-02-03 13:48:04 -0800)
are available in the Git repository at:
git://anongit.freedesktop.org/drm/drm-intel
https://bugzilla.kernel.org/show_bug.cgi?id=202511
Christian König (christian.koe...@amd.com) changed:
What|Removed |Added
CC|
Sure. Intention was enabling the HDCP2.2 testing on CI for ICL. I will drop
this patch, instead I will cherry-pick the one you have published for other
branch.
Best Regards,
Ramalingam C
> -Original Message-
> From: Winkler, Tomas
> Sent: Thursday, February 7, 2019 12:47 PM
> To: C,
>
> From: Tomas Winkler
>
> Add icelake device ids: ICP LP, N and H
>
> Signed-off-by: Tomas Winkler
NACK, this goes via mei driver submission process.
Please drop it from the series.
> ---
> drivers/misc/mei/hw-me-regs.h | 4
> drivers/misc/mei/pci-me.c | 4
> 2 files
https://bugzilla.kernel.org/show_bug.cgi?id=202511
--- Comment #5 from Bjorn Helgaas (bhelg...@google.com) ---
The bisect log in comment #3 shows 3a3869f1c443 ("Merge tag 'pci-v4.18-changes'
of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci") as the first bad
commit. That's a large
Paul Kocialkowski writes:
> From: Boris Brezillon
>
> Add a debugfs entry and helper for reporting HVS underrun errors as
> well as helpers for masking and unmasking the underrun interrupts.
> Add an IRQ handler and initial IRQ configuration.
> Rework related register definitions to take the
Paul Kocialkowski writes:
> When the pipeline is reconfigured with a different mode, changes take
> effect immediately for the CRTC and encoder while the HVS takes some
> time to switch the active display list. This results in a period of
> time where the pipeline is out of sync, that is very
The HW only executes a load once the tile coordinates packet happens,
and only tracks one at a time, so by emitting our two MSAA loads back
to back we would end up with an undefined color or Z buffer.
Fixes dEQP-EGL.functional.render.multi_context.gles2.rgb888_window
Signed-off-by: Eric Anholt
Both video and command physical encoders will have
a hw interface assigned to it. So there is really no
need to track the hw block in specific encoder subclass.
Signed-off-by: Jeykumar Sankaran
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h | 4 +-
Not holding any video encoder specific data. Get rid of it.
Signed-off-by: Jeykumar Sankaran
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h | 11 ---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c | 18 --
2 files changed, 4 insertions(+), 25 deletions(-)
https://bugzilla.kernel.org/show_bug.cgi?id=202511
Alex Deucher (alexdeuc...@gmail.com) changed:
What|Removed |Added
CC|
https://bugzilla.kernel.org/show_bug.cgi?id=202511
--- Comment #3 from Michael A. Leonetti (mikealeone...@gmail.com) ---
Created attachment 281033
--> https://bugzilla.kernel.org/attachment.cgi?id=281033=edit
bisect log
Here is the bisect log as requested.
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You are receiving this mail
Rob Herring writes:
> Many users of drm_gem_object embed a struct reservation_object into
> their subclassed struct, so let's add one to struct drm_gem_object.
> This will allow removing the reservation object from the subclasses
> and removing the ->gem_prime_res_obj callback.
>
> With the
) On Wed, Feb 6, 2019 at 5:46 PM Daniel Vetter wrote:
>
> Component framework is extended to support multiple components for
> a struct device. These will be matched with different masters based on
> its sub component value.
>
> We are introducing this, as I915 needs two different components
>
https://bugs.freedesktop.org/show_bug.cgi?id=108514
--- Comment #14 from Paul Dufresne ---
I had determined that 3.15-rc2 was the first version where flickering appears.
I guess it could be related to:
https://lists.freedesktop.org/archives/dri-devel/2014-April/057800.html
--
You are receiving
On Wed, Feb 6, 2019 at 5:47 PM Daniel Vetter wrote:
>
> While typing these I think doing an s/component_master/aggregate/
> would be useful:
> - it's shorter :-)
> - I think component/aggregate is much more meaningful naming than
> component/puppetmaster or something like that. At least to my
>
https://bugs.freedesktop.org/show_bug.cgi?id=109561
--- Comment #3 from Timothy Arceri ---
The fix doesn't apply to master.
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You are receiving this mail because:
You are the assignee for the bug.___
dri-devel mailing list
Pruning 4k60 modes.
Signed-off-by: Ramalingam C
---
drivers/gpu/drm/i915/intel_hdmi.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c
b/drivers/gpu/drm/i915/intel_hdmi.c
index c2c91e6645a5..d60713cd658c 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++
Daniel,
Due to significant changes @unbind and cleanup, i have dropped your r-b.
Please review it again.
--Ram
On 2/7/2019 2:33 AM, Ramalingam C wrote:
Defining the mei-i915 interface functions and initialization of
the interface.
v2:
Adjust to the new interface changes. [Tomas]
https://bugs.freedesktop.org/show_bug.cgi?id=109561
--- Comment #2 from Timothy Arceri ---
(In reply to Nicolai Hähnle from comment #1)
> Created attachment 143321 [details] [review]
> fix some issues
>
> I cannot reproduce the hang, unfortunately. What hardware do you get the
> hang with?
This patch adds appropriate kernel documentation for DRM DP helpers
used for enabling Display Stream compression functionality in
drm_dp_helper.h and drm_dp_helper.c as well as for the DSC spec
related structure definitions and helpers in drm_dsc.c and drm_dsc.h
Also add links between the
On 2/6/2019 3:57 PM, Winkler, Tomas wrote:
Request ME FW to start the HDCP2.2 session for an intel port.
Prepares payloads for command WIRED_INITIATE_HDCP2_SESSION and
sends
to
ME FW.
On Success, ME FW will start a HDCP2.2 session for the port and
provides the content for HDCP2.2 AKE_Init
https://bugs.freedesktop.org/show_bug.cgi?id=109561
--- Comment #1 from Nicolai Hähnle ---
Created attachment 143321
--> https://bugs.freedesktop.org/attachment.cgi?id=143321=edit
fix some issues
I cannot reproduce the hang, unfortunately. What hardware do you get the hang
with?
There is
Request ME to verify the downstream topology information received.
ME FW will validate the Repeaters receiver id list and
downstream topology.
On Success ME FW will provide the Least Significant
128bits of VPrime, which forms the repeater ack.
v2: Rebased.
v3:
cldev is passed as first
Request to ME to verify the M_Prime received from the HDCP sink.
ME FW will calculate the M and compare with M_prime received
as part of RepeaterAuth_Stream_Ready, which is HDCP2.2 protocol msg.
On successful completion of this stage, downstream propagation of
the stream management info is
Request the ME to terminate the HDCP2.2 session for a port.
On Success, ME FW will mark the intel port as Deauthenticated and
terminate the wired HDCP2.2 Tx session started due to the cmd
WIRED_INITIATE_HDCP2_SESSION.
v2: Rebased.
v3:
cldev is passed as first parameter [Tomas]
Redundant
Mei hdcp driver is designed as component slave for the I915 component
master.
v2: Rebased.
v3:
Notifier chain is adopted for cldev state update [Tomas]
v4:
Made static dummy functions as inline in mei_hdcp.h
API for polling client device status
IS_ENABLED used in header, for config status
FOR TESTING PURPOSE ONLY.
By default INTEL_MEI_HDCP is set to y. This patch is created to
test the interface between I915 and MEI_HDCP.
Signed-off-by: Ramalingam C
---
drivers/misc/mei/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/misc/mei/Kconfig
Just excluding the LSPCon HDMI ports from the HDCP1.4 testing.
Signed-off-by: Ramalingam C
---
drivers/gpu/drm/i915/i915_debugfs.c | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
b/drivers/gpu/drm/i915/i915_debugfs.c
index
Requests ME to start the second stage of HDCP2.2 authentication,
called Locality Check.
On Success, ME FW will provide LC_Init message to send to hdcp sink.
v2: Rebased.
v3:
cldev is passed as first parameter [Tomas]
Redundant comments and cast are removed [Tomas]
v4:
%zd used for ssize_t
Request to ME to prepare the encrypted session key.
On Success, ME provides Encrypted session key. Function populates
the HDCP2.2 authentication msg SKE_Send_Eks.
v2: Rebased.
v3:
cldev is passed as first parameter [Tomas]
Redundant comments and cast are removed [Tomas]
v4:
%zd for ssize_t
Requests for verification for receiver certification and also the
preparation for next AKE auth message with km.
On Success ME FW validate the HDCP2.2 receivers certificate and do the
revocation check on the receiver ID. AKE_Stored_Km will be prepared if
the receiver is already paired, else
Request to ME to configure a port as authenticated.
On Success, ME FW will mark the port as authenticated and provides
HDCP cipher with the encryption keys.
Enabling the Authentication can be requested once all stages of
HDCP2.2 authentication is completed by interacting with ME FW.
Only after
Requests for the verification of AKE_Send_H_prime.
ME will calculate the H and comparing it with received H_Prime.
The result will be returned as status.
Here AKE_Send_H_prime is a HDCP2.2 Authentication msg.
v2: Rebased.
v3:
cldev is passed as first parameter [Tomas]
Redundant comments and
From: Tomas Winkler
Export to_mei_cl_device macro, it is needed also in mei client drivers.
Signed-off-by: Tomas Winkler
---
drivers/misc/mei/bus.c | 1 -
include/linux/mei_cl_bus.h | 2 ++
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/misc/mei/bus.c
Implements the
Waitqueue is created to wait for CP_IRQ
Signaling the CP_IRQ arrival through atomic variable.
For applicable DP HDCP2.2 msgs read wait for CP_IRQ.
As per HDCP2.2 spec "HDCP Transmitters must process CP_IRQ interrupts
when they are received from HDCP
The downgrade of the fullmodeset into fastset
intel_encoder->update_pipe, in possible scenario, skips the En/Dis-able
DDI. Hence breaks the HDCP state change handling.
We also don't have any hdcp tests in CI, because the shard runs don't
have hdcp capable outputs :-/
So this change fixs it by
Provides Pairing info to ME to store.
Pairing is a process to fast track the subsequent authentication
with the same HDCP sink.
On Success, received HDCP pairing info is stored in non-volatile
memory of ME.
v2: Rebased.
v3:
cldev is passed as first parameter [Tomas]
Redundant comments and
Request to ME to verify the LPrime received from HDCP sink.
On Success, ME FW will verify the received Lprime by calculating and
comparing with L.
This represents the completion of Locality Check.
v2: Rebased.
v3:
cldev is passed as first parameter [Tomas]
Redundant comments and cast are
Request ME FW to start the HDCP2.2 session for an intel port.
Prepares payloads for command WIRED_INITIATE_HDCP2_SESSION and sends
to ME FW.
On Success, ME FW will start a HDCP2.2 session for the port and
provides the content for HDCP2.2 AKE_Init message.
v2: Rebased.
v3:
cldev is add as a
From: Tomas Winkler
Whitelist HDCP client for in kernel drm use
v2:
Rebased.
Signed-off-by: Tomas Winkler
---
drivers/misc/mei/bus-fixup.c | 16
1 file changed, 16 insertions(+)
diff --git a/drivers/misc/mei/bus-fixup.c b/drivers/misc/mei/bus-fixup.c
index
ME FW contributes a vital role in HDCP2.2 authentication.
HDCP2.2 driver needs to communicate to ME FW for each step of the
HDCP2.2 authentication.
ME FW prepare and HDCP2.2 authentication parameters and encrypt them
as per spec. With such parameter Driver prepares HDCP2.2 auth messages
and
From: Tomas Winkler
Add icelake device ids: ICP LP, N and H
Signed-off-by: Tomas Winkler
---
drivers/misc/mei/hw-me-regs.h | 4
drivers/misc/mei/pci-me.c | 4
2 files changed, 8 insertions(+)
diff --git a/drivers/misc/mei/hw-me-regs.h b/drivers/misc/mei/hw-me-regs.h
index
Defines the HDCP specific ME FW interfaces such as Request CMDs,
payload structure for CMDs and their response status codes.
This patch defines payload size(Excluding the Header)for each WIRED
HDCP2.2 CMDs.
v2: Rebased.
v3:
Extra comments are removed.
v4:
%s/\/\*\*/\/\*
v5:
Extra lines are
HDCP transmitter is supposed to indicate the HDCP encryption status of
the link through enc_en signals in a window of time called "window of
opportunity" defined by HDCP HDMI spec.
But on KBL this timing of signalling has an issue. To fix the issue this
WA of resetting the signalling is required.
Defining the mei-i915 interface functions and initialization of
the interface.
v2:
Adjust to the new interface changes. [Tomas]
Added further debug logs for the failures at MEI i/f.
port in hdcp_port data is equipped to handle -ve values.
v3:
mei comp is matched for global i915 comp
Considering that HDCP2.2 is more secure than HDCP1.4, When a setup
supports HDCP2.2 and HDCP1.4, HDCP2.2 will be enabled.
When HDCP2.2 enabling fails and HDCP1.4 is supported, HDCP1.4 is
enabled.
This change implements a sequence of enabling and disabling of
HDCP2.2 authentication and HDCP2.2
Implements HDCP2.2 authentication for hdcp2.2 receivers, with
following steps:
Authentication and Key exchange (AKE).
Locality Check (LC).
Session Key Exchange(SKE).
DP Errata for stream type configuration for receivers.
At AKE, the HDCP Receiver’s public key
Since DP ERRATA message is not defined at spec, those structure
definition is removed from drm_hdcp.h
Signed-off-by: Ramalingam C
Suggested-by: Daniel Vetter
Reviewed-by: Daniel Vetter
Reviewed-by: Uma Shankar
---
include/drm/drm_hdcp.h | 6 --
1 file changed, 6 deletions(-)
diff --git
Implements the DP adaptation specific HDCP2.2 functions.
These functions perform the DPCD read and write for communicating the
HDCP2.2 auth message back and forth.
v2:
wait for cp_irq is merged with this patch. Rebased.
v3:
wait_queue is used for wait for cp_irq [Chris Wilson]
v4:
Style
When repeater notifies a downstream topology change, this patch
reauthenticate the repeater alone without disabling the hdcp
encryption. If that fails then complete reauthentication is executed.
v2:
Rebased.
v3:
Typo in commit msg is fixed [Uma]
v4:
Rebased as part of patch reordering.
Implements the HDMI adaptation specific HDCP2.2 operations.
Basically these are DDC read and write for authenticating through
HDCP2.2 messages.
v2: Rebased.
v3:
No more special handling of Gmbus burst read for AKE_SEND_CERT.
Style fixed with few naming. [Uma]
%s/PARING/PAIRING
v4:
msg_sz
Library functions for endianness are aligned for 16/32/64 bits.
But hdcp sequence numbers are 24bits(big endian).
So for their conversion to and from u32 helper functions are developed.
v2:
Comment is updated. [Daniel]
Reviewed-by Uma.
Signed-off-by: Ramalingam C
Reviewed-by: Daniel Vetter
Implements the link integrity check once in 500mSec.
Once encryption is enabled, an ongoing Link Integrity Check is
performed by the HDCP Receiver to check that cipher synchronization
is maintained between the HDCP Transmitter and the HDCP Receiver.
On the detection of synchronization lost, the
Time period for HDCP2.2 link check.
Signed-off-by: Ramalingam C
Reviewed-by: Daniel Vetter
Reviewed-by: Uma Shankar
---
include/drm/drm_hdcp.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/drm/drm_hdcp.h b/include/drm/drm_hdcp.h
index 7260b31af276..d4e98b11b4aa 100644
---
Implements the HDCP2.2 repeaters authentication steps such as verifying
the downstream topology and sending stream management information.
v2: Rebased.
v3:
-EINVAL is returned for topology error and rollover scenario.
Endianness conversion func from drm_hdcp.h is used [Uma]
v4:
Rebased as
All HDCP1.4 routines are gathered together, followed by the generic
functions those can be extended for HDCP2.2 too.
Signed-off-by: Ramalingam C
Acked-by: Daniel Vetter
Reviewed-by: Uma Shankar
---
drivers/gpu/drm/i915/intel_hdcp.c | 118 +++---
1 file changed,
Add the HDCP2.2 initialization to the existing HDCP1.4 stack.
v2:
mei interface handle is protected with mutex. [Chris Wilson]
v3:
Notifiers are used for the mei interface state.
v4:
Poll for mei client device state
Error msg for out of mem [Uma]
Inline req for init function removed
Header defines the interface for the I915 and MEI_HDCP drivers.
This interface is specific to the usage of mei_hdcp from gen9+
platforms for ME FW based HDCP2.2 services.
And Generic HDCP2.2 protocol specific definitions
are added at drm/drm_hdcp.h.
v2:
Commit msg is enhanced [Daniel]
v3:
"hdcp_encrypted" flag is defined to denote the HDCP1.4 encryption status.
This SW tracking is used to determine the need for real hdcp1.4 disable
and hdcp_check_link upon CP_IRQ.
On CP_IRQ we filter the CP_IRQ related to the states like Link failure
and reauthentication req etc and handle them in
This series enables the HDCP2.2 Type 0 for I915. The sequence for
HDCP2.2 authentication and encryption is implemented as a generic flow
between HDMI and DP. Encoder specific implementations are moved
into hdcp_shim.
Intel HWs supports HDCP2.2 through ME FW. Hence this series
introduces a client
From: Daniel Vetter
Component framework is extended to support multiple components for
a struct device. These will be matched with different masters based on
its sub component value.
We are introducing this, as I915 needs two different components
with different subcomponent value, which will be
From: Daniel Vetter
Since we need multiple components for I915 for different purposes
(Audio & Mei_hdcp), we adopt the subcomponents methodology introduced
by the previous patch (mentioned below).
Author: Daniel Vetter
Date: Mon Jan 28 17:08:20 2019 +0530
From: Daniel Vetter
Now that component has docs it's worth spending a few words and
hyperlinks on recommended best practices in drm.
Cc: Russell King - ARM Linux admin
Signed-off-by: Daniel Vetter
---
Documentation/driver-api/component.rst | 2 ++
Documentation/gpu/drm-internals.rst| 5
From: Daniel Vetter
While typing these I think doing an s/component_master/aggregate/
would be useful:
- it's shorter :-)
- I think component/aggregate is much more meaningful naming than
component/puppetmaster or something like that. At least to my
English ear "aggregate" emphasizes much
On Wed, Feb 6, 2019 at 1:42 PM Maxime Ripard wrote:
>
> Some SoCs have devices that are using a separate bus from the main bus to
> perform DMA.
>
> These buses might have some restrictions and/or different mapping than from
> the CPU side, so we'd need to express those using the usual
https://bugs.freedesktop.org/show_bug.cgi?id=109561
Timothy Arceri changed:
What|Removed |Added
Blocks||109535
Referenced Bugs:
On Wed, Feb 06, 2019 at 05:31:57PM -0200, Shayenne Moura wrote:
> Remove the list of broken tests on VKMS solved by patchset
> https://patchwork.freedesktop.org/series/55994/
>
> Signed-off-by: Shayenne Moura
Excellent work from you!
> ---
> Documentation/gpu/vkms.rst | 11 ---
> 1
On Wed, Feb 06, 2019 at 05:46:51PM +0100, Noralf Trønnes wrote:
>
>
> Den 06.02.2019 16.26, skrev Daniel Vetter:
> > On Tue, Feb 05, 2019 at 06:57:50PM +0100, Noralf Trønnes wrote:
> >>
> >>
> >> Den 05.02.2019 17.31, skrev Daniel Vetter:
> >>> On Tue, Feb 05, 2019 at 11:20:55AM +0100, Noralf
Make the variable have the same type of function hrtimer_forward_now
return.
Add a warn to verify the hrtimer_forward_now return.
Signed-off-by: Shayenne Moura
---
drivers/gpu/drm/vkms/vkms_crtc.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git
The __of_translate_address function is used to translate the device tree
addresses to physical addresses using the various ranges property to create
the offset.
However, it's shared between the CPU addresses (based on the ranges
property) and the DMA addresses (based on dma-ranges). Since we're
The MBUS clock is used by the MBUS controller, so let's export it so that
we can use it in our DT node.
Reviewed-by: Rob Herring
Signed-off-by: Maxime Ripard
---
drivers/clk/sunxi-ng/ccu-sun5i.h | 4
include/dt-bindings/clock/sun5i-ccu.h | 2 +-
2 files changed, 1 insertion(+), 5
On 2019-01-28 12:42, Sean Paul wrote:
From: Sean Paul
In the case of an async/cursor update, we don't wait for the frame_done
event, which means handle_frame_done is never called, and the
frame_done
watchdog isn't canceled. Currently, this results in a frame_done
timeout
every time the
On 2019-01-28 12:42, Sean Paul wrote:
From: Sean Paul
There exists a bunch of confusion as to what the actual units of
frame_done is:
- The definition states it's in # of frames
- CRTC treats it like it's ms
- frame_done_timeout comment thinks it's Hz, but it stores ms
- frame_done timer is
Dave, Daniel
A patch set from Christoph for vmwgfx dma mode detection breakage with the
new dma code restructuring in 5.0
A couple of fixes also CC'd stable
Finally an improved IOMMU detection that automatically enables dma mapping
also with other vIOMMUS than the intel one if present and
Old pull message. Please ignore. The correct one coming up.
/Thomas
On Wed, 2019-02-06 at 20:42 +0100, Thomas Hellstrom wrote:
> Hi, Dave
>
> Two minor fixes for the previous vmwgfx-next pull:
>
> The following changes since commit
> 9a01135b98b9d5a7033c544245da7aad0d886758:
>
>
Hi, Dave
Two minor fixes for the previous vmwgfx-next pull:
The following changes since commit 9a01135b98b9d5a7033c544245da7aad0d886758:
drm/vmwgfx: Use the standard atomic helpers for page-flip (2018-12-05
10:09:55 +0100)
are available in the Git repository at:
The MBUS controller drives the MBUS that other devices in the SoC will
use to perform DMA. It also has a register interface that allows to
monitor and control the bandwidth and priorities for masters on that
bus.
Signed-off-by: Maxime Ripard
---
Hi,
We've had for quite some time to hack around in our drivers to take into
account the fact that our DMA accesses are not done through the parent
node, but through another bus with a different mapping than the CPU for the
RAM (0 instead of 0x4000 for most SoCs).
After some discussion after
The current DT bindings assume that the DMA will be performed by the
devices through their parent DT node, and rely on that assumption for the
address translation using dma-ranges.
However, some SoCs have devices that will perform DMA through another bus,
with separate address translation rules.
The MBUS (and its associated controller) is the bus in the Allwinner SoCs
that DMA devices use in the system to access the memory.
Among other things (and depending on the SoC generation), it can also
enforce priorities or report bandwidth usages on a per-master basis.
One of the most notable
On 2019-01-28 12:42, Sean Paul wrote:
From: Sean Paul
Instead of setting the timeout and then immediately reading it back
(along with the hand-rolled msecs_to_jiffies calculation), just
calculate it once and set it in both places at the same time.
Signed-off-by: Sean Paul
---
Now that we can express our DMA topology, rely on those property instead of
hardcoding an offset from the dma_addr_t which wasn't really great.
We still need to add some code to deal with the old DT that would lack that
property, but we move the offset to the DRM device dma_pfn_offset to be
able
Some SoCs have devices that are using a separate bus from the main bus to
perform DMA.
These buses might have some restrictions and/or different mapping than from
the CPU side, so we'd need to express those using the usual dma-ranges, but
using a different DT node than the node's parent.
Add
https://bugs.freedesktop.org/show_bug.cgi?id=108514
--- Comment #13 from Paul Dufresne ---
I am comparing PLL values for a not flickering kernel:
Linux version 3.14.79-031479-generic
and version 4.15 (recent one):
Linux 4.15:
Flickering values
[5.554557] [drm:radeon_compute_pll_avivo
On Tue, Jan 29, 2019 at 02:10:01PM -0500, Lyude Paul wrote:
> This hotplug also isn't needed: drm_dp_mst_topology_mgr_set_mst()
> already sends a hotplug on its own from drm_dp_destroy_connector_work()
> after destroying connectors in the MST topology.
>
> Signed-off-by: Lyude Paul
> Cc: Imre
On Tue, Jan 29, 2019 at 02:10:00PM -0500, Lyude Paul wrote:
> We have a bad habit of calling drm_fb_helper_hotplug_event() far more
> then we actually need to. MST appears to be one of these cases, where we
> call drm_fb_helper_hotplug_event() if we fail to resume a connected MST
> topology in
Remove the list of broken tests on VKMS solved by patchset
https://patchwork.freedesktop.org/series/55994/
Signed-off-by: Shayenne Moura
---
Documentation/gpu/vkms.rst | 11 ---
1 file changed, 11 deletions(-)
diff --git a/Documentation/gpu/vkms.rst b/Documentation/gpu/vkms.rst
index
Qiang Yu writes:
> From: Lima Project Developers
>
> Signed-off-by: Andreas Baierl
> Signed-off-by: Erico Nunes
> Signed-off-by: Heiko Stuebner
> Signed-off-by: Marek Vasut
> Signed-off-by: Neil Armstrong
> Signed-off-by: Qiang Yu
> Signed-off-by: Simon Shields
> Signed-off-by: Vasily
On 2019-01-28 12:42, Sean Paul wrote:
From: Sean Paul
Use the drm_mode_vrefresh helper where we need refresh rate in case
vrefresh is empty.
Signed-off-by: Sean Paul
Reviewed-by: Jeykumar Sankaran
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 6 +++---
Am 06.02.19 um 18:23 schrieb Ard Biesheuvel:
On Fri, 25 Jan 2019 at 11:35, Ard Biesheuvel wrote:
On Fri, 25 Jan 2019 at 12:30, Christian König
wrote:
Am 25.01.19 um 09:43 schrieb Ard Biesheuvel:
On Thu, 24 Jan 2019 at 15:01, Alex Deucher wrote:
On Thu, Jan 24, 2019 at 9:00 AM Ard
On Wed, Feb 6, 2019 at 1:32 PM Ville Syrjala
wrote:
>
> From: Ville Syrjälä
>
> The fuzzy drm_calc_{h,v}scale_relaxed() helpers are no longer used.
> Throw them in the bin.
>
> Signed-off-by: Ville Syrjälä
Acked-by: Alex Deucher
> ---
> drivers/gpu/drm/drm_rect.c | 108
From: Ville Syrjälä
The fuzzy drm_calc_{h,v}scale_relaxed() helpers are no longer used.
Throw them in the bin.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/drm_rect.c | 108 -
include/drm/drm_rect.h | 6 ---
2 files changed, 114 deletions(-)
diff
Looks like when making the final revision of:
022debad063e ("drm/atomic: Add drm_atomic_state->duplicated")
I forgot to remove some of the comments that I had added to
drm_dp_atomic_find_vcpi_slots() and drm_dp_atomic_release_vcpi_slots()
that were no longer valid due to us having removed the
Daniel Vetter writes:
>
> Zooming out more looking at the big picture I'd say all your work in the
> past few years has enormously simplified drm for simple drivers already.
> If we can't resolve this one here right now that just means you "only"
> made drm 98% simpler instead of maybe 99%. It's
Change the api in order to enable callers that can't supply a valid
intel_plane pointer, as would be the case prior to calling
drm_universal_plane_init.
v4:
- Rename variables and move a declaration (Ville)
Cc: Uma Shankar
Cc: Shashank Sharma
Cc: Ville Syrjälä
Cc: David Airlie
Cc: Daniel
This series defines new formats and adds implementation to the i915 driver.
Since posting v1 I have removed the pixel normalize property, as it's not needed
for basic functionality. Also, I have been working on adding support to
userspace, but we can't land any patches until drm_fourcc.h has been
Add 64 bpp 16:16:16:16 half float pixel formats. Each 16 bit component is
formatted in IEEE-754 half-precision float (binary16) 1:5:10
MSb-sign:exponent:fraction form.
This patch attempts to address the feedback provided when 2 of these
formats were previosly proposed:
64 bpp half float formats are supported on hdr planes only and are subject
to the following restrictions:
* 90/270 rotation not supported
* Yf Tiling not supported
* Frame Buffer Compression not supported
* Color Keying not supported
v2:
- Drop handling pixel normalize register
- Don't
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