Hi, Yongqiang:
On Fri, 2019-12-13 at 15:28 +0800, Yongqiang Niu wrote:
> Changes since v1:
> -separate gamma patch
> -remove cmdq support for ctm setting
If this series depend on other patch or series, please describe it.
Regards,
CK
>
>
> Yongqiang Niu (2):
> drm/mediatek: Fix gamma correc
Hi, Yongqiang:
The title is too rough. Any bug of gamma would be this title. I would
like the title show explicitly what it does.
On Fri, 2019-12-13 at 15:28 +0800, Yongqiang Niu wrote:
> if there is no gamma function in the crtc
> display path, don't add gamma property
> for crtc
>
> Signed-off
On Thu, 12 Dec 2019, Matt Roper wrote:
> On Thu, Dec 12, 2019 at 12:11:30PM +0300, Dan Carpenter wrote:
>> The "num_dtd" variable is the number of elements in the
>> generic_dtd->dtd[] array so the > needs to be >= to prevent reading one
>> element beyond the end of the array.
>>
>> Fixes: 33ef6d
Hi Linus,
Usual round of rc2 fixes, i915 and amdgpu leading the charge, but a
few others in here, including some nouveau fixes, all seems pretty for
rc2, but hey it's a Fri 13th pull so I'm sure it'll cause untold bad
fortune.
Regards,
Dave.
drm-fixes-2019-12-13:
drm fixes for 5.5-rc2
dma-buf:
You don't need to resend this. Already merged to exynos-drm-fixes three weeks
ago.
Thanks,
Inki Dae
19. 12. 6. 오전 1:05에 Chuhong Yuan 이(가) 쓴 글:
> The driver forgets to call component_del in remove to match component_add
> in probe.
> Add the missed call to fix it.
>
> Signed-off-by: Chuhong Yuan
On Thu, 12 Dec 2019 15:32:35 -0500
Sean Paul wrote:
>
> What about trace_printk()? It doesn't give us the control we get from using
> tracepoints and it's not meant to be left sprinkled around in code.
Not to mention that trace_printk() is not for production use (only for
developers debugging p
On 12/11/19 1:13 PM, Ilia Mirkin wrote:
On Wed, Dec 11, 2019 at 4:04 PM James Jones wrote:
Allow setting the block layout of a nouveau FB
object using DRM format modifiers. When
specified, the format modifier block layout and
kind overrides the GEM buffer's implicit layout
and kind. The spec
Hi, Ryan:
On Thu, 2019-12-12 at 14:47 -0800, Ryan Case wrote:
> Hi Enric,
>
> On Thu, Dec 12, 2019 at 5:53 AM Enric Balletbo Serra
> wrote:
> >
> > Hi,
> >
> > Missatge de CK Hu del dia dj., 26 de set. 2019 a les
> > 10:51:
> > >
> > > Hi, Jitao:
> > >
> > > On Thu, 2019-09-19 at 14:58 +0800,
Hi, Sean:
On Thu, 2019-12-12 at 09:13 -0500, Sean Paul wrote:
> On Wed, Dec 11, 2019 at 11:45 PM CK Hu wrote:
> >
> > Hi, Mark:
> >
> > On Wed, 2019-12-11 at 10:49 -0500, Mark Yacoub wrote:
> > > drm/mediatek: return if plane pending state is disabled.
> > >
> > > If the plane pending state is di
Hi Fabrizio,
On Mon, Dec 02, 2019 at 03:06:13PM +, Fabrizio Castro wrote:
> > From: linux-renesas-soc-ow...@vger.kernel.org
> > On Behalf Of Laurent Pinchart
> > Sent: 16 October 2019 00:25
> > Subject: [PATCH] drm: rcar-du: lvds: Get mode from state
> >
> > The R-Car LVDS encoder driver im
Hi,
On Mon, Dec 9, 2019 at 2:44 PM Chia-I Wu wrote:
>
> On Mon, Dec 2, 2019 at 5:36 PM Gurchetan Singh
> wrote:
> >
> > With the misc device, we should end up using the result of
> > get_arch_dma_ops(..) or dma-direct ops.
> >
> > This can allow us to have WC mappings in the guest after
> > sync
Hi Kieran,
On Mon, Dec 09, 2019 at 12:41:07PM +, Kieran Bingham wrote:
> On 13/09/2019 10:03, Laurent Pinchart wrote:
> > On Fri, Sep 13, 2019 at 10:21:29AM +0200, Simon Horman wrote:
> >> On Thu, Sep 12, 2019 at 01:00:41PM +0300, Sergei Shtylyov wrote:
> >>> On 11.09.2019 22:25, Kieran Bingha
On Thu, 12 Dec 2019 at 18:14, Jani Nikula wrote:
>
> On Fri, 06 Dec 2019, Chuhong Yuan wrote:
> > nv50_msto_disable() does not call nv50_outp_release() to match
> > nv50_outp_acquire() like other disable().
> > Add the missed call to fix it.
This is intentional, and it's called at a later time
(n
Hi Mihail,
On Fri, Dec 13, 2019 at 01:15:12AM +0200, Laurent Pinchart wrote:
> On Wed, Dec 11, 2019 at 11:01:37AM +, Mihail Atanassov wrote:
> > On Tuesday, 10 December 2019 22:57:04 GMT Laurent Pinchart wrote:
> > > To support implementation of DRM connectors on top of DRM bridges
> > > inste
Hi Mihail,
On Wed, Dec 11, 2019 at 11:01:37AM +, Mihail Atanassov wrote:
> On Tuesday, 10 December 2019 22:57:04 GMT Laurent Pinchart wrote:
> > To support implementation of DRM connectors on top of DRM bridges
> > instead of by bridges, the drm_bridge needs to expose new operations and
> > da
On Thu, Dec 12, 2019 at 1:17 PM Colin King wrote:
>
> From: Colin Ian King
>
> There are several occurrances of the pointer hwmgr being dereferenced
> before it is null checked. Fix these by performing the dereference
> of hwmgr after it has been null checked.
>
> Addresses-Coverity: ("Dereferen
Hi Dave, Daniel,
Fixes for 5.5.
The following changes since commit b53bd16fec3d52ff7be1648a9b0a747288f52cf8:
Merge tag 'drm-misc-next-fixes-2019-12-04' of
git://anongit.freedesktop.org/drm/drm-misc into drm-next (2019-12-05 11:11:11
+1000)
are available in the Git repository at:
git://pe
Hi Jani.
On Tue, Dec 10, 2019 at 02:30:43PM +0200, Jani Nikula wrote:
> Add new struct drm_device based logging macros modeled after the core
> kernel device based logging macros. These would be preferred over the
> drm printk and struct device based macros in drm code, where possible.
>
> We hav
On 12/12/2019 20:38, Chris Wilson wrote:
> Quoting Colin Ian King (2019-12-12 19:53:33)
>> Hi,
>>
>> Static analysis with Coverity has picked up an issue with the following
>> commit:
>>
>> commit 65c29dbb19b2451990c5c477fef7ada3b8218f05
>> Author: Chris Wilson
>> Date: Wed Dec 11 15:02:04 2019
Add dt-schema yaml bindig for AM65x DSS, AM65x version TI Keystone
Display SubSystem.
Version history:
v2: no change
v3: - Add ports node
- use allOf in ti,am65x-oldi-io-ctrl to add both $ref and maxItems
- Add includes to dts example
- reindent dts example
Signed-off-by: Jyri Sarha
According to both the old acpi_igd_opregion_spec_0.pdf and the newer
skl_opregion_rev0p5.pdf opregion specification documents, if a driver
handles hotplug events itself, it should set the opregion CHPD field to
1 to indicate this and the firmware should respond to this by no longer
sending ACPI 0x0
Quoting Colin Ian King (2019-12-12 19:53:33)
> Hi,
>
> Static analysis with Coverity has picked up an issue with the following
> commit:
>
> commit 65c29dbb19b2451990c5c477fef7ada3b8218f05
> Author: Chris Wilson
> Date: Wed Dec 11 15:02:04 2019 +
>
> drm/i915: Use the i915_device name
Hi Tomi,
On Thu, Dec 12, 2019 at 11:37:51AM +0200, Tomi Valkeinen wrote:
> On 11/12/2019 18:53, Tony Lindgren wrote:
> > * Laurent Pinchart [191202 13:05]:
> >> Hi Tomi,
> >>
> >> Thank you for the patch.
> >>
> >> On Thu, Nov 14, 2019 at 11:39:49AM +0200, Tomi Valkeinen wrote:
> >>> panel-simple
On Thu, Dec 12, 2019 at 09:37:17AM -0800, Matt Roper wrote:
On Wed, Dec 11, 2019 at 04:22:50PM -0800, Lucas De Marchi wrote:
On Wed, Dec 11, 2019 at 12:10:41PM +0530, Bharadiya,Pankaj wrote:
> On Tue, Dec 10, 2019 at 09:57:39PM -0800, Lucas De Marchi wrote:
> > On Mon, Dec 09, 2019 at 08:09:02PM
From: Sean Paul
For a long while now, we (ChromeOS) have been struggling getting any
value out of user feedback reports of display failures (notably external
displays not working). The problem is that all logging, even fatal
errors (well, fatal in the sense that a display won't light up) are
logg
The Thundersoft TST178 tablet uses a DSI panel with an external PWM
controller (as all DSI panels do). But unlike other DSI panels a duty-cycle
of 100% turns the backlight off and 0% sets it to maximum brightness.
I've checked the VBT and there is a BDB_LVDS_BACKLIGHT section, but
it does not set
Use intel_panel_compute_brightness() from pwm_setup_backlight() so that
we correctly take i915_modparams.invert_brightness and/or
QUIRK_INVERT_BRIGHTNESS into account when setting + getting the initial
brightness value.
Signed-off-by: Hans de Goede
---
drivers/gpu/drm/i915/display/intel_panel.c
Hi,
Static analysis with Coverity has picked up an issue with the following
commit:
commit 65c29dbb19b2451990c5c477fef7ada3b8218f05
Author: Chris Wilson
Date: Wed Dec 11 15:02:04 2019 +
drm/i915: Use the i915_device name for identifying our request fences
In source drivers/gpu/drm/i9
On 12/3/19 12:26 PM, John Stultz wrote:
> From: "Andrew F. Davis"
>
> This framework allows a unified userspace interface for dma-buf
> exporters, allowing userland to allocate specific types of memory
> for use in dma-buf sharing.
>
> Each heap is given its own device node, which a user can all
https://bugzilla.kernel.org/show_bug.cgi?id=204181
Julien Isorce (julien.iso...@gmail.com) changed:
What|Removed |Added
CC||julien.iso...@gm
From: Sean Paul
In order to act upon content_protection property changes, we'll need to
implement the .update_pipe() hook. We can re-use intel_ddi_update_pipe
for this
Signed-off-by: Sean Paul
Link:
https://patchwork.freedesktop.org/patch/msgid/20191203173638.94919-10-s...@poorly.run
#v1
Cha
Hi,
On 12-12-2019 16:52, Lee Jones wrote:
On Thu, 12 Dec 2019, Hans de Goede wrote:
Hi,
On 12-12-2019 09:45, Lee Jones wrote:
On Wed, 11 Dec 2019, Hans de Goede wrote:
Hi Lee,
On 10-12-2019 09:51, Lee Jones wrote:
On Tue, 19 Nov 2019, Hans de Goede wrote:
At least Bay Trail (BYT) and C
From: Sean Paul
Now that all the groundwork has been laid, we can turn on HDCP 1.4 over
MST. Everything except for toggling the HDCP signalling and HDCP 2.2
support is the same as the DP case, so we'll re-use those callbacks
Signed-off-by: Sean Paul
Link:
https://patchwork.freedesktop.org/patc
From: Sean Paul
This is a bit of housecleaning for a future patch. Instead of sprinkling
hdcp->value assignments and prop_work scheduling everywhere, introduce a
function to do it for us.
Signed-off-by: Sean Paul
Link:
https://patchwork.freedesktop.org/patch/msgid/20191203173638.94919-7-s...@p
From: Sean Paul
These functions are all the same for dp and dp_mst, so expose them for
use by the dp_mst hdcp implementation.
Signed-off-by: Sean Paul
Link:
https://patchwork.freedesktop.org/patch/msgid/20191203173638.94919-11-s...@poorly.run
#v1
Changes in v2:
-none
---
.../drm/i915/displa
From: Sean Paul
This patch adds some protection against connectors being destroyed
before the HDCP workers are finished.
For check_work, we do a synchronous cancel after the connector is
unregistered which will ensure that it is finished before destruction.
In the case of prop_work, we can't do
From: Sean Paul
Although DP_MST fake encoders are not subclassed from digital ports,
they are associated with them. Support these encoders.
Signed-off-by: Sean Paul
Link:
https://patchwork.freedesktop.org/patch/msgid/20191203173638.94919-9-s...@poorly.run
#v1
Changes in v2:
-none
---
.../dr
From: Sean Paul
This patch is required for HDCP over MST. If a port is being used for
multiple HDCP streams, we don't want to fully disable HDCP on a port if
one of them is disabled. Instead, we just disable the HDCP signalling on
that particular pipe and exit early. The last pipe to disable HDCP
From: Sean Paul
Instead of hand rolling the transfer ourselves in the hdcp hook, inspect
aux messages and add the aksv flag in the aux transfer hook.
IIRC, this was the original implementation and folks wanted this hack to
be isolated to the hdcp code, which makes sense.
However in testing an L
From: Sean Paul
HDCP signalling should not be left on, WARN if it is
Cc: Ville Syrjälä
Cc: Daniel Vetter
Signed-off-by: Sean Paul
Changes in v2:
- Added to the set in lieu of just clearing the bit
---
drivers/gpu/drm/i915/display/intel_ddi.c | 2 ++
1 file changed, 2 insertions(+)
diff --g
From: Sean Paul
On HDCP disable, clear the repeater bit. This ensures if we connect a
non-repeater sink after a repeater, the bit is in the state we expect.
Fixes: ee5e5e7a5e0f ("drm/i915: Add HDCP framework + base implementation")
Cc: Chris Wilson
Cc: Ramalingam C
Cc: Daniel Vetter
Cc: Sean
From: Sean Paul
Instead of using intel_dig_port's encoder pipe to determine which
transcoder to toggle signalling on, use the cpu_transcoder field already
stored in intel_hdmi.
This is particularly important for MST.
Suggested-by: Ville Syrjälä
Signed-off-by: Sean Paul
Changes in v2:
- Added
From: Sean Paul
This patch fixes a few bugs:
1- We weren't taking into account sha_leftovers when adding multiple
ksvs to sha_text. As such, we were or'ing the end of ksv[j - 1] with
the beginning of ksv[j]
2- In the sha_leftovers == 2 and sha_leftovers == 3 case, bstatus was
being pla
From: Sean Paul
Hello again,
Here's the second version of my set to enable MST over HDCP. The big
changes stemmed from Ville's review. It was super helpful to get that
pushback, and led me to more critically debug the disable paths. As a
result, I think I chased a few more gremlins out of the sys
I am new to the open source community. Can anyone help me get started?
Assigning a task would also help.
___
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
On Thu, Dec 12, 2019 at 8:20 AM Andrew F. Davis wrote:
> On 12/3/19 12:26 PM, John Stultz wrote:
> > +static int system_heap_create(void)
> > +{
> > + struct dma_heap_export_info exp_info;
> > + int ret = 0;
> > +
> > + exp_info.name = "system_heap";
>
>
> nit: Would prefer the name ju
On Thu, Dec 12, 2019 at 8:52 AM Andrew F. Davis wrote:
> On 12/3/19 12:26 PM, John Stultz wrote:
> > +#define DMA_HEAP_IOC_MAGIC 'H'
> > +
> > +/**
> > + * DOC: DMA_HEAP_IOC_ALLOC - allocate memory from pool
> > + *
> > + * Takes a dma_heap_allocation_data struct and returns it with the
From: Colin Ian King
There are several occurrances of the pointer hwmgr being dereferenced
before it is null checked. Fix these by performing the dereference
of hwmgr after it has been null checked.
Addresses-Coverity: ("Dereference before null check")
Fixes: 8497d2bcdee1 ("drm/amd/powerplay: e
On Thu, Dec 12, 2019 at 09:49:10AM -0800, Matt Roper wrote:
> On Mon, Dec 09, 2019 at 08:09:02PM +0530, Pankaj Bharadiya wrote:
> > intel_bw_state allocated memory is not getting freed even after
> > module removal.
> >
> > kmemleak reported backtrace:
> >
> > [<79019739>] kmemdup+0x1
On Mon, Dec 09, 2019 at 08:09:02PM +0530, Pankaj Bharadiya wrote:
> intel_bw_state allocated memory is not getting freed even after
> module removal.
>
> kmemleak reported backtrace:
>
> [<79019739>] kmemdup+0x17/0x40
> [] intel_bw_duplicate_state+0x1b/0x40 [i915
On Wed, Dec 11, 2019 at 04:22:50PM -0800, Lucas De Marchi wrote:
> On Wed, Dec 11, 2019 at 12:10:41PM +0530, Bharadiya,Pankaj wrote:
> > On Tue, Dec 10, 2019 at 09:57:39PM -0800, Lucas De Marchi wrote:
> > > On Mon, Dec 09, 2019 at 08:09:02PM +0530, Pankaj Bharadiya wrote:
> > > >intel_bw_state all
On Thu, Dec 12, 2019 at 4:53 AM Gerd Hoffmann wrote:
>
> v2: fix src rect handling (Chia-I Wu).
>
> Gerd Hoffmann (3):
> drm/virtio: skip set_scanout if framebuffer didn't change
> virtio-gpu: batch display update commands.
> virtio-gpu: use damage info for display updates.
Series is
Review
On Thu, Dec 12, 2019 at 12:11:30PM +0300, Dan Carpenter wrote:
> The "num_dtd" variable is the number of elements in the
> generic_dtd->dtd[] array so the > needs to be >= to prevent reading one
> element beyond the end of the array.
>
> Fixes: 33ef6d4fd8df ("drm/i915/vbt: Handle generic DTD block
On Tue, Dec 10, 2019 at 12:06:11PM -0800, José Roberto de Souza wrote:
> It is missing the new EHL/JSL PCI ids added in commit
> 651cc835d5f6 ("drm/i915: Add new EHL/JSL PCI ids")
>
> Cc: James Ausmus
> Cc: Matt Roper
> Signed-off-by: José Roberto de Souza
Matches the kernel and the bspec.
Re
Add dt-schema yaml bindig for J721E DSS, J721E version TI Keystone
Display SubSystem.
Version history:
v2: no change
v3: - reg-names: "wp" -> "wb"
- Add ports node
- Add includes to dts example
- reindent dts example
Signed-off-by: Jyri Sarha
---
.../bindings/display/ti/ti,j721e-d
Add entry for tidss DRM driver.
Version history:
v2: no change
v3: - Move tidss entry after omapdrm
- Add "T: git git://anongit.freedesktop.org/drm/drm-misc"
Signed-off-by: Jyri Sarha
---
MAINTAINERS | 11 +++
1 file changed, 11 insertions(+)
diff --git a/MAINTAINERS b/MAINTA
On Thu, Dec 12, 2019 at 2:32 PM Ulf Hansson wrote:
>
> On Thu, 12 Dec 2019 at 13:33, Thierry Reding wrote:
> >
> > On Thu, Dec 12, 2019 at 09:52:22AM +0100, Ulf Hansson wrote:
> > > On Mon, 9 Dec 2019 at 14:03, Thierry Reding
> > > wrote:
> > > >
> > > > From: Thierry Reding
> > > >
> > > > Th
On 12/3/19 12:26 PM, John Stultz wrote:
> This patch adds system heap to the dma-buf heaps framework.
>
> This allows applications to get a page-allocator backed dma-buf
> for non-contiguous memory.
>
> This code is an evolution of the Android ION implementation, so
> thanks to its original autho
Add dt-schema yaml bindig for K2G DSS, an ultra-light version of TI
Keystone Display SubSystem.
Version history:
v2: no change
v3: - Add ports node
- Add includes to dts example
- reindent dts example
Signed-off-by: Jyri Sarha
---
.../bindings/display/ti/ti,k2g-dss.yaml | 118 ++
Changes since v2:
- Add version history to commit messages
- Fix yaml bindings now that got dt_binding_check dtbs_check working propery
- Move tidss entry in MAINTAINERS after omapdrm and add "T: git
git://anongit.freedesktop.org/drm/drm-misc"
Changes since the first version of the patch series
This patch adds a new DRM driver for Texas Instruments DSS IPs used on
Texas Instruments Keystone K2G, AM65x, and J721e SoCs. The new DSS IP is
a major change to the older DSS IP versions, which are supported by
the omapdrm driver. While on higher level the Keystone DSS resembles
the older DSS vers
On Thu, 12 Dec 2019, Hans de Goede wrote:
> Hi,
>
> On 12-12-2019 09:45, Lee Jones wrote:
> > On Wed, 11 Dec 2019, Hans de Goede wrote:
> >
> > > Hi Lee,
> > >
> > > On 10-12-2019 09:51, Lee Jones wrote:
> > > > On Tue, 19 Nov 2019, Hans de Goede wrote:
> > > >
> > > > > At least Bay Trail (BY
On 12/11/19 11:05 PM, Ma, Le wrote:
[AMD Official Use Only - Internal Distribution Only]
-Original Message-
From: Andrey Grodzovsky
Sent: Thursday, December 12, 2019 4:39 AM
To: dri-devel@lists.freedesktop.org; amd-...@lists.freedesktop.org
Cc: Deucher, Alexander ; Ma, Le
; Zhang, Ha
On 12/11/19 11:04 PM, Ma, Le wrote:
[AMD Official Use Only - Internal Distribution Only]
-Original Message-
From: Andrey Grodzovsky
Sent: Thursday, December 12, 2019 4:39 AM
To: dri-devel@lists.freedesktop.org; amd-...@lists.freedesktop.org
Cc: Deucher, Alexander ; Ma, Le
; Zhang, Ha
>-Original Message-
>From: dri-devel On Behalf Of
>Gerd Hoffmann
>Sent: Tuesday, December 10, 2019 3:58 AM
>To: dri-devel@lists.freedesktop.org
>Cc: David Airlie ; open list ;
>open list:VIRTIO GPU DRIVER ;
>Gerd Hoffmann ; gurchetansi...@chromium.org
>Subject: [PATCH] drm/virtio: fix mmap
https://bugzilla.kernel.org/show_bug.cgi?id=204241
--- Comment #46 from Alex Deucher (alexdeuc...@gmail.com) ---
Can you bisect? It sounds like you may be experiencing a different issue.
--
You are receiving this mail because:
You are watching the assignee of the bug.
__
Hi,
On 12-12-2019 09:45, Lee Jones wrote:
On Wed, 11 Dec 2019, Hans de Goede wrote:
Hi Lee,
On 10-12-2019 09:51, Lee Jones wrote:
On Tue, 19 Nov 2019, Hans de Goede wrote:
At least Bay Trail (BYT) and Cherry Trail (CHT) devices can use 1 of 2
different PWM controllers for controlling the L
On Wed, Dec 11, 2019 at 11:45 PM CK Hu wrote:
>
> Hi, Mark:
>
> On Wed, 2019-12-11 at 10:49 -0500, Mark Yacoub wrote:
> > drm/mediatek: return if plane pending state is disabled.
> >
> > If the plane pending state is disabled, call mtk_ovl_layer_off then
> > return.
> > This guarantees that that t
On 03/12/2019 12:16, Yuti Amonkar wrote:
> Document the bindings used for the Cadence MHDP DPI/DP bridge in
> yaml format.
>
> Signed-off-by: Yuti Amonkar
Couple of comments bellow.
> ---
> .../bindings/display/bridge/cdns,mhdp.yaml | 101
> +
> 1 file changed, 101
Hi Dave and Daniel,
I realized there were a few leftovers from -next-fixes which should find
their way to drm-fixes.
Sean
drm-misc-next-fixes-2019-12-12:
-mgag200: more startadd mitigation (Thomas)
-panfrost: devfreq fix + several memory fixes (Steven, Boris)
Cc: Boris Brezillon
Cc: Steven P
Hi,
Missatge de CK Hu del dia dj., 26 de set. 2019 a les 10:51:
>
> Hi, Jitao:
>
> On Thu, 2019-09-19 at 14:58 +0800, Jitao Shi wrote:
> > Change the method of frame rate calc which can get more accurate
> > frame rate.
> >
> > data rate = pixel_clock * bit_per_pixel / lanes
> > Adjust hfp_wc to
Hi
Please can amdgpu/raven_ta.bin be published somewhere
Thanks
Mike
On Wed, 11 Dec 2019 at 22:30, Alex Deucher wrote:
>
> Hi Dave, Daniel,
>
> Kicking off 5.6 with new stuff from AMD. There is a UAPI addition. We
> added a new firmware for display, and this just adds the version query
> to
When the driver submits multiple commands in a row it makes sense to
notify the host only after submitting the last one, so the host can
process them all at once, with a single vmexit.
Add functions to enable/disable notifications to allow that. Use the
new functions for primary plane updates.
S
v2: remove shift by src_{x,y}, drm_atomic_helper_damage_merged()
handles that for us (Chia-I Wu).
Signed-off-by: Gerd Hoffmann
---
drivers/gpu/drm/virtio/virtgpu_plane.c | 41 +++---
1 file changed, 24 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/virtio/vi
v2: fix src rect handling (Chia-I Wu).
Gerd Hoffmann (3):
drm/virtio: skip set_scanout if framebuffer didn't change
virtio-gpu: batch display update commands.
virtio-gpu: use damage info for display updates.
drivers/gpu/drm/virtio/virtgpu_drv.h | 6 ++
drivers/gpu/drm/virtio/virtgpu_pla
v2: also check src rect (Chia-I Wu).
Signed-off-by: Gerd Hoffmann
---
drivers/gpu/drm/virtio/virtgpu_plane.c | 35 +++---
1 file changed, 21 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/virtio/virtgpu_plane.c
b/drivers/gpu/drm/virtio/virtgpu_plane.c
index bc4
Hi,
On 12-12-2019 12:52, Stephen Rothwell wrote:
Hi all,
n commit
64d17f25dcad ("drm/nouveau: Fix drm-core using atomic code-paths on pre-nv50
hardware")
Fixes tag
Fixes: https://bugzilla.redhat.com/show_bug.cgi?id=1706557
has these problem(s):
- No SHA1 recognised
I haven't see
On Thu, Dec 12, 2019 at 09:52:22AM +0100, Ulf Hansson wrote:
> On Mon, 9 Dec 2019 at 14:03, Thierry Reding wrote:
> >
> > From: Thierry Reding
> >
> > The Tegra DRM driver heavily relies on the implementations for runtime
> > suspend/resume to be called at specific times. Unfortunately, there are
On 12/11/19 5:08 PM, Ville Syrjälä wrote:
> On Wed, Dec 11, 2019 at 10:48:42AM +0100, Johan Korsnes wrote:
>> When logging the AVI InfoFrame, clearly indicate whether or not
>> attributes are active/"in effect". The specification is given in
>> CTA-861-G Section 6.4: Format of Version 2, 3 & 4 AVI
Hi all,
n commit
64d17f25dcad ("drm/nouveau: Fix drm-core using atomic code-paths on pre-nv50
hardware")
Fixes tag
Fixes: https://bugzilla.redhat.com/show_bug.cgi?id=1706557
has these problem(s):
- No SHA1 recognised
I haven't seen a Fixes tag with a bug URL before, they usually refer
The "num_dtd" variable is the number of elements in the
generic_dtd->dtd[] array so the > needs to be >= to prevent reading one
element beyond the end of the array.
Fixes: 33ef6d4fd8df ("drm/i915/vbt: Handle generic DTD block")
Signed-off-by: Dan Carpenter
---
drivers/gpu/drm/i915/display/intel_
On Wed, Dec 11, 2019 at 04:22:50PM -0800, Lucas De Marchi wrote:
> On Wed, Dec 11, 2019 at 12:10:41PM +0530, Bharadiya,Pankaj wrote:
> >On Tue, Dec 10, 2019 at 09:57:39PM -0800, Lucas De Marchi wrote:
> >>On Mon, Dec 09, 2019 at 08:09:02PM +0530, Pankaj Bharadiya wrote:
> >>>intel_bw_state allocate
Am 12.12.19 um 10:49 schrieb Sam Ravnborg:
> Hi Thomas.
>
> On Thu, Dec 12, 2019 at 08:41:14AM +0100, Thomas Zimmermann wrote:
>> A number of cleanups that I wanted to apply for some time. The first
>> two patches simplify the public interface. The third patch adds support
>> for struct drm_driv
On Thu 12-12-19 00:19:15, John Hubbard wrote:
> Add tracking of pages that were pinned via FOLL_PIN.
>
> As mentioned in the FOLL_PIN documentation, callers who effectively set
> FOLL_PIN are required to ultimately free such pages via unpin_user_page().
> The effect is similar to FOLL_GET, and may
Hi Dave & Daniel,
Two important user visible fixes; GPU hang on BDW/SKL when idling
and top of screen corruption on GLK+ when FBC enabled.
Fix to Tigerlake perf/OA, HDCP commit computation touching global
state.
Then two CI spotted corner cases, race condition about context
retirement and lockde
Hi Jerry.
On Thu, Dec 12, 2019 at 10:26:14AM +0800, Jerry Han wrote:
> Use the backlight support in drm_panel to simplify the driver
>
> Signed-off-by: Jerry Han
> Reviewed-by: Sam Ravnborg
> ---
> drivers/gpu/drm/panel/panel-boe-himax8279d.c | 17 +++--
> 1 file changed, 3 inserti
Hi Thomas.
On Thu, Dec 12, 2019 at 08:41:14AM +0100, Thomas Zimmermann wrote:
> A number of cleanups that I wanted to apply for some time. The first
> two patches simplify the public interface. The third patch adds support
> for struct drm_driver.gem_create_object. All tested by running fbdev,
> X
On 11/12/2019 18:53, Tony Lindgren wrote:
* Laurent Pinchart [191202 13:05]:
Hi Tomi,
Thank you for the patch.
On Thu, Nov 14, 2019 at 11:39:49AM +0200, Tomi Valkeinen wrote:
panel-simple now handled panel osd070t1718-19ts, and we no longer need
the panel timings in the DT file. So remove th
On 12/3/19 5:38 PM, Jani Nikula wrote:
> Now that the fbops member of struct fb_info is const, we can start
> making the ops const as well.
>
> Remove the redundant fbops assignments while at it.
>
> v2:
> - actually add const in vivid
> - fix typo (Christophe de Dinechin)
>
> Cc: Hans Verkuil
Hi,
On Thu, Dec 12, 2019 at 01:42:12AM +0200, Laurent Pinchart wrote:
> On Wed, Dec 11, 2019 at 10:13:18PM +0100, Sam Ravnborg wrote:
> > On Wed, Dec 11, 2019 at 12:57:06AM +0200, Laurent Pinchart wrote:
> > > The dumb-vga-dac driver is a simple DRM bridge driver for simple VGA
> > > DACs that don
Active D77's Crossbar
Crossbar(CBU) is a new component added in D77, which is used for zorder
control.
At a time (per display frame) up to 5 inputs of the CBU can be enabled
Signed-off-by: Tiannan Zhu (Arm Technology China)
---
.../arm/display/komeda/d71/d71_component.c| 61
Hi Sam,
On 10.12.2019 22:37, Sam Ravnborg wrote:
> Hi Claudiu.
>
> On Tue, Dec 10, 2019 at 03:24:45PM +0200, Claudiu Beznea wrote:
>> For HLCDC timing engine configurations bit ATMEL_HLCDC_SIP of
>> ATMEL_HLCDC_SR needs to checked if it is equal with zero before applying
>> new configuration to t
* Laurent Pinchart [191202 13:02]:
> Hi Tomi,
>
> Thank you for the patch.
>
> On Thu, Nov 14, 2019 at 11:39:48AM +0200, Tomi Valkeinen wrote:
> > The LCD panel on AM4 GP EVMs and ePOS boards seems to be
> > osd070t1718-19ts. The current dts files say osd057T0559-34ts. Possibly
> > the panel has
This sched array can be passed on to entity creation routine
instead of manually creating such sched array on every context creation.
Signed-off-by: Nirmoy Das
Reviewed-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c| 113 +
drivers/gpu/drm/amd/amdgpu/amd
According to VESA ENHANCED EXTENDED DISPLAY IDENTIFICATION DATA STANDARD
(Defines EDID Structure Version 1, Revision 4) page: 39
How to determine whether the monitor support RB timing or not?
EDID 1.4
First: read detailed timing descriptor and make sure byte 0 = 0x00,
byte 1 = 0x00, byte 2
Hi,
> -Original Message-
> From: Kishon Vijay Abraham I
> Sent: Monday, December 9, 2019 14:21
> To: Yuti Suresh Amonkar ; dri-
> de...@lists.freedesktop.org; Rob Herring
> Cc: jsa...@ti.com; tomi.valkei...@ti.com; prane...@ti.com; Milind Parab
> ; Dhananjay Vilasrao Kangude
> ; Swapnil
Yes. This is DSI command to panel.
I saw same problem in 96boards.org discuss. On Android its all ok, but on
Linux flickering.
Yes, panel in video mode. Where is pageflip event in driver? Or where add
sleep/delay between update buffer? I think buffer copy by DMA (module) to
panel. But for this ne
This series of patches works well on a new platform which has a panel
only controls by DPCD aux brightness.
Tested-by: AceLan Kao
--
Chia-Lin Kao(AceLan)
http://blog.acelan.idv.tw/
E-Mail: acelan.kaoATcanonical.com (s/AT/@/)
___
dri-devel mailing list
D77 is the next generation of D71, compared with D71, it add some new
features(components) like ATU, Crossbar, PerfCounter etc.
Crossbar is used to control every plane's zorder.
ATU (Asyncronise Timewarp Unit) is used to support and optimize VR/AR
PerfCounter is used to log device performance data
Hi Laurentiu,
thanks for the updated patch! I can confirm after intensive testing that the
hangs on boot are fixed in this version (I’m using DCSS->MIPI DSI->TI eDP
Bridge).
Best
Lukas
--
Lukas F. Hartmann, CEO
MNT Research GmbH
https://mntre.com
--
Did you know? Our Open Laptop MNT Reform
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