On Thu, 19 Mar 2020 11:20:44 +0100 Thomas Hellström (VMware)
wrote:
> On 3/19/20 12:27 AM, Andrew Morton wrote:
> > On Mon, 16 Mar 2020 13:32:08 +0100 Thomas Hellström (VMware)
> > wrote:
> >
> >>> ___
> >>> dri-devel mailing list
> >>> dri-devel@lis
On Fri, Mar 20, 2020 at 11:19 PM Bjorn Helgaas wrote:
>
> On Tue, Mar 10, 2020 at 08:26:27PM +0100, Karol Herbst wrote:
> > Fixes the infamous 'runtime PM' bug many users are facing on Laptops with
> > Nvidia Pascal GPUs by skipping said PCI power state changes on the GPU.
> >
> > Depending on the
Quoting Enric Balletbo i Serra (2020-03-11 09:53:20)
> From: Matthias Brugger
>
> There is no strong reason for this to use CLK_OF_DECLARE instead of
> being a platform driver. Plus, MMSYS provides clocks but also a shared
> register space for the mediatek-drm and the mediatek-mdp
> driver. So mo
Quoting Enric Balletbo i Serra (2020-03-11 09:53:19)
> The mmsys system controller is not only a pure clock controller, so
> update the binding documentation to reflect that apart from providing
> clocks, it also provides routing and miscellaneous control registers.
>
> Signed-off-by: Enric Ballet
Dave, Daniel,
vmwgfx pull for for 5.7. Needed for GL4 functionality.
Sync up device headers, add support for new commands, code
refactoring around surface definition.
Preliminary mesa userspace code using these new vmwgfx features
can be found at: https://gitlab.freedesktop.org/bhenden/mesa
The
On Tue, Mar 10, 2020 at 08:26:27PM +0100, Karol Herbst wrote:
> Fixes the infamous 'runtime PM' bug many users are facing on Laptops with
> Nvidia Pascal GPUs by skipping said PCI power state changes on the GPU.
>
> Depending on the used kernel there might be messages like those in demsg:
>
> "no
https://bugzilla.kernel.org/show_bug.cgi?id=206575
--- Comment #16 from Joe Ramsey (kernel_bugzi...@joeramsey.com) ---
(In reply to Alex Deucher from comment #15)
> (In reply to Joe Ramsey from comment #14)
> > Looks like this has been corrected in 5.6... is there any intent to include
> > the fix
On 3/20/20 9:48 AM, Jason Gunthorpe wrote:
From: Jason Gunthorpe
I've had these in my work queue for a bit, nothing profound here, just some
small edits for clarity.
Ralph's hmm tester will need a small diff to work after this - which
illustrates how setting default_flags == 0 is the same as
On 3/20/20 9:49 AM, Jason Gunthorpe wrote:
From: Jason Gunthorpe
Delete several functions that are never called, fix some desync between
comments and structure content, remove an unused ret, and move one
function only used by hmm.c into hmm.c
Signed-off-by: Jason Gunthorpe
Reviewed-by: Ra
https://bugzilla.kernel.org/show_bug.cgi?id=206895
--- Comment #2 from bigbeesh...@gmail.com ---
Yes, should be able to over the weekend. Will report my findings.
--
You are receiving this mail because:
You are watching the assignee of the bug.
___
dri
https://bugzilla.kernel.org/show_bug.cgi?id=206895
Alex Deucher (alexdeuc...@gmail.com) changed:
What|Removed |Added
CC||alexdeuc...@gmail.c
https://bugzilla.kernel.org/show_bug.cgi?id=206575
--- Comment #15 from Alex Deucher (alexdeuc...@gmail.com) ---
(In reply to Joe Ramsey from comment #14)
> Looks like this has been corrected in 5.6... is there any intent to include
> the fix in any 5.5 kernel or will we just have to wait for 5.6?
https://bugzilla.kernel.org/show_bug.cgi?id=206895
Bug ID: 206895
Summary: [amdgpu] crash while using opencl from amdgpu-pro on
kernel 5.5.10
Product: Drivers
Version: 2.5
Kernel Version: 5.5.10
Hardware: x86-64
https://bugzilla.kernel.org/show_bug.cgi?id=206575
Joe Ramsey (kernel_bugzi...@joeramsey.com) changed:
What|Removed |Added
CC||kernel_bugzil
Hi Daniel, Dave,
nothing too exciting this time, mostly making newer hardware more
stable.
- fix for potential out-of-bounds reads in the perfmon ioctl
implementation from Christian
- override to expose proper feature flags for the GC400 found on the
STM32MP1 SoC, also from Christian
- Guido
On 3/20/20 9:48 AM, Jason Gunthorpe wrote:
From: Jason Gunthorpe
I've had these in my work queue for a bit, nothing profound here, just some
small edits for clarity.
The hmm tester changes are clear enough but I'm having a bit of trouble
figuring out
what this series applies cleanly to sin
The Northwest Logic MIPI DSI IP core can be found in NXPs i.MX8 SoCs.
Signed-off-by: Guido Günther
Tested-by: Robert Chiras
Reviewed-by: Rob Herring
Acked-by: Sam Ravnborg
---
.../bindings/display/bridge/nwl-dsi.yaml | 216 ++
1 file changed, 216 insertions(+)
create mod
This adds initial support for the NWL MIPI DSI Host controller found on
i.MX8 SoCs.
It adds support for the i.MX8MQ but the same IP can be found on
e.g. the i.MX8QXP.
It has been tested on the Librem 5 devkit using mxsfb.
Signed-off-by: Guido Günther
Co-developed-by: Robert Chiras
Signed-off-b
This adds initial support for the NWL MIPI DSI Host controller found on i.MX8
SoCs.
It adds support for the i.MX8MQ but the same IP core can also be found on e.g.
i.MX8QXP. I added the necessary hooks to support other imx8 variants but since
I only have imx8mq boards to test I omitted the platform
On Fri, Mar 20, 2020 at 11:14:08AM +0530, Harigovindan P wrote:
> Add bindings for visionox rm69299 panel.
>
> Signed-off-by: Harigovindan P
> ---
>
> Changes in v2:
> - Removed unwanted properties from description.
> - Creating source files without execute permissions(Rob Herring).
> Ch
The pull request you sent on Fri, 20 Mar 2020 13:01:44 +1000:
> git://anongit.freedesktop.org/drm/drm tags/drm-fixes-2020-03-20
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/69d3e5a5a66bb59c39f36dcb9cf4e9a4239aa8cd
Thank you!
--
Deet-doot-dot, I am a bot.
https://k
On Fri, Mar 20, 2020 at 03:21:13AM +0100, Emmanuel Vadot wrote:
> Source file was dual licenced but the header was omitted, fix that.
> Contributors for this file are:
> Daniel Vetter
> Matt Roper
> Maxime Ripard
> Noralf Trønnes
> Thomas Zimmermann
Acked-by: Matt Roper
>
> Signed-off-by:
On 3/15/20 5:09 AM, Randy Dunlap wrote:
> This patch series fixes warnings in fbdev that are found when
> -Wextra is used. In fixing these, there were a few other build
> errors discovered (mostly caused by bitrot) and fixed.
>
> [PATCH 1/6] fbdev: fbmon: fix -Wextra build warnings
> [PATCH 2/6]
On 3/13/20 1:24 PM, Tomi Valkeinen wrote:
> Remove unused writeback code. This code will never be used, as omapfb is
> being deprecated.
>
> Signed-off-by: Tomi Valkeinen
Patch queued for v5.7, thanks.
Best regards,
--
Bartlomiej Zolnierkiewicz
Samsung R&D Institute Poland
Samsung Electronics
On 3/19/20 4:49 PM, Takashi Iwai wrote:
> On Wed, 11 Mar 2020 10:32:27 +0100,
> Takashi Iwai wrote:
>>
>> Hi,
>>
>> here is a series of trivial patches just to convert suspicious
>> snprintf() usages with the more safer one, scnprintf().
>>
>>
>> Takashi
>>
>> ===
>>
>> Takashi Iwai (3):
>> vid
On 3/9/20 1:49 PM, Dominik 'disconnect3d' Czarnota wrote:
> From: disconnect3d
>
> This patch fixes an off-by-one error in strncpy size argument in
> drivers/video/fbdev/nvidia/nvidia.c. The issue is that in:
>
> strncmp(this_opt, "noaccel", 6)
>
> the passed string literal: "noaccel"
On Thu, 19 Mar 2020, Guru Das Srinagesh wrote:
> Since the PWM framework is switching struct pwm_state.period's datatype
> to u64, prepare for this transition by using div_u64 to handle a 64-bit
> dividend instead of a straight division operation.
>
> Cc: Lee Jones
> Cc: Daniel Thompson
> Cc: J
The "shadow" variable was never set to false.
There is a quirk in current versions of GCC where it will sometimes set
it to false and not warn about the uninitiliazed variable. That means
that this bug wouldn't have been discovered in normal testing.
Fixes: 2e0cc4d48b91 ("drm/amdgpu: revise RLCG
If the "handles" allocation or the copy_from_user() fails then we leak
"objs". It's supposed to be freed in panfrost_job_cleanup().
Fixes: c117aa4d8701 ("drm: Add a drm_gem_objects_lookup helper")
Signed-off-by: Dan Carpenter
---
drivers/gpu/drm/drm_gem.c | 4 ++--
1 file changed, 2 insertions(
Den 20.03.2020 13.28, skrev Sam Ravnborg:
> Hi Noralf.
>
> On Mon, Mar 16, 2020 at 05:42:49PM +0100, Geert Uytterhoeven wrote:
>> mipi_dbi_command_stackbuf() copies the passed buffer data, so it can be
>> const.
>>
>> Signed-off-by: Geert Uytterhoeven
>
> OK to merge?
> Looks good to me and bu
Hi Noralf.
On Mon, Mar 16, 2020 at 05:42:49PM +0100, Geert Uytterhoeven wrote:
> mipi_dbi_command_stackbuf() copies the passed buffer data, so it can be
> const.
>
> Signed-off-by: Geert Uytterhoeven
OK to merge?
Looks good to me and build did not break.
Sam
> ---
> drivers/gpu/drm/d
On 3/10/20 3:30 PM, Chuhong Yuan wrote:
> The driver calls register_framebuffer() in probe but does not call
> unregister_framebuffer() in remove.
> Rename current remove to __s1d13xxxfb_remove() for error handler.
> Then add a new remove to call unregister_framebuffer().
>
> Signed-off-by: Chuh
On Mon, 16 Mar 2020, "Shankar, Uma" wrote:
>> -Original Message-
>> From: dri-devel On Behalf Of Gwan-
>> gyeong Mun
>> Sent: Tuesday, February 11, 2020 1:17 PM
>> To: intel-...@lists.freedesktop.org
>> Cc: linux-fb...@vger.kernel.org; dri-devel@lists.freedesktop.org
>> Subject: [PATCH v7
Den 20.03.2020 03.21, skrev Emmanuel Vadot:
> Source file was dual licenced but the header was omitted, fix that.
> Contributors for this file are:
> Noralf Trønnes
> Gerd Hoffmann
> Thomas Gleixner
>
> Signed-off-by: Emmanuel Vadot
> ---
Acked-by: Noralf Trønnes
__
Den 20.03.2020 03.21, skrev Emmanuel Vadot:
> Source file was dual licenced but the header was omitted, fix that.
> Contributors for this file are:
> Daniel Vetter
> Matt Roper
> Maxime Ripard
> Noralf Trønnes
> Thomas Zimmermann
>
> Signed-off-by: Emmanuel Vadot
> ---
Acked-by: Noralf Tr
Hi Yiwei
After some deliberation on how to move forward with my BO Labeling patches[1],
we've come up with the following structure for debugfs entries:
/debugfs/dri/128/bo//label
/debugfs/dri/128/bo//size
My initial idea was to count the total memory allocated for a particular label
in kernel sp
On 3/10/20 3:35 AM, Chuhong Yuan wrote:
> The driver forgets to free the I/O region in remove and probe
> failure.
> Add the missed calls to fix it.
>
> Signed-off-by: Chuhong Yuan
> ---
> Changes in v3:
> - Revise the commit message.
> - Add an error handler to suit the "goto error" before
Hi Jani,
On Fri, Mar 20, 2020 at 01:32:17PM +0200, Jani Nikula wrote:
> On Fri, 20 Mar 2020, Jani Nikula wrote:
> > On Tue, 11 Feb 2020, Gwan-gyeong Mun wrote:
> >> It adds an unpack only function for DRM infoframe for dynamic range and
> >> mastering infoframe readout.
> >> It unpacks the infor
On 3/10/20 3:30 PM, Chuhong Yuan wrote:
> The driver forgets to free irq in remove which is requested in
> probe.
> Add the missed call to fix it.
> Also, the position of request_irq() in probe should be put before
> register_framebuffer().
>
> Signed-off-by: Chuhong Yuan
> ---
> Changes in v3:
On 3/20/20 12:27 PM, Simon Ser wrote:
On Friday, March 20, 2020 11:59 AM, Thomas Hellström
wrote:
On 3/20/20 10:13 AM, Pekka Paalanen wrote:
On Thu, 19 Mar 2020 23:57:09 +0100
Thomas Hellström (VMware) thomas...@shipmail.org wrote:
Hi,
On 3/19/20 10:07 PM, Simon Ser wrote:
Is that somet
On Fri, 20 Mar 2020, Jani Nikula wrote:
> On Tue, 11 Feb 2020, Gwan-gyeong Mun wrote:
>> It adds an unpack only function for DRM infoframe for dynamic range and
>> mastering infoframe readout.
>> It unpacks the information data block contained in the binary buffer into
>> a structured frame of th
On Friday, March 20, 2020 11:59 AM, Thomas Hellström
wrote:
> On 3/20/20 10:13 AM, Pekka Paalanen wrote:
>
> > On Thu, 19 Mar 2020 23:57:09 +0100
> > Thomas Hellström (VMware) thomas...@shipmail.org wrote:
> >
> > > Hi,
> > > On 3/19/20 10:07 PM, Simon Ser wrote:
> > >
> > > > > > > > Is that so
On Tue, 11 Feb 2020, Gwan-gyeong Mun wrote:
> It adds an unpack only function for DRM infoframe for dynamic range and
> mastering infoframe readout.
> It unpacks the information data block contained in the binary buffer into
> a structured frame of the HDMI Dynamic Range and Mastering (DRM)
> info
On 3/20/20 10:13 AM, Pekka Paalanen wrote:
On Thu, 19 Mar 2020 23:57:09 +0100
Thomas Hellström (VMware) wrote:
Hi,
On 3/19/20 10:07 PM, Simon Ser wrote:
Is that something that should be done?
If the hotspot property also had a "disabled" value, then Weston could
set the hotspot to disabled w
So following up on this:
We should state in the commit message that this driver is for all
displays using the Sitronix ST770x display controllers.
The driver should be named panel-sitronix-st770x.c.
On Thu, Mar 19, 2020 at 3:08 PM Linus Walleij wrote:
> > +/* Manufacturer specific Commands send
On Thu, 19 Mar 2020 23:57:09 +0100
Thomas Hellström (VMware) wrote:
> Hi,
>
> On 3/19/20 10:07 PM, Simon Ser wrote:
> > Is that something that should be done?
> > If the hotspot property also had a "disabled" value, then Weston could
> > set the hotspot to disabled when it is using t
On Fri, Mar 20, 2020 at 9:07 AM Icenowy Zheng wrote:
> 于 2020年3月19日 GMT+08:00 下午10:14:27, Linus Walleij
> 写到:
> >On Mon, Mar 16, 2020 at 2:37 PM Icenowy Zheng wrote:
> >As noticed in the review of the driver, this display is very close to
> >himax,hx8363.
> >
> >I think the best is to determin
On 2020-03-19 8:54 p.m., Marek Olšák wrote:
> On Thu., Mar. 19, 2020, 06:51 Daniel Vetter,
> wrote:
>>
>> Yeah, this is entirely about the programming model visible to
>> userspace. There shouldn't be any impact on the driver's choice of
>> a top vs. bottom of the gpu pipeline used for synchroniz
On 2020/3/20 14:30, Tom Murphy wrote:
Could we merge patch 1-3 from this series? it just cleans up weird
code and merging these patches will cover some of the work needed to
move the intel iommu driver to the dma-iommu api in the future.
Can you please take a look at this patch series?
https:/
This is my attempt at adding devfreq (and cooling device) support to
the lima driver.
Test results from a Meson8m2 board:
TEST #1: glmark2-es2-drm --off-screen in an infinite loop while cycling
through all available frequencies using the userspace governor
From : To
:
Since the PWM framework is switching struct pwm_state.duty_cycle's
datatype to u64, prepare for this transition by using DIV_ROUND_UP_ULL
to handle a 64-bit dividend.
Cc: Jani Nikula
Cc: Joonas Lahtinen
Cc: David Airlie
Cc: Daniel Vetter
Cc: Chris Wilson
Cc: "Ville Syrjälä"
Cc: intel-...@lis
On Sun, Mar 8, 2020 at 5:53 AM Dennis YC Hsieh
wrote:
>
> Some gce hardware shift pc and end address in register to support
> large dram addressing.
> Implement gce address shift when write or read pc and end register.
> And add shift bit in platform definition.
>
> Signed-off-by: Dennis YC Hsieh
Source file was dual licenced but the header was omitted, fix that.
Contributors for this file are:
Daniel Vetter
Matt Roper
Maxime Ripard
Noralf Trønnes
Thomas Zimmermann
Signed-off-by: Emmanuel Vadot
---
include/drm/drm_client.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff
Because period and duty cycle are defined in the PWM framework structs as ints
with units of nanoseconds, the maximum time duration that can be set is limited
to ~2.147 seconds. Consequently, applications desiring to set greater time
periods via the PWM framework are not be able to do so - like, fo
On Thu, Mar 19, 2020 at 05:48:02PM -0700, syzbot wrote:
> syzbot has bisected this bug to:
>
> commit da2648390ce3d409218b6bbbf2386d8ddeec2265
> Author: Lubomir Rintel
> Date: Thu Dec 20 18:13:09 2018 +
>
> pxa168fb: trivial typo fix
Certainly not ;-)
_
On Thu 19 Mar 11:19 PDT 2020, Rob Clark wrote:
> On Wed, Mar 18, 2020 at 9:39 PM Bjorn Andersson
> wrote:
> >
> > With the introduction of '3ef2f119bd3e ("drm/msm: Use
> > drm_attach_bridge() to attach a bridge to an encoder")' the HDMI bridge
> > is attached both in msm_hdmi_bridge_init() and la
Add bindings for visionox rm69299 panel.
Signed-off-by: Harigovindan P
---
Changes in v2:
- Removed unwanted properties from description.
- Creating source files without execute permissions(Rob Herring).
Changes in v3:
- Changing txt file into yaml
Changes in v4:
- Updating licen
Hi,
On Mon, Mar 16, 2020 at 09:35:02PM +0800, Icenowy Zheng wrote:
> The max() function call in horizontal timing calculation shouldn't pad a
> length already subtracted with overhead to overhead, instead it should
> only prevent the set timing to underflow.
Some explanation on why it shouldn't d
On Thu, Mar 19, 2020 at 08:16:33AM +0100, Christoph Hellwig wrote:
> On Wed, Mar 18, 2020 at 09:28:49PM -0300, Jason Gunthorpe wrote:
> > > Changes since v1:
> > > - split out the pgmap->owner addition into a separate patch
> > > - check pgmap->owner is set for device private mappings
> > > - re
On Tue, Mar 17, 2020 at 12:22:31PM +0100, Sam Ravnborg wrote:
> Hi Maxime.
>
> On Tue, Mar 17, 2020 at 09:49:59AM +0100, Maxime Ripard wrote:
> > Hi Sam,
> >
> > On Sat, Mar 14, 2020 at 04:30:45PM +0100, Sam Ravnborg wrote:
> > > data-mapping may not be the best way to describe the
> > > data forma
Since the PWM framework is switching struct pwm_state.duty_cycle's
datatype to u64, prepare for this transition by using DIV_ROUND_UP_ULL
to handle a 64-bit dividend.
Cc: Jani Nikula
Cc: Joonas Lahtinen
Cc: David Airlie
Cc: Daniel Vetter
Cc: Chris Wilson
Cc: "Ville Syrjälä"
Cc: intel-...@lis
On Thu, 19 Mar 2020, Daniel Vetter wrote:
On Thu, Mar 19, 2020 at 08:55:24AM +0100, Greg KH wrote:
On Wed, Mar 18, 2020 at 08:10:43PM +0100, Daniel Vetter wrote:
On Wed, Mar 18, 2020 at 5:58 PM Greg KH wrote:
On Wed, Mar 18, 2020 at 05:31:47PM +0100, Daniel Vetter wrote:
On Wed, Mar 18,
On Wed 11 Mar 20:51 PDT 2020, Ilia Mirkin wrote:
> Each of hdmi and edp are already attached in msm_*_bridge_init. A second
> attachment returns -EBUSY, failing the driver load.
>
> Tested with HDMI on IFC6410 (APQ8064 / MDP4), but eDP case should be
> analogous.
>
> Fixes: 3ef2f119bd3ed (drm/ms
Fix a checkpatch warning caused by a misaligned comment block.
Signed-off-by: Igor Matheus Andrade Torrente
---
Changes in v2:
- Change subject text
Changes in V3
- Fix a typo in the commit message
drivers/gpu/drm/drm_gem.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --
On Wed, Mar 18, 2020 at 09:08:45PM +0200, Jani Nikula wrote:
> On Tue, 17 Mar 2020, Guru Das Srinagesh wrote:
> > Since the PWM framework is switching struct pwm_state.duty_cycle's
> > datatype to u64, prepare for this transition by using DIV_ROUND_UP_ULL
> > to handle a 64-bit dividend.
> >
> > C
Any news on this? Is there anyone who wants to try and fix this possible bug?
On Mon, 23 Dec 2019 at 03:41, Jani Nikula wrote:
>
> On Mon, 23 Dec 2019, Robin Murphy wrote:
> > On 2019-12-23 10:37 am, Jani Nikula wrote:
> >> On Sat, 21 Dec 2019, Tom Murphy wrote:
> >>> This patchset converts the
Most platforms with a Mali-400 or Mali-450 GPU also have support for
changing the GPU clock frequency. Add devfreq support so the GPU clock
rate is updated based on the actual GPU usage when the
"operating-points-v2" property is present in the board.dts.
The actual devfreq code is taken from panfr
On Tue, Mar 17, 2020 at 04:14:31PM -0700, Ralph Campbell wrote:
> +static int dmirror_fault(struct dmirror *dmirror, unsigned long start,
> + unsigned long end, bool write)
> +{
> + struct mm_struct *mm = dmirror->mm;
> + unsigned long addr;
> + uint64_t pfns[64];
On Thu, Mar 19, 2020 at 03:56:50PM -0700, Ralph Campbell wrote:
> Adding linux-kselft...@vger.kernel.org for the test config question.
>
> On 3/19/20 11:17 AM, Jason Gunthorpe wrote:
> > On Tue, Mar 17, 2020 at 04:14:31PM -0700, Ralph Campbell wrote:
> > >
> > > On 3/17/20 5:59 AM, Christoph Hell
Adding support for visionox rm69299 panel driver and adding bindings for the
same panel.
Harigovindan P (2):
dt-bindings: display: add visionox rm69299 panel variant
drm/panel: add support for rm69299 visionox panel driver
.../display/panel/visionox,rm69299.yaml | 73 +
drivers/g
在 2020-03-16星期一的 21:35 +0800，Icenowy Zheng写道：
> PinePhone uses PWM backlight and a XBD599 LCD panel over DSI for
> display.
>
> Add its device nodes.
>
> Signed-off-by: Icenowy Zheng
> ---
> No changes in v2.
>
> .../dts/allwinner/sun50i-a64-pinephone.dtsi | 37
> +++
> 1 fil
Could we merge patch 1-3 from this series? it just cleans up weird
code and merging these patches will cover some of the work needed to
move the intel iommu driver to the dma-iommu api in the future.
On Sat, 21 Dec 2019 at 07:04, Tom Murphy wrote:
>
> Remove all IOVA handling code from the non-dm
Because period and duty cycle are defined in the PWM framework structs as ints
with units of nanoseconds, the maximum time duration that can be set is limited
to ~2.147 seconds. Consequently, applications desiring to set greater time
periods via the PWM framework are not be able to do so - like, fo
Fix a checkpatch warning caused by a misaligned comment block.
Changes in v2:
- Change subject text
Signed-off-by: Igor Matheus Andrade Torrente
---
drivers/gpu/drm/drm_gem.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/drm_gem.c b/drivers/gpu/drm/
The GPU can be one of the big heat sources on a SoC. Allow the
"#cooling-cells" property to be specified for ARM Mali Utgard GPUs so
the GPU clock speeds (and voltages) can be reduced to prevent a SoC from
overheating.
Signed-off-by: Martin Blumenstingl
---
Documentation/devicetree/bindings/gpu/
syzbot has bisected this bug to:
commit da2648390ce3d409218b6bbbf2386d8ddeec2265
Author: Lubomir Rintel
Date: Thu Dec 20 18:13:09 2018 +
pxa168fb: trivial typo fix
bisection log: https://syzkaller.appspot.com/x/bisect.txt?x=1361e139e0
start commit: 5076190d mm: slub: be more ca
On Thu, Mar 19, 2020 at 08:16:33AM +0100, Christoph Hellwig wrote:
> On Wed, Mar 18, 2020 at 09:28:49PM -0300, Jason Gunthorpe wrote:
> > > Changes since v1:
> > > - split out the pgmap->owner addition into a separate patch
> > > - check pgmap->owner is set for device private mappings
> > > - re
On Thu, Mar 19, 2020 at 10:51:36PM +0800, Icenowy Zheng wrote:
> 在 2020-03-16星期一的 21:35 +0800，Icenowy Zheng写道：
> > PinePhone uses PWM backlight and a XBD599 LCD panel over DSI for
> > display.
> >
> > Add its device nodes.
> >
> > Signed-off-by: Icenowy Zheng
> > ---
> > No changes in v2.
> >
>
Subject could be "sc7180: update DPU assigned clocks"
Quoting Krishna Manikandan (2020-03-16 04:02:42)
> Add DISP_CC_MDSS_ROT_CLK and DISP_CC_MDSS_AHB_CLK
> in the assigned clocks list for sc7180 target.
Why?
>
> Signed-off-by: Krishna Manikandan
Does this need a Fixes: tag?
> ---
> arch/ar
On Tue, Mar 17, 2020 at 04:14:31PM -0700, Ralph Campbell wrote:
>
> On 3/17/20 5:59 AM, Christoph Hellwig wrote:
> > On Tue, Mar 17, 2020 at 09:47:55AM -0300, Jason Gunthorpe wrote:
> > > I've been using v7 of Ralph's tester and it is working well - it has
> > > DEVICE_PRIVATE support so I think i
Since the PWM framework is switching struct pwm_state.period's datatype
to u64, prepare for this transition by using div_u64 to handle a 64-bit
dividend instead of a straight division operation.
Cc: Lee Jones
Cc: Daniel Thompson
Cc: Jingoo Han
Cc: Bartlomiej Zolnierkiewicz
Cc: linux-...@vger.k
Since the PWM framework is switching struct pwm_state.period's datatype
to u64, prepare for this transition by using div_u64 to handle a 64-bit
dividend instead of a straight division operation.
Cc: Lee Jones
Cc: Daniel Thompson
Cc: Jingoo Han
Cc: Bartlomiej Zolnierkiewicz
Cc: linux-...@vger.k
Source file was dual licenced but the header was omitted, fix that.
Contributors for this file are:
Noralf Trønnes
Gerd Hoffmann
Thomas Gleixner
Signed-off-by: Emmanuel Vadot
---
include/drm/drm_format_helper.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/drm/dr
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