Add Adreno 640 and 650 GPU info to the gpulist.
Signed-off-by: Jonathan Marek
---
drivers/gpu/drm/msm/adreno/adreno_device.c | 24 ++
drivers/gpu/drm/msm/adreno/adreno_gpu.c| 2 +-
drivers/gpu/drm/msm/adreno/adreno_gpu.h| 10 +
3 files changed, 35 insertions(
MSM Mobile Display Subsytem (MDSS) encapsulates sub-blocks
like DPU display controller, DSI etc. Add YAML schema
for the device tree bindings for the same.
Signed-off-by: Krishna Manikandan
Changes in v2:
- Changed dpu to DPU (Sam Ravnborg)
- Fixed indentation issues (Sam Ravnbor
Sure, this seems to be a lot more professional than my previous modification.
My original intention is to make the code easier to read, and I learned a lot
from
submitting these patches. Thank you very much for all your guidance!
Regards,
Bernard
发件人：Felix Kuehling
发送日期：2020-04-22 10:27:16
收件
From: Jason Gunthorpe
There is no reason for a user to select this or not directly - it should
be selected by drivers that are going to use the feature, similar to how
CONFIG_HMM_MIRROR works.
Currently all drivers provide a feature kconfig that will disable use of
DEVICE_PRIVATE in that driver,
On Tue, 21 Apr 2020, Dan Carpenter wrote:
> Hi Kernel Janitors,
>
> Here is another idea that someone could work on, fixing the
> IS_ERR_OR_NULL() checks in the xen driver.
>
> The patch c575b7eeb89f: "drm/xen-front: Add support for Xen PV
> display frontend" from Apr 3, 2018, leads to the foll
Update the gmu_pdc registers for A640 and A650.
Some of the RSCC registers on A650 are in a separate region.
Note this also changes the address of these registers:
RSCC_TCS1_DRV0_STATUS
RSCC_TCS2_DRV0_STATUS
RSCC_TCS3_DRV0_STATUS
Based on the values in msm-4.14 and msm-4.19 kernels.
Signed-off
VRAM manager and DRM MM when init failed, there is no operaction
to free kzalloc memory & remove device file.
This will lead to memleak & cause stability issue.
Signed-off-by: Bernard Zhao
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c | 24
1 file changed, 19 insertions(+
Add HFI v2 code paths required by Adreno 640 and 650 GPUs.
Signed-off-by: Jonathan Marek
---
drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 66 ---
drivers/gpu/drm/msm/adreno/a6xx_gmu.h | 7 ++
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 6 +-
drivers/gpu/drm/msm/adreno/a6xx_hfi.c | 117 ++
On 4/21/20 12:30 PM, Jordan Crouse wrote:
On Mon, Apr 20, 2020 at 10:03:08AM -0400, Jonathan Marek wrote:
Signed-off-by: Jonathan Marek
---
drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 68 ---
drivers/gpu/drm/msm/adreno/a6xx_gmu.h | 7 ++
drivers/gpu/drm/msm/adreno/a6xx_gpu.c |
This function allows pinning iova to a specific page range (for a6xx GMU).
Signed-off-by: Jonathan Marek
---
drivers/gpu/drm/msm/msm_drv.h | 6 +-
drivers/gpu/drm/msm/msm_gem.c | 28 +---
drivers/gpu/drm/msm/msm_gem_vma.c | 6 --
3 files changed, 30 inse
Fixes coccicheck warning:
drivers/gpu/drm/nouveau/nvkm/subdev/acr/hsfw.c:103:23-30: WARNING opportunity
for kmemdup
drivers/gpu/drm/nouveau/nvkm/subdev/acr/hsfw.c:113:22-29: WARNING opportunity
for kmemdup
Fixes: 22dcda45a3d1 ("drm/nouveau/acr: implement new subdev to replace "secure
boot"")
R
Adreno 640 and 650 GPUs need some registers set differently.
Signed-off-by: Jonathan Marek
---
drivers/gpu/drm/msm/adreno/a6xx.xml.h | 14 +++
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 56 ++-
2 files changed, 61 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/d
> There is no need to if check again,
Thanks for this information.
* Should the function name be mentioned in this commit message?
* Would you like to adjust the patch subject another bit?
> maybe we could merge into the above else branch.
I suggest to reconsider this wording.
Are you still u
There is no need to if check again, maybe we could merge
into the above else branch.
Signed-off-by: Bernard Zhao
Changes since V1:
*commit message improve
*code style refactoring
Changes since V2:
*code style adjust
Changes since V3:
*find the best way to merge unnecessary if/else check branch
From: Jason Gunthorpe
This is just an alias for HMM_PFN_ERROR, nothing cares that the error was
because of a special page vs any other error case.
Signed-off-by: Jason Gunthorpe
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 1 -
drivers/gpu/drm/nouveau/nouveau_svm.c | 1 -
include/linux/hmm.
> But i have to say there are so many code not follow the kernel code-style in
> amdgpu module.
> And also the ./scripts/checkpatch.pl did not throw any warning or error.
Will such information become more interesting for further evolution
in the affected software areas?
Regards,
Markus
_
This flag sets IOMMU_PRIV, which is required for some a6xx GMU objects.
Signed-off-by: Jonathan Marek
---
drivers/gpu/drm/msm/msm_gem.c | 3 +++
drivers/gpu/drm/msm/msm_gem.h | 1 +
2 files changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/msm/msm_gem.c b/drivers/gpu/drm/msm/msm_gem.c
index
From: Michał Winiarski
Control nodes are no longer with us.
While we still need to preserve render nodes numbering, there's no need
to reserve the range formerly used for control. Let's repurpose it to be
used by primary and remove control remains from the code entirely.
References: 0d49f303e8a7
Newer GPUs have different GMU firmware path.
Signed-off-by: Jonathan Marek
---
drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 135 +++---
drivers/gpu/drm/msm/adreno/a6xx_gmu.h | 11 ++
drivers/gpu/drm/msm/adreno/a6xx_gmu.xml.h | 6 +
3 files changed, 136 insertions(+), 16 del
* Tony Lindgren [200421 10:39]:
> See for example the standard 8250 uart for am335x with:
>
> $ git grep -B20 -A10 uart0 arch/arm/boot/dts/am33xx-l4.dtsi
>
> The 8250 device configuration is described in the standard 8250
> dts binding, and the am335x module in the ti-sysc binding.
> The are sep
发件人："Christian König"
发送日期：2020-04-21 22:53:47
收件人："赵军奎"
抄送人：Alex Deucher ,"David (ChunMing) Zhou"
,David Airlie ,Daniel Vetter
,Tom St Denis ,Ori Messinger
,Sam Ravnborg
,amd-...@lists.freedesktop.org,dri-devel@lists.freedesktop.org,linux-ker...@vger.kernel.org,opensource.ker...@vivo.com
主题
It forgot to call bochs_hw_fini() to release related resources when
bochs_pci_probe() fail. eg: io virtual address get by ioremap().
Fixes: 81da8c3b8d3df6 ("drm/bochs: add drm_driver.release callback.")
CC: Andy Shevchenko
Signed-off-by: Dejin Zheng
---
drivers/gpu/drm/bochs/bochs_drv.c | 1 +
* H. Nikolaus Schaller [200421 17:31]:
> > Am 21.04.2020 um 16:15 schrieb Tony Lindgren :
> > Note that on omaps there are actually SoC module specific registers.
>
> Ah, I see. This is of course a difference that the TI glue logic has
> its own registers in the same address range as the sgx and
From: Jason Gunthorpe
Since amdgpu does not use the snapshot mode of hmm_range_fault() a
successful return already proves that all entries in the pfns are
HMM_PFN_VALID, there is no need to check the return result of
hmm_device_entry_to_page().
Signed-off-by: Jason Gunthorpe
---
drivers/gpu/dr
dy Dunlap
Cc: Harry Wentland
Cc: Alex Deucher
Cc: Krzysztof Kozlowski
---
drivers/gpu/drm/amd/display/Kconfig |8 ++--
1 file changed, 2 insertions(+), 6 deletions(-)
--- linux-next-20200421.orig/drivers/gpu/drm/amd/display/Kconfig
+++ linux-next-20200421/drivers/gpu/drm/amd/displ
[REQUEST]
Would it be possible for the patches that have already received Acked-by's in
this series to be accepted and applied to the tree? I lost an Acked-by (in
intel-panel.c) because it had a merge conflict with a new change that came in
after I rebased to tip. I wasn't sure earlier about accep
On Tue, Apr 21, 2020 at 09:51:37AM +0300, Joonas Lahtinen wrote:
> Quoting Sultan Alsawaf (2020-04-20 19:15:14)
> > On Mon, Apr 20, 2020 at 11:21:42AM +0300, Joonas Lahtinen wrote:
> > > So it seems that the patch got pulled into v5.6 and has been backported
> > > to v5.5 but not v5.4.
> >
> > You
From: Jason Gunthorpe
hmm_vma_walk->last is supposed to be updated after every write to the
pfns, so that it can be returned by hmm_range_fault(). However, this is
not done consistently. Fortunately nothing checks the return code of
hmm_range_fault() for anything other than error.
More important
From: Jason Gunthorpe
The API is a bit complicated for the uses we actually have, and
disucssions for simplifying have come up a number of times.
This small series removes the customizable pfn format and simplifies the
return code of hmm_range_fault()
All the drivers are adjusted to process in
This is required for a650 to work.
Signed-off-by: Jonathan Marek
---
drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 15 +++
drivers/gpu/drm/msm/adreno/a6xx_gmu.h | 1 +
drivers/gpu/drm/msm/adreno/a6xx_gmu.xml.h | 4
3 files changed, 20 insertions(+)
diff --git a/drivers/gpu/
>> But i have to say there are so many code not follow the kernel code-style in
>> amdgpu module.
>> And also the ./scripts/checkpatch.pl did not throw any warning or error.
>
> That is unfortunately true, yes. But we try to push new code through the
> usual code review and improve things as we g
>>> There is no need to if check again, maybe we could merge
>>> into the above else branch.
I find also this commit message still improvable (besides the mentioned
implementation details around coding style concerns).
How will corresponding review comments be taken better into account?
Regards,
> Am 21.04.2020 um 16:15 schrieb Tony Lindgren :
>
> * Maxime Ripard [200421 11:22]:
>> On Tue, Apr 21, 2020 at 11:57:33AM +0200, Philipp Rossak wrote:
>>> I had a look on genpd and I'm not really sure if that fits.
>>>
>>> It is basically some bit that verify that the clocks should be enabled
Hi,
On Tue, Apr 21, 2020 at 11:57:33AM +0200, Philipp Rossak wrote:
> On 20.04.20 09:38, Maxime Ripard wrote:
> > Hi,
> >
> > On Fri, Apr 17, 2020 at 02:09:06PM +0200, Philipp Rossak wrote:
> > > > > I'm a bit skeptical on that one since it doesn't even list the
> > > > > interrupts connected to
On 4/16/20 6:22 PM, Chun-Kuang Hu wrote:
> Hi, Matthias:
>
> Matthias Brugger 於 2020年3月26日 週四 下午11:45寫道：
>>
>>
>>
>> On 26/03/2020 15:51, CK Hu wrote:
>>> Hi, Matthias:
>>>
>>> On Thu, 2020-03-26 at 12:54 +0100, Matthias Brugger wrote:
Hi CK,
On 26/03/2020 00:05, CK Hu wrote:
>>>
There is no need to if check again, maybe we could merge
into the above else branch.
Signed-off-by: Bernard Zhao
Changes since V1:
*commit message improve
*code style refactoring
Changes since V2:
*code style adjust
Link for V1:
*https://lore.kernel.org/patchwork/patch/1226587/
---
.../gpu/dr
On Tue, 21 Apr 2020, Dan Carpenter wrote:
> On Tue, Apr 21, 2020 at 05:29:02PM +0200, Julia Lawall wrote:
> >
> >
> > On Tue, 21 Apr 2020, Dan Carpenter wrote:
> >
> > > Hi Kernel Janitors,
> > >
> > > Here is another idea that someone could work on, fixing the
> > > IS_ERR_OR_NULL() checks in
Maybe we could reduce the mutex_lock(&mem->lock)`s protected code area,
and no need to protect pr_debug.
Signed-off-by: Bernard Zhao
Changes since V1:
*commit message improve
Changes since V2:
*move comment along with the mutex_unlock
Changes since V3:
*lock protect the if check, there is some
Make the code a bit more readable by using a common
error handling pattern.
With that done the patch is Reviewed-by: Christian König
.
Signed-off-by: Bernard Zhao
Changes since V1:
*commit message improve
*code style refactoring
Changes since V2:
*code style adjust
Changes since V3:
*find the
From: "Christian König"
Date: 2020-04-21 19:22:49
To: Bernard Zhao ,Alex Deucher
,"David (ChunMing) Zhou" ,David
Airlie ,Daniel Vetter ,Tom St Denis
,Ori Messinger ,Sam Ravnborg
,amd-...@lists.freedesktop.org,dri-devel@lists.freedesktop.org,linux-ker...@vger.kernel.org
Cc: opensource.ker...
This gives more fine-grained control over how memory is allocated over the
DMA api. In particular, it allows using an address range or pinning to
a fixed address.
Signed-off-by: Jonathan Marek
---
drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 115 ++
drivers/gpu/drm/msm/adreno/
发件人："Christian König"
发送日期：2020-04-21 21:02:27
收件人："赵军奎"
抄送人：Alex Deucher ,"David (ChunMing) Zhou"
,David Airlie ,Daniel Vetter
,Tom St Denis ,Ori Messinger
,Sam Ravnborg
,amd-...@lists.freedesktop.org,dri-devel@lists.freedesktop.org,linux-ker...@vger.kernel.org,opensource.ker...@vivo.com
主题
From: Jason Gunthorpe
Presumably the intent here was that hmm_range_fault() could put the data
into some HW specific format and thus avoid some work. However, nothing
actually does that, and it isn't clear how anything actually could do that
as hmm_range_fault() provides CPU addresses which must
From: "Christian König"
Date: 2020-04-21 15:41:27
To: 1587181464-114215-1-git-send-email-bern...@vivo.com,Felix Kuehling
,Alex Deucher ,"David
(ChunMing) Zhou" ,David Airlie ,Daniel
Vetter
,amd-...@lists.freedesktop.org,dri-devel@lists.freedesktop.org,linux-ker...@vger.kernel.org
Cc: opens
Since the PWM framework is switching struct pwm_state.period's datatype
to u64, prepare for this transition by using div_u64 to handle a 64-bit
dividend instead of a straight division operation.
Cc: Lee Jones
Cc: Daniel Thompson
Cc: Jingoo Han
Cc: Bartlomiej Zolnierkiewicz
Cc: linux-...@vger.k
Since the PWM framework is switching struct pwm_state.duty_cycle's
datatype to u64, prepare for this transition by using DIV_ROUND_UP_ULL
to handle a 64-bit dividend.
To: Jani Nikula
Cc: Joonas Lahtinen
Cc: David Airlie
Cc: Daniel Vetter
Cc: Chris Wilson
Cc: "Ville Syrjälä"
Cc: intel-...@lis
Maybe we could reduce the mutex_lock(&mem->lock)`s protected code area,
and no need to protect pr_debug.
Signed-off-by: Bernard Zhao
Changes since V1:
*commit message improve
Changes since V2:
*move comment along with the mutex_unlock
Link for V1:
*https://lore.kernel.org/patchwork/patch/12265
For the code logic, an alarm is thrown after failure, but the
code continues to run and returns successfully, so to the caller
the if check and return branch will never run.
The change is to make the code a bit more readable.
Signed-off-by: Bernard Zhao
---
drivers/gpu/drm/arm/hdlcd_crtc.c | 4 +
Hi!
On Tue, Apr 21, 2020 at 01:04:05AM +, Joel Stanley wrote:
> On Mon, 20 Apr 2020 at 18:38, Christophe Leroy
> wrote:
> > _ALIGN_DOWN() is specific to powerpc
> > ALIGN_DOWN() is generic and does the same
> >
> > Replace _ALIGN_DOWN() by ALIGN_DOWN()
>
> This one is a bit less obvious. It
diff --git a/drivers/misc/cxl/Kconfig b/drivers/misc/cxl/Kconfig
index 39eec9031487..a62795079d9c 100644
--- a/drivers/misc/cxl/Kconfig
+++ b/drivers/misc/cxl/Kconfig
@@ -19,6 +19,7 @@ config CXL
select CXL_BASE
select CXL_AFU_DRIVER_OPS
select CXL_LIB
+ select SI
> The "if(!encoder)" branch return the same value 0 of the success
> branch, maybe return -EINVAL is more better.
I suggest to improve the commit message.
* Are you still unsure about the next changes?
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/proces
Hi,
On 21.04.20 13:21, Maxime Ripard wrote:
Hi,
On Tue, Apr 21, 2020 at 11:57:33AM +0200, Philipp Rossak wrote:
On 20.04.20 09:38, Maxime Ripard wrote:
Hi,
On Fri, Apr 17, 2020 at 02:09:06PM +0200, Philipp Rossak wrote:
I'm a bit skeptical on that one since it doesn't even list the
interrup
* Maxime Ripard [200421 11:22]:
> On Tue, Apr 21, 2020 at 11:57:33AM +0200, Philipp Rossak wrote:
> > I had a look on genpd and I'm not really sure if that fits.
> >
> > It is basically some bit that verify that the clocks should be enabled or
> > disabled.
>
> No, it can do much more than that.
On Tue, Apr 21, 2020 at 09:38:09AM -0700, Sultan Alsawaf wrote:
> Why hasn't this bug got any attention:
> https://gitlab.freedesktop.org/drm/intel/issues/1412
>
> That seems like a showstopper.
Indeed, pretty shocking. It's worth mentioning that the reporter of said
bug, after significant time h
> -Original Message-
> From: Rob Herring
> Sent: Monday, 20 April 2020 23:37
>
> On Mon, Apr 13, 2020 at 04:35:53PM +0300, Hadar Gat wrote:
> > Both of_platform.h and of_device.h were included each other.
> > In of_device.h, removed unneeded #include to of_platform.h and added
> > inclu
From: Bernard Zhao
Date: 2020-04-21 10:07:50
To: Alex Deucher ,"Christian König"
,"David (ChunMing) Zhou" ,David
Airlie ,Daniel Vetter ,Lyude Paul
,Sam Ravnborg ,Bernard Zhao
,"José Roberto de Souza" ,Andrzej
Pietrasiewicz
,amd-...@lists.freedesktop.org,dri-devel@lists.freedesktop.org,lin
Hi,
On 20.04.20 09:38, Maxime Ripard wrote:
Hi,
On Fri, Apr 17, 2020 at 02:09:06PM +0200, Philipp Rossak wrote:
I'm a bit skeptical on that one since it doesn't even list the
interrupts connected to the GPU that the binding mandates.
I think he left it out for a future update.
But best he co
From: "Christian König"
Date: 2020-04-21 16:06:03
To: 1587180037-113840-1-git-send-email-bern...@vivo.com,Felix Kuehling
,Alex Deucher ,"David
(ChunMing) Zhou" ,David Airlie ,Daniel
Vetter
,amd-...@lists.freedesktop.org,dri-devel@lists.freedesktop.org,linux-ker...@vger.kernel.org
Cc: opens
On Tue, Apr 21, 2020 at 11:04:13AM +0300, Joonas Lahtinen wrote:
> Quoting Sultan Alsawaf (2020-04-20 18:42:16)
> > On Mon, Apr 20, 2020 at 12:02:39PM +0300, Joonas Lahtinen wrote:
> > > I think the the patch should be dropped for now before the issue is
> > > properly addressed. Either by backport
https://bugzilla.kernel.org/show_bug.cgi?id=205291
Lukas Wunner (lu...@wunner.de) changed:
What|Removed |Added
CC||lu...@wunner.de
--- Comm
Hi Nikolaus,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on robh/for-next]
[also build test ERROR on sunxi/sunxi/for-next v5.7-rc2 next-20200421]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system. BTW, we also suggest
On Tue, Apr 21, 2020 at 6:37 AM Qiang Yu wrote:
>
> Suspend need to wait running jobs finish and put hardware in
> poweroff state. Resume need to re-init hardware.
>
> v2:
> 1. add misc patches to prepare enable runtime pm
> 2. fix pmu command wait time out on mali400 gpu
> 3. do power and clock g
20. 4. 22. 오후 12:37에 Inki Dae 이(가) 쓴 글:
> Hi Marek,
>
> 20. 4. 21. 오후 5:09에 Marek Szyprowski 이(가) 쓴 글:
>> Hi Inki,
>>
>> On 21.04.2020 09:38, Inki Dae wrote:
>>> 20. 4. 7. 오후 10:42에 Marek Szyprowski 이(가) 쓴 글:
Explicitly check if the imported buffer has been mapped as contiguous in
the
Hi Markus Elfring,
20. 4. 5. 오후 9:18에 Markus Elfring 이(가) 쓴 글:
> From: Markus Elfring
> Date: Sun, 5 Apr 2020 14:10:09 +0200
>
> The function “platform_get_irq” can log an error already.
> Thus omit redundant messages for the exception handling in the
> calling functions.
>
> This issue was det
Hi Marek,
20. 4. 21. 오후 5:09에 Marek Szyprowski 이(가) 쓴 글:
> Hi Inki,
>
> On 21.04.2020 09:38, Inki Dae wrote:
>> 20. 4. 7. 오후 10:42에 Marek Szyprowski 이(가) 쓴 글:
>>> Explicitly check if the imported buffer has been mapped as contiguous in
>>> the DMA address space, what is required by all Exynos DRM
On 2020-04-21 21:46, Bernard Zhao wrote:
Make the code a bit more readable by using a common
error handling pattern.
With that done the patch is Reviewed-by: Christian König
.
Signed-off-by: Bernard Zhao
Thanks. The patch is
Reviewed-by: Felix Kuehling
I removed the history from the commi
Thanks again for the patch. I'm going to apply this with some minor
fixes. The headline should start with "drm/amdgpu:". I'll also change
the wording of the headline and commit message:
drm/amdgpu: shrink critical section in
amdgpu_amdkfd_gpuvm_free_memory_of_gpu
Reduce the mem->lock
On Tue, Apr 21, 2020 at 4:34 PM Michał Winiarski wrote:
>
> Quoting Daniel Vetter (2020-04-21 15:13:34)
> > On Tue, Apr 21, 2020 at 2:50 PM Michał Winiarski wrote:
> > >
> > > From: Michał Winiarski
> > >
> > > Control nodes are no longer with us.
> > > While we still need to preserve render nod
Looks good for me, patch 1&2 are:
Reviewed-by: Qiang Yu
Regards,
Qiang
On Wed, Apr 22, 2020 at 6:51 AM Robin Murphy wrote:
>
> Use the optional form of platform_get_irq() for blocks that legitimately
> may not be present, to avoid getting an annoying barrage of spurious
> warnings for non-exist
Hi Adrian,
Thank you for the patch.
On Mon, Apr 20, 2020 at 01:02:22PM +0300, Adrian Ratiu wrote:
> imx drivers don't require drm encoders and they all had empty/no-op
> implementations which got converted to simple objects to pacify the
> drm core which still requires something to be defined.
>
Hi Adrian,
Thank you for the patch.
On Tue, Apr 21, 2020 at 01:58:14PM +0300, Adrian Ratiu wrote:
> This converts the Synopsis MIPI DSI binding documentation to yaml and
> should be quite straightforward. I've added a missing ref clk and also
> added Philippe as maintainer b/c he's the original t
Hi Adrian,
On Tue, Apr 21, 2020 at 07:16:06PM +0300, Adrian Ratiu wrote:
> This adds support for the Synopsis DesignWare MIPI DSI v1.01 host
> controller which is embedded in i.MX 6 SoCs.
>
> Based on following patches, but updated/extended to work with existing
> support found in the kernel:
>
Hi Adrian,
On Wed, Apr 22, 2020 at 03:58:33AM +0300, Laurent Pinchart wrote:
> On Tue, Apr 21, 2020 at 07:16:07PM +0300, Adrian Ratiu wrote:
> > This provides an example DT binding for the MIPI DSI host controller
> > present on the i.MX6 SoC based on Synopsis DesignWare v1.01 IP.
> >
> > Cc: Rob
Hi Adrian,
Thank you for the patch.
On Tue, Apr 21, 2020 at 07:16:07PM +0300, Adrian Ratiu wrote:
> This provides an example DT binding for the MIPI DSI host controller
> present on the i.MX6 SoC based on Synopsis DesignWare v1.01 IP.
>
> Cc: Rob Herring
> Cc: Neil Armstrong
> Cc: Fabio Esteva
On Wed, Apr 15, 2020 at 06:11:10PM +0200, Karol Herbst wrote:
in addition to that 028a12f5aa829 "drm/nouveau/gr/gp107,gp108:
implement workaround for HW hanging during init" should probably get
picked as well as it's fixing some runtime pm related issue on a
handful of additional GPUs. I have a l
Hi, Matthias:
Matthias Brugger 於 2020年4月21日 週二 下午5:31寫道：
>
>
>
> On 4/16/20 6:22 PM, Chun-Kuang Hu wrote:
> > Hi, Matthias:
> >
> > Matthias Brugger 於 2020年3月26日 週四 下午11:45寫道：
> >>
> >>
> >>
> >> On 26/03/2020 15:51, CK Hu wrote:
> >>> Hi, Matthias:
> >>>
> >>> On Thu, 2020-03-26 at 12:54 +0100,
Hi, Jitao:
For this series, applied to mediatek-drm-next [1], thanks.
[1]
https://git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux.git/log/?h=mediatek-drm-next
Regards,
Chun-Kuang.
Jitao Shi 於 2020年4月11日 週六 下午3:44寫道：
>
> Changes since v5:
> - remove memset()
> - add return to remo
https://bugzilla.kernel.org/show_bug.cgi?id=206021
Clément Guérin (li...@protonmail.com) changed:
What|Removed |Added
Status|NEW |RESOLVED
https://bugzilla.kernel.org/show_bug.cgi?id=207331
Grzegorz Kowal (custos.men...@gmail.com) changed:
What|Removed |Added
Status|NEW |RESOLVED
Hi, Jitao:
Please fixup these checkpatch warnings.
WARNING: Missing commit description - Add an appropriate one
WARNING: DT binding docs and includes should be a separate patch. See:
Documentation/devicetree/bindings/submitting-patches.txt
WARNING: DT binding docs and includes should be a separat
There's no point explicitly tracking the platform device when it can be
trivially derived from the regular device pointer in the couple of
places it's ever used.
Signed-off-by: Robin Murphy
---
drivers/gpu/drm/lima/lima_devfreq.c | 7 +++
drivers/gpu/drm/lima/lima_device.c | 5 ++---
driver
Use the optional form of platform_get_irq() for blocks that legitimately
may not be present, to avoid getting an annoying barrage of spurious
warnings for non-existent PPs on configurations like Mali-450 MP2.
Signed-off-by: Robin Murphy
---
drivers/gpu/drm/lima/lima_device.c | 7 +--
1 file
On Wed, Apr 15, 2020 at 02:24:27PM +0200, Linus Walleij wrote:
> The Tegra DRM drivers includes the legacy GPIO headers
> and but what it really
> uses is since only gpio_desc
> structs are ever referenced.
>
> Include the right header on the top level tegra/drm.h
> file and drop all the surplu
Hi
> > Hm, I see the point of this (and the dev_field below, although I'd go
> > with dev_member there for some consistency with other macros using
> > offset_of or container_of), but I'm not sure about the dev_ prefix.
> > Drivers use that sometimes for the struct device *, and usage for
> > stru
Hi,
On Tue, Apr 21, 2020 at 10:25:07AM +0530, Harigovindan P wrote:
> Add support for Visionox panel driver.
>
> Signed-off-by: Harigovindan P
Please keep tags from previous versions (like my Reviewed-by from v7)
when making minimal changes.
Also there is no need to keep sending the bindings p
On Tue, Apr 21, 2020 at 08:59:09PM +0200, Julia Lawall wrote:
>
>
> On Tue, 21 Apr 2020, Dan Carpenter wrote:
>
> > On Tue, Apr 21, 2020 at 05:29:02PM +0200, Julia Lawall wrote:
> > >
> > >
> > > On Tue, 21 Apr 2020, Dan Carpenter wrote:
> > >
> > > > Hi Kernel Janitors,
> > > >
> > > > Here is
On Fri, Apr 17, 2020 at 7:16 AM H. Nikolaus Schaller wrote:
>
> Hi Rob,
>
> > Am 16.04.2020 um 22:41 schrieb Rob Herring :
> >
> > On Wed, 15 Apr 2020 10:35:08 +0200, "H. Nikolaus Schaller" wrote:
> >> The Imagination PVR/SGX GPU is part of several SoC from
> >> multiple vendors, e.g. TI OMAP, Ing
On Tue, Apr 21, 2020 at 05:29:02PM +0200, Julia Lawall wrote:
>
>
> On Tue, 21 Apr 2020, Dan Carpenter wrote:
>
> > Hi Kernel Janitors,
> >
> > Here is another idea that someone could work on, fixing the
> > IS_ERR_OR_NULL() checks in the xen driver.
> >
> > The patch c575b7eeb89f: "drm/xen-fron
On Tue, Apr 21, 2020 at 7:45 PM Dejin Zheng wrote:
>
> It forgot to call bochs_hw_fini() to release related resources when
> bochs_pci_probe() fail. eg: io virtual address get by ioremap().
Good start, although I think the best is to switch this driver to use
pcim_*() functions and drop tons of l
On Mon, Apr 20, 2020 at 10:03:13AM -0400, Jonathan Marek wrote:
> Adreno 640 and 650 GPUs need some registers set differently.
> Signed-off-by: Jonathan Marek
> ---
> drivers/gpu/drm/msm/adreno/a6xx.xml.h | 14 +++
> drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 56 ++-
> 2
On Mon, Apr 20, 2020 at 10:03:12AM -0400, Jonathan Marek wrote:
> This is required for a650 to work.
>
> Signed-off-by: Jonathan Marek
> ---
> drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 16
> drivers/gpu/drm/msm/adreno/a6xx_gmu.h | 1 +
> drivers/gpu/drm/msm/adreno/a6xx_gm
On Mon, Apr 20, 2020 at 10:03:11AM -0400, Jonathan Marek wrote:
> Signed-off-by: Jonathan Marek
I was wondering where this was. I don't think there is any reason to not squash
this into the previous patch since the GMU won't be operational without it.
> ---
> drivers/gpu/drm/msm/adreno/a6xx_gm
On Tue, 21 Apr 2020 14:38:37 +0200
Daniel Vetter wrote:
> On Mon, Apr 20, 2020 at 05:00:59PM -0600, Jonathan Corbet wrote:
> > On Mon, 20 Apr 2020 10:41:15 +0300
> > Gal Pressman wrote:
> >
> > > Fix a couple of typos: "as" -> "has" and "int" -> "in".
> > >
> > > Signed-off-by: Gal Pressman
On Mon, Apr 20, 2020 at 10:03:08AM -0400, Jonathan Marek wrote:
> Signed-off-by: Jonathan Marek
> ---
> drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 68 ---
> drivers/gpu/drm/msm/adreno/a6xx_gmu.h | 7 ++
> drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 6 +-
> drivers/gpu/drm/msm/adreno/a6x
Since the VD1 Amlogic FBC decoder is now configured by the overlay driver,
commit the right registers to decode the Amlogic FBC frame.
Tested-by: Kevin Hilman
Signed-off-by: Neil Armstrong
---
drivers/gpu/drm/meson/meson_crtc.c | 118 +
1 file changed, 88 insertions(
Setup the Amlogic FBC decoder for the VD1 video overlay plane to use
a different superblock size for the Memory Saving mode.
Tested-by: Kevin Hilman
Signed-off-by: Neil Armstrong
---
drivers/gpu/drm/meson/meson_overlay.c | 25 +++--
1 file changed, 23 insertions(+), 2 deleti
Amlogic uses a proprietary lossless image compression protocol and format
for their hardware video codec accelerators, either video decoders or
video input encoders.
It considerably reduces memory bandwidth while writing and reading
frames in memory.
The underlying storage is considered to be 3 c
According to the DSI Host Registers sections available in the IMX,
STM and RK ref manuals for 1.01, 1.30 and 1.31, the register fields
are smaller or bigger than what's coded in the driver, leading to
r/w in reserved spaces which might cause undefined behaviours.
Tested-by: Adrian Pop
Tested-by:
Setup the Amlogic FBC decoder for the VD1 video overlay plane to use
read the FBC header as Scatter Memory layout reference.
Tested-by: Kevin Hilman
Signed-off-by: Neil Armstrong
---
drivers/gpu/drm/meson/meson_overlay.c | 53 ++-
1 file changed, 35 insertions(+), 18 del
According to the Host Registers documentation for IMX, STM and RK
the LP cfg register should not be written entirely in one go because
some bits are reserved and should be kept to reset values, for eg.
BIT(15) which is reserved in all versions.
This also cleans up the code by removing the the ugly
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