On Fri, Apr 24, 2020 at 3:27 PM Andrew F. Davis wrote:
> This new export type exposes to userspace the SRAM area as a DMA-Heap,
> this allows for allocations as DMA-BUFs that can be consumed by various
> DMA-BUF supporting devices.
>
> Signed-off-by: Andrew F. Davis
Nice! Very excited to have
On Fri, Apr 24, 2020 at 3:18 PM Andrew F. Davis wrote:
>
> Some clients of DMA-Heaps probe earlier than subsys_initcall(), this
> can cause issues when these clients call dma_heap_add() before the
> core DMA-Heaps framework has initialized. DMA-Heaps should initialize
> during core startup to get
https://bugzilla.kernel.org/show_bug.cgi?id=107381
Mahmoud Elagdar (ma7mouda7...@gmail.com) changed:
What|Removed |Added
CC|
Some clients of DMA-Heaps probe earlier than subsys_initcall(), this
can cause issues when these clients call dma_heap_add() before the
core DMA-Heaps framework has initialized. DMA-Heaps should initialize
during core startup to get ahead of all users.
Signed-off-by: Andrew F. Davis
---
This new export type exposes to userspace the SRAM area as a DMA-Heap,
this allows for allocations as DMA-BUFs that can be consumed by various
DMA-BUF supporting devices.
Signed-off-by: Andrew F. Davis
---
.../devicetree/bindings/sram/sram.yaml| 8 +
drivers/misc/Kconfig
On Fri, Apr 24, 2020 at 4:11 AM Emil Velikov wrote:
>
> On Thu, 23 Apr 2020 at 23:51, Peter Collingbourne wrote:
> >
> > The render node is required by Android which does not support the legacy
> > drmAuth authentication process.
> >
> > Signed-off-by: Peter Collingbourne
> > ---
> >
Applied. Thanks!
Alex
On Fri, Apr 24, 2020 at 3:56 AM Christian König
wrote:
>
> Am 24.04.20 um 09:56 schrieb Zheng Bin:
> > Fixes coccicheck warning:
> >
> > drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c:2534:2-3: Unneeded semicolon
> >
> > Reported-by: Hulk Robot
> > Signed-off-by: Zheng Bin
>
>
Let's now create more planes that can be affected to all the CRTCs.
vc4 has 3 CRTCs, 1 primary and 1 cursor each, and was having 24 (8
planes per CRTC) overlays.
However, vc5 has 5 CRTCs, so keeping the same logic would put us at 50
planes which is well above the 32 planes limit imposed by DRM.
Fixes coccicheck warning:
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c:2534:2-3: Unneeded semicolon
Reported-by: Hulk Robot
Signed-off-by: Zheng Bin
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
The COB allocation depends on the HVS channel used for a given
pixelvalve.
While the channel allocation was entirely static in vc4, vc5 changes
that and at bind time, a pixelvalve can be assigned to multiple
HVS channels.
Let's prepare that rework by allocating the COB when it's actually
needed.
The vc4_hdmi_connector was only used to switch between drm_connector to
drm_encoder. However, we can now use vc4_hdmi to do the switch, so that
structure is redundant.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_hdmi.c | 19 ---
drivers/gpu/drm/vc4/vc4_hdmi.h | 23
The VIDEN bit in the pixelvalve currently being used to enable or disable
the pixelvalve seems to not be enough in some situations, which whill end
up with the pixelvalve stalling.
In such a case, even re-enabling VIDEN doesn't bring it back and we need to
clear the FIFO. This can only be done if
The parameter name should be interruptible instead of interuptable.
Signed-off-by: Guixiong Wei
---
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h
b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h
index
Now that we have everything in place, we can now register all the overlay
planes that can be assigned to all the CRTCs.
This has two side effects:
- The number of overlay planes is reduced from 24 to 8. This is temporary
and will be increased again in the next patch.
- The ID of the
The pllb_arm_lookup pointer in the struct raspberrypi_clk is not used for
anything but to store the returned pointer to clkdev_hw_create, and is not
used anywhere else in the driver.
Let's remove that global pointer from the structure.
Cc: Michael Turquette
Cc: linux-...@vger.kernel.org
Now that we are passing the vc4_hdmi structure to the connector init
function, we can simply use the pointer in that structure instead of
having the pointer as an argument.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_hdmi.c | 7 +++
1 file changed, 3 insertions(+), 4
The HDMI controllers found in the BCM2711 have most of the registers
reorganized in multiple registers areas and at different offsets than
previously found.
The logic however remains pretty much the same, so it doesn't really make
sense to create a whole new driver and we should share the code as
The HDMI block has a block that controls clocks and reset signals to the
HDMI0 and HDMI1 controllers.
Let's expose that through a clock driver implementing a clock and reset
provider.
Cc: Michael Turquette
Cc: Stephen Boyd
Cc: Rob Herring
Cc: linux-...@vger.kernel.org
Cc:
The BCM2711 has a reworked display pipeline, and the load tracker needs
some adjustement to operate properly. Let's add a compatible for BCM2711
and disable the load tracker until properly supported.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_drv.c | 1 +
Now that we don't have any users anymore, we can kill that pointer.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_drv.h | 1 -
drivers/gpu/drm/vc4/vc4_hdmi.c | 14 ++
2 files changed, 6 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/vc4/vc4_drv.h
The HVS found in the BCM2711 is slightly different from the previous
generations, let's add a compatible for it.
Signed-off-by: Maxime Ripard
---
Documentation/devicetree/bindings/display/brcm,bcm2835-hvs.yaml | 18 ++-
1 file changed, 17 insertions(+), 1 deletion(-)
diff --git
The BCM2711, supported by ARCH_BCM2835, also has a controller by the
brcmstb driver so let's allow it to be compiled on that platform.
Cc: Kamal Dasu
Cc: Wolfram Sang
Cc: bcm-kernel-feedback-l...@broadcom.com
Cc: linux-...@vger.kernel.org
Acked-by: Florian Fainelli
Signed-off-by: Maxime Ripard
The current driver only supports a single HDMI controller, and part of
the issue is that the main vc4_dev structure holds a pointer to its
(only) HDMI controller, and the HDMI registers accessors will use it to
retrieve the mapped addresses.
Let's modify those accessors to use directly the
The BCM2711 has a unit controlling the HDMI0 and HDMI1 clock and reset
signals. Let's add a binding for it.
Cc: Philipp Zabel
Cc: Rob Herring
Cc: devicet...@vger.kernel.org
Reviewed-by: Rob Herring
Signed-off-by: Maxime Ripard
---
Documentation/devicetree/bindings/clock/brcm,bcm2711-dvp.yaml
From: Florian Fainelli
Convert the Raspberry Pi BCM2835 firmware binding document to YAML.
Verified with dt_binding_check and dtbs_check.
Signed-off-by: Florian Fainelli
Signed-off-by: Maxime Ripard
---
Documentation/devicetree/bindings/arm/bcm/raspberrypi,bcm2835-firmware.txt |
14
Whenever the code needs to access the vc4_hdmi structure from a DRM
connector or encoder, it first accesses the drm_device associated to the
connector, then retrieve the drm_dev private data which gives it a
pointer to our vc4_dev, and will finally follow the vc4_hdmi pointer in
that structure.
The BCM2711 and BCM283x HDMI controllers use a slightly different reset
sequence, so let's add a callback to reset the controller.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_hdmi.c | 17 -
drivers/gpu/drm/vc4/vc4_hdmi.h | 3 +++
2 files changed, 15 insertions(+),
The raspberrypi_register_pllb has been returning an integer so far to
notify whether the functions has exited successfully or not.
However, the OF provider functions in the clock framework require access to
the clk_hw structure so that we can expose those clocks to device tree
consumers.
Since
From: Dave Stevenson
The HVS found in the BCM2711 is slightly different from the previous
generations.
Most notably, the display list layout changes a bit, the LBM doesn't have
the same size and the formats ordering for some formats is swapped.
Signed-off-by: Dave Stevenson
Signed-off-by:
While the device tree and the driver expected a clock-names and a
clock-cells properties, it wasn't explicitly documented in the previous
binding. Make sure it is now.
Cc: devicet...@vger.kernel.org
Reviewed-by: Rob Herring
Signed-off-by: Maxime Ripard
---
The HDMI controllers found in the BCM2711 SoC need some adjustments to the
bindings, especially since the registers have been shuffled around in more
register ranges.
Cc: Rob Herring
Cc: devicet...@vger.kernel.org
Signed-off-by: Maxime Ripard
---
The HSM clock needs to be setup at around 101% of the pixel rate. This
was done previously by setting the clock rate to 163.7MHz at probe time and
only check in mode_valid whether the mode pixel clock was under the pixel
clock +1% or not.
However, with 4k we need to change that frequency to a
The pllb_arm clock was created at probe time, but was never removed if
something went wrong later in probe, or if the driver was ever removed from
the system.
Now that we are using clk_hw_register, we can just use its managed variant
to take care of that for us.
Cc: Michael Turquette
Cc:
From: Dave Stevenson
ALSA's iec958 plugin by default sets the block start preamble
to 8, whilst this driver was programming the hardware to expect
0xF.
Amend the hardware config to match ALSA.
Signed-off-by: Dave Stevenson
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_hdmi.c | 3
The longer FIFOs in vc5 pixelvalves means that the FIFO full level
doesn't fit in the original register field and that we also have a
secondary field. In order to prepare for this, let's move the registers
fill part to a helper function.
Signed-off-by: Maxime Ripard
---
The planes so far were created as part of the CRTC binding code with
each planes created associated only to one CRTC. However, the hardware
in the vc4 doesn't really have such constraint and can be used with any
CRTC.
In order to rework this, let's first move the overlay and cursor planes
Some pixelvalves in vc5 use the same interrupt line so let's register our
interrupt handler as a shared one.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_crtc.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c
Not all pixelvalve FIFOs in vc5 have the same depth, so we need to add that
to our vc4_crtc_data structure to be able to compute the fill level
properly later on.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_crtc.c | 19 ---
drivers/gpu/drm/vc4/vc4_drv.h | 3 +++
2
For the upcoming registration of the clocks provided by the firmware, make
sure it's exposed to the device tree providers.
Cc: Michael Turquette
Cc: linux-...@vger.kernel.org
Reviewed-by: Stephen Boyd
Signed-off-by: Maxime Ripard
---
drivers/clk/bcm/clk-raspberrypi.c | 16
1
From: Dave Stevenson
The audio configuration has changed for the BCM2711, with notably a
different parent clock and a different channel configuration.
Make that modular to be able to support the BCM2711.
Signed-off-by: Dave Stevenson
Signed-off-by: Maxime Ripard
---
On 24/04/2020 12:02, Lukasz Luba wrote:
> Hi Daniel,
>
> On 4/23/20 6:57 PM, Daniel Lezcano wrote:
>> On Fri, Apr 10, 2020 at 09:42:09AM +0100, Lukasz Luba wrote:
>>> The overhauled Energy Model (EM) framework support also devfreq devices.
>>> The unified API interface of the EM can be used in
The function vc4_hdmi_connector_detect access its vc4_hdmi struct by
dereferencing the pointer in the structure vc4_dev. This will cause some
issues when we will have multiple HDMI controllers, so let's just use the
local variable for now instead of dereferencing that pointer all the time,
and
The CEC init code was put directly into the bind function, which was quite
inconsistent with how the audio support was done, and would prevent us from
further changes to skip that initialisation entirely.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_hdmi.c | 108
Now that we have a clock driver for the clocks exposed by the firmware,
let's add the device tree nodes for it.
Signed-off-by: Maxime Ripard
---
arch/arm/boot/dts/bcm2711-rpi-4-b.dts | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts
Now that we have a driver for the DVP, let's add its DT node.
Signed-off-by: Maxime Ripard
---
arch/arm/boot/dts/bcm2711.dtsi | 15 +++
1 file changed, 15 insertions(+)
diff --git a/arch/arm/boot/dts/bcm2711.dtsi b/arch/arm/boot/dts/bcm2711.dtsi
index a91cf68e3c4c..00bcaed1be32
The reset-simple code lacks a reset callback that is still pretty easy to
implement. The only real thing to consider is the delay needed for a device
to be reset, so let's expose that as part of the reset-simple driver data.
Cc: Philipp Zabel
Signed-off-by: Maxime Ripard
---
Hi everyone,
Here's a (pretty long) series to introduce support in the VC4 DRM driver
for the display pipeline found in the BCM2711 (and thus the RaspberryPi 4).
The main differences are that there's two HDMI controllers and that there's
more pixelvalve now. Those pixelvalve come with a mux in
The reset-simple code can be useful for drivers outside of drivers/reset
that have a few reset controls as part of their features. Let's move it to
include/linux/reset.
Cc: Philipp Zabel
Signed-off-by: Maxime Ripard
---
drivers/reset/reset-simple.c| 3 +--
drivers/reset/reset-simple.h
Now that all the drivers have been adjusted for it, let's bring in the
necessary device tree changes.
Signed-off-by: Maxime Ripard
---
arch/arm/boot/dts/bcm2711-rpi-4-b.dts | 46 +++-
arch/arm/boot/dts/bcm2711.dtsi| 115 ++-
2 files changed, 160
The hvs_latency_pix variable doesn't need to be a variable and can just be
defined.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_crtc.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu/drm/vc4/vc4_crtc.c
index
vc4_drv.h doesn't have any include guards which prevents it from being
included twice. Let's add them.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_drv.h | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/vc4/vc4_drv.h b/drivers/gpu/drm/vc4/vc4_drv.h
index
In order to prevent timeouts and stalls in the pipeline, the core clock
needs to be maxed at 500MHz during a modeset on the BCM2711.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_drv.h | 2 ++
drivers/gpu/drm/vc4/vc4_hvs.c | 9 +
drivers/gpu/drm/vc4/vc4_kms.c | 7 +++
The vc4_crtc_handle_page_flip already has a local variable holding the
value of vc4_crtc->channel, so let's use it instead.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_crtc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c
So far the driver has really only been providing a single clock, and stored
both the data associated to that clock in particular with the data
associated to the "controller".
Since we will change that in the future, let's decouple the clock data from
the provider data.
Cc: Michael Turquette
Cc:
The firmware running on the RPi VideoCore can be used to discover and
change the various clocks running in the BCM2711. Since devices will
need to use them through the DT, let's add a pretty simple binding.
Cc: Michael Turquette
Cc: Stephen Boyd
Cc: Rob Herring
Cc: linux-...@vger.kernel.org
> Sorry, I do not know how to use the SmPL script.
I would like to try again to make you more familiar with applications
of the Coccinelle software.
From: Dave Stevenson
If the encoder is disabled and re-enabled (eg mode change) all infoframes
are reset, whilst the audio subsystem know nothing about this change.
The driver therefore needs to reinstate the audio infoframe for
itself.
Signed-off-by: Dave Stevenson
Signed-off-by: Maxime
The driver calls the helper to add the color management properties twice,
which is redundant. Remove the first one.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_crtc.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu/drm/vc4/vc4_crtc.c
The previous generations were only supporting a single HDMI controller, but
that's about to change, so put an index as well to differentiate between
the two controllers.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_crtc.c | 2 +-
drivers/gpu/drm/vc4/vc4_drv.h | 2 +-
The HVS found in the BCM2711 has 6 outputs and 3 FIFOs, with each output
being connected to a pixelvalve, and some muxing between the FIFOs and
outputs.
Any output cannot feed from any FIFO though, and they all have a bunch of
constraints.
In order to support this, let's store the possible FIFOs
Fixes coccicheck warning:
drivers/gpu/drm/rockchip/cdn-dp-reg.c:604:2-3: Unneeded semicolon
drivers/gpu/drm/rockchip/cdn-dp-reg.c:622:2-3: Unneeded semicolon
drivers/gpu/drm/rockchip/cdn-dp-reg.c:703:2-3: Unneeded semicolon
Reported-by: Hulk Robot
Signed-off-by: Zheng Bin
---
The driver has really only supported one clock so far and has hardcoded the
ID used in communications with the firmware in all the functions
implementing the clock framework hooks. Let's store that in the clock data
structure so that we can support more clocks later on.
Cc: Michael Turquette
Cc:
Similarly to the audio support, CEC support is not there yet for the
BCM2711, so let's skip entirely the CEC initialization through a variant
flag.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_hdmi.c | 4
drivers/gpu/drm/vc4/vc4_hdmi.h | 3 +++
2 files changed, 7 insertions(+)
An unkillable task report
INFO: task syz-executor.2:10292 can't die for more than 143 seconds.
syz-executor.2 R running task26216 10292 7415 0x4006
Call Trace:
preempt_schedule_irq+0xb0/0x150 kernel/sched/core.c:4346
retint_kernel+0x1b/0x2b
RIP: 0010:bitfill_aligned+0x12/0x200
Instead of declaring the clk_init_data and then calling memset on it, just
initialise properly.
Cc: Michael Turquette
Cc: Stephen Boyd
Cc: linux-...@vger.kernel.org
Acked-by: Nicolas Saenz Julienne
Signed-off-by: Maxime Ripard
---
drivers/clk/bcm/clk-raspberrypi.c | 3 +--
1 file changed, 1
In vc5, the HVS has 6 outputs and 3 FIFOs (or channels), with
pixelvalves each being assigned to a given output, but each output can
then be muxed to feed from multiple FIFOs.
Since vc4 had that entirely static, both were probably equivalent, but
since that changes, let's rename hvs_channel to
The HDMI driver was registering a single debugfs file so far with the name
hdmi_regs.
Obviously, this is not going to work anymore when will have multiple HDMI
controllers since we will end up trying to register two files with the same
name.
Let's use the ID to avoid that name conflict.
The raspberry_clock_property only takes the clock ID as an argument, but
now that we have a clock data structure it makes more sense to just pass
that structure instead.
Cc: Michael Turquette
Cc: Stephen Boyd
Cc: linux-...@vger.kernel.org
Acked-by: Nicolas Saenz Julienne
Signed-off-by: Maxime
So far the plane creation was done when each CRTC was bound, and those
planes were only tied to the CRTC that was registering them.
This causes two main issues:
- The planes in the vc4 hardware are actually not tied to any CRTC, but
can be used with every combination
- More importantly,
The pllb_arm clock is defined as a fixed factor clock with the pllb
clock as a parent. However, all its configuration is entirely static,
and thus we don't really need to call clk_hw_register_fixed_factor() but
can simply call clk_hw_register() with a static clk_fixed_factor
structure.
Cc:
Fixes coccicheck warning:
drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.h:307:2-3: Unneeded semicolon
drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c:583:2-3: Unneeded semicolon
Reported-by: Hulk Robot
Signed-off-by: Zheng Bin
---
drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c | 2 +-
Let's continue the implementation of hooks for the parts that change in the
BCM2711 SoC with the PHY RNG setup.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_hdmi.c | 15 +--
drivers/gpu/drm/vc4/vc4_hdmi.h | 8
drivers/gpu/drm/vc4/vc4_hdmi_phy.c | 15
Some of the HDMI pixelvalves in vc5 output two pixels per clock cycle.
Let's put the number of pixel output per clock cycle in the CRTC data and
update the various calculations to reflect that.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_crtc.c | 17 ++---
The driver only supports the pllb for now and all the clock framework hooks
are a mix of the generic firmware interface and the specifics of the pllb.
Since we will support more clocks in the future let's split the generic and
specific hooks
Cc: Michael Turquette
Cc: linux-...@vger.kernel.org
The BCM283x SoCs have a display pipeline composed of several controllers
with device tree bindings that are supported by Linux.
Now that we have the DT validation in place, let's split into separate
files and convert the device tree bindings for those controllers to
schemas.
This is just a 1:1
Since we're going to introduce pixelvalve data structures for other SoCs
than the BCM2835, let's rename the structures defined in the code to
make it obvious which SoC we're targeting.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_crtc.c | 12 ++--
1 file changed, 6
The BCM2711 has 5 pixelvalves, so now that our driver is ready, let's add
support for them.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_crtc.c | 81 ++-
drivers/gpu/drm/vc4/vc4_regs.h | 6 +++-
2 files changed, 85 insertions(+), 2 deletions(-)
diff
The driver isn't consistent with the name given to the vc4_hdmi
structure pointer in its functions. Make sure to use a consistent name.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_hdmi.c | 281 +-
1 file changed, 141 insertions(+), 140 deletions(-)
the vc4_hdmi driver has some custom structures to hold the data it needs to
associate with the drm_encoder and drm_connector structures.
However, it allocates them separately from the vc4_hdmi structure which
makes it more complicated than it needs to be.
Move those structures to be contained by
Hi Ricardo,
Thank you for your patch.
On 24/4/20 8:53, Ricardo Cañuelo wrote:
> This converts the Analogix ANX7814 bridge DT binding to yaml. Port
> definitions and descriptions were expanded, apart from that it's a
> direct translation from the original binding.
>
> Signed-off-by: Ricardo
From: Liviu Dudau
Date: 2020-04-24 19:09:50
To: Bernard Zhao
Cc: Brian Starkey ,David Airlie
,Daniel Vetter
,dri-devel@lists.freedesktop.org,linux-ker...@vger.kernel.org,opensource.ker...@vivo.com
Subject: Re: [PATCH v2] drm/arm: fixes pixel clock enabled with wrong format>Hi
Bernand,
>
We'll need to access the crtc_state from outside of vc4_crtc.c, so let's
move it to vc4_drv.h
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_crtc.c | 21 -
drivers/gpu/drm/vc4/vc4_drv.h | 21 +
2 files changed, 21 insertions(+), 21 deletions(-)
Now that the driver is ready for it, let's bring in the HDMI controllers
variants for the BCM2711.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_hdmi.c | 276 +-
drivers/gpu/drm/vc4/vc4_hdmi.h | 35 ++-
drivers/gpu/drm/vc4/vc4_hdmi_phy.c | 468
The mode_valid hook on the encoder uses a pointer to a drm_encoder called
crtc, which is pretty confusing. Let's rename it to encoder to make it
clear what it is.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_hdmi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
The current firmware clock driver for the RaspberryPi can only be probed by
manually registering an associated platform_device.
While this works fine for cpufreq where the device gets attached a clkdev
lookup, it would be tedious to maintain a table of all the devices using
one of the clocks
While the device tree and the driver expected a clock-names property, it
wasn't explicitly documented in the previous binding. The documented order
was wrong too, so make sure clock-names is there and in the proper order.
Cc: devicet...@vger.kernel.org
Reviewed-by: Rob Herring
Signed-off-by:
We will need to share the vc4_hdmi and related structures with multiple
files, so let's create a header for it.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_hdmi.c | 76 +---
drivers/gpu/drm/vc4/vc4_hdmi.h | 86 +++-
2
The vc4 CRTC will use the encoder type to control its output clock
muxing. However, this will be different from HDMI0 to HDMI1, so let's
store our type in the variant structure so that we can support multiple
controllers later on.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_hdmi.c
The HDMI controllers found in the BCM2711 has a pretty different clock and
registers areas than found in the older BCM283x SoCs.
Let's create a variant structure to store the various adjustments we'll
need later on, and a function to get the resources needed for one
particular version.
Fixes coccicheck warning:
drivers/gpu/drm/panel/panel-ilitek-ili9322.c:382:2-3: Unneeded semicolon
drivers/gpu/drm/panel/panel-ilitek-ili9322.c:391:2-3: Unneeded semicolon
Reported-by: Hulk Robot
Signed-off-by: Zheng Bin
---
drivers/gpu/drm/panel/panel-ilitek-ili9322.c | 4 ++--
1 file
Since we don't care about retrieving the clk_lookup structure pointer
returned by clkdev_hw_create, we can just use the clk_hw_register_clkdev
function.
Cc: Michael Turquette
Cc: linux-...@vger.kernel.org
Acked-by: Nicolas Saenz Julienne
Reviewed-by: Stephen Boyd
Signed-off-by: Maxime Ripard
The BCM2711 comes with other pixelvalves that have different requirements
and capabilities. Let's document their compatible.
Cc: devicet...@vger.kernel.org
Reviewed-by: Rob Herring
Signed-off-by: Maxime Ripard
---
Documentation/devicetree/bindings/display/brcm,bcm2835-pixelvalve0.yaml | 5
On 4/24/2020 9:13 AM, Wolfram Sang wrote:
>
>> config I2C_BRCMSTB
>> tristate "BRCM Settop/DSL I2C controller"
>> -depends on ARCH_BRCMSTB || BMIPS_GENERIC || ARCH_BCM_63XX || \
>> - COMPILE_TEST
>> +depends on ARCH_BCM2835 || ARCH_BRCMSTB || BMIPS_GENERIC || \
>> +
The CEC_CLOCK_DIV define is not used anywhere in the driver, let's remove
it.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_hdmi.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c
index 20b6af98abad..360743187f95
The raspberrypi_fw_pll_is_on function doesn't only apply to PLL
registered in the driver, but any clock exposed by the firmware.
Since we also implement the is_prepared hook, make the function
consistent with the other function names.
Cc: Michael Turquette
Cc: linux-...@vger.kernel.org
Instead of creating planes for each CRTC, we eventually want to create all
the planes for each CRTCs.
In order to make that more convenient, let's iterate on the CRTCs in the
plane creation function instead of its caller.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_drv.c | 9
The HVS5 uses different color matrices. Disable color management support
for now.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_crtc.c | 17 +++--
1 file changed, 11 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c
The BCM2711 comes with a new VideoCore. Add a compatible for it.
Cc: devicet...@vger.kernel.org
Reviewed-by: Rob Herring
Signed-off-by: Maxime Ripard
---
Documentation/devicetree/bindings/display/brcm,bcm2835-vc4.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git
The BCM2711 sports a second HDMI controller, so let's add that second HDMI
encoder type.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_drv.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/vc4/vc4_drv.h b/drivers/gpu/drm/vc4/vc4_drv.h
index
Fixes coccicheck warning:
drivers/gpu/drm/meson/meson_plane.c:226:3-4: Unneeded semicolon
Reported-by: Hulk Robot
Signed-off-by: Zheng Bin
---
drivers/gpu/drm/meson/meson_plane.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/meson/meson_plane.c
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