On Sat, Nov 14, 2020 at 03:16:13PM +0800, Zou Wei wrote:
> Fix the following sparse warning:
>
> ./virtgpu_prime.c:46:33: warning: symbol 'virtgpu_dmabuf_ops' was not
> declared. Should it be static?
Pushed to drm-misc-next.
thanks,
Gerd
___
dri-de
On 02-11-20, 07:08, Chun-Kuang Hu wrote:
> + Vinod:
>
> Hi, Chunfeng:
>
> Chunfeng Yun 於 2020年10月30日 週五 下午2:24寫道：
> >
> > On Thu, 2020-10-29 at 23:27 +0800, Chun-Kuang Hu wrote:
> > > mtk_mipi_dsi_phy is currently placed inside mediatek drm driver, but it's
> > > more suitable to place a phy dri
On 11/14/20 1:46 PM, Rob Clark wrote:
On Sat, Nov 14, 2020 at 8:24 AM Christoph Hellwig wrote:
On Sat, Nov 14, 2020 at 10:17:12AM -0500, Jonathan Marek wrote:
+void msm_gem_sync_cache(struct drm_gem_object *obj, uint32_t flags,
+ size_t range_start, size_t range_end)
+{
+ stru
13.11.2020 19:35, Thierry Reding пишет:
> On Fri, Nov 13, 2020 at 01:14:45AM +0300, Dmitry Osipenko wrote:
>> 12.11.2020 23:43, Thierry Reding пишет:
The difference in comparison to using voltage regulator directly is
minimal, basically the core-supply phandle is replaced is replaced with
13.11.2020 17:29, Mark Brown пишет:
> On Fri, Nov 13, 2020 at 01:37:01AM +0300, Dmitry Osipenko wrote:
>> 12.11.2020 23:01, Mark Brown пишет:
But it's not allowed to change voltage of a dummy regulator, is it
intentional?
>
>>> Of course not, we can't know if the requested new voltage is
EMC driver will become mandatory after turning it into interconnect
provider because interconnect users, like display controller driver, will
fail to probe using newer device-trees that have interconnect properties.
Thus make EMC driver to probe even if timings are missing in device-tree.
Signed-o
Remove tegra20-devfreq in order to replace it with a EMC_STAT based
devfreq driver. Previously we were going to use MC_STAT based
tegra20-devfreq driver because EMC_STAT wasn't working properly, but
now that problem is resolved. This resolves complications imposed by
the removed driver since it was
Now Internal and External memory controllers are memory interconnection
providers. This allows us to use interconnect API for tuning of memory
configuration. EMC driver now supports OPPs and DVFS.
Tested-by: Nicolas Chauvet
Signed-off-by: Dmitry Osipenko
---
drivers/memory/tegra/Kconfig
This patch series add bus format negotiation support for Cadence MHDP8546 bridge
driver.
The patch series has four patches in the below sequence:
1. drm: bridge: cdns-mhdp8546: Add output bus format negotiation
Add minimal output bus format negotiation support.
2. drm: bridge: cdns-mhdp8546: Modif
This patch adds minimal output bus format negotiation support.
Currently we are adding support for only MEDIA_BUS_FMT_FIXED.
Signed-off-by: Yuti Amonkar
---
.../drm/bridge/cadence/cdns-mhdp8546-core.c| 18 ++
1 file changed, 18 insertions(+)
diff --git a/drivers/gpu/drm/brid
13.11.2020 20:28, Mark Brown пишет:
> On Fri, Nov 13, 2020 at 08:13:49PM +0300, Dmitry Osipenko wrote:
>> 13.11.2020 19:15, Mark Brown пишет:
>
>>> My point here is that the driver shouldn't be checking for a dummy
>>> regulator, the driver should be checking the features that are provided
>>> to
Previously we were using count-weight of the T124 for T30 in order to
get EMC clock rate that was reasonable for T30. In fact the count-weight
should be x2 times smaller on T30, but then devfreq was producing a bit
too low EMC clock rate for ISO memory clients, like display controller
for example.
The private objects have a gotcha that could result in a use-after-free,
make sure it's properly documented.
Signed-off-by: Maxime Ripard
---
include/drm/drm_atomic.h | 18 ++
1 file changed, 18 insertions(+)
diff --git a/include/drm/drm_atomic.h b/include/drm/drm_atomic.h
index
Modify atomic_get_input_bus_format function to return input formats
based on the output format instead of using hardcoded value.
Signed-off-by: Yuti Amonkar
---
.../drm/bridge/cadence/cdns-mhdp8546-core.c | 110 --
1 file changed, 100 insertions(+), 10 deletions(-)
diff --git
Fix the size of Tegra20 EMC registers, which should be twice bigger.
Acked-by: Krzysztof Kozlowski
Signed-off-by: Dmitry Osipenko
---
arch/arm/boot/dts/tegra20.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dts
Hi!
Thanks for the patch.
Dne četrtek, 12. november 2020 ob 14:14:51 CET je Xiongfeng Wang napisal(a):
> Fix to return a negative error code from the error handling case instead
> of 0 in function sun8i_dw_hdmi_bind().
>
> Fixes: b7c7436a5ff0 ("drm/sun4i: Implement A83T HDMI driver")
> Reported-
On Fri, Nov 13, 2020 at 03:30:04AM +, Xiong, Jianxin wrote:
> > From: Jason Gunthorpe
> > Sent: Thursday, November 12, 2020 4:31 PM
> > To: Xiong, Jianxin
> > Cc: linux-r...@vger.kernel.org; dri-devel@lists.freedesktop.org; Doug
> > Ledford ; Leon Romanovsky
> > ; Sumit Semwal ; Christian Ko
Display controller (DC) performs isochronous memory transfers, and thus,
has a requirement for a minimum memory bandwidth that shall be fulfilled,
otherwise framebuffer data can't be fetched fast enough and this results
in a DC's data-FIFO underflow that follows by a visual corruption.
The Memory
v2:
- added patches 2/3 to enable using dma_ops_bypass
- changed DRM_MSM_GEM_SYNC_CACHE patch to use dma_sync_sg_for_device()
and dma_sync_sg_for_cpu(), and renamed sync flags.
Not sure I did the right thing with for the dma_ops_bypass part,
this is what I came up with reading the emails.
Jo
Always use direct dma ops and no swiotlb.
Note: arm-smmu-qcom already avoids creating iommu dma ops, but not
everything uses arm-smmu-qcom and this also sets the dma mask.
Signed-off-by: Jonathan Marek
---
drivers/gpu/drm/msm/Kconfig | 1 +
drivers/gpu/drm/msm/msm_drv.c | 8 +---
2 files
Add EMC OPP tables and interconnect paths that will be used for
dynamic memory bandwidth scaling based on memory utilization statistics.
Update board device-trees by removing unsupported EMC OPPs.
Note that ACTMON watches all memory interconnect paths, but we use a
single CPU-READ interconnect pat
Get the pixel format and bpc based on the output bus format
negotiated instead of hardcoding the values.
Signed-off-by: Yuti Amonkar
---
.../drm/bridge/cadence/cdns-mhdp8546-core.c | 82 +++
1 file changed, 64 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/drm/bridge/
This series brings initial support for memory interconnect to Tegra20,
Tegra30 and Tegra124 SoCs.
For the starter only display controllers and devfreq devices are getting
interconnect API support, others could be supported later on. The display
controllers have the biggest demand for interconnect
Now that we have proper ordering guaranteed by the previous patch, the
semaphore is redundant and can be removed.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_crtc.c | 13 -
drivers/gpu/drm/vc4/vc4_drv.h | 2 --
drivers/gpu/drm/vc4/vc4_kms.c | 20 +---
We're going to use those helpers in functions higher in that file, let's
move it around.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_kms.c | 26 +-
1 file changed, 13 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/vc4/vc4_kms.c b/drivers/gpu/drm
Some usb type-c dongle use irq_hpd request to perform device
connect and disconnect. This patch add handling of both connection
and disconnection are based on hpd_state and sink_count.
Fixes: 6c6e8b2e04d5 ("drm/msm/dp: promote irq_hpd handle to handle link
training correctly")
Signed-off-by: Kuog
14.11.2020 18:42, Krzysztof Kozlowski пишет:
> On Wed, Nov 11, 2020 at 04:14:38AM +0300, Dmitry Osipenko wrote:
>> EMC driver will become mandatory after turning it into interconnect
>> provider because interconnect users, like display controller driver, will
>> fail to probe using newer device-tre
13.11.2020 23:41, Thierry Reding пишет:
> From: Thierry Reding
>
> The original patch for commit 3d2e7aec7013 ("drm/tegra: output: Don't
> leak OF node on error") contained this hunk, but it was accidentally
> dropped during conflict resolution. This causes use-after-free errors
> on devices that
Add interconnect properties to the Memory Controller, External Memory
Controller and the Display Controller nodes in order to describe hardware
interconnection.
Signed-off-by: Dmitry Osipenko
---
arch/arm/boot/dts/tegra20.dtsi | 26 +-
1 file changed, 25 insertions(+), 1
On 11/14/20 2:39 PM, Rob Clark wrote:
On Sat, Nov 14, 2020 at 10:58 AM Jonathan Marek wrote:
On 11/14/20 1:46 PM, Rob Clark wrote:
On Sat, Nov 14, 2020 at 8:24 AM Christoph Hellwig wrote:
On Sat, Nov 14, 2020 at 10:17:12AM -0500, Jonathan Marek wrote:
+void msm_gem_sync_cache(struct drm_g
Add nvidia,memory-controller to the Tegra20 External Memory Controller
node. This allows to perform a direct lookup of the Memory Controller
instead of walking up the whole tree. This puts Tegra20 device-tree on
par with Tegra30+.
Signed-off-by: Dmitry Osipenko
---
arch/arm/boot/dts/tegra20.dtsi
Add a new cache mode for creating coherent host-cached BOs.
Signed-off-by: Jonathan Marek
Reviewed-by: Jordan Crouse
---
drivers/gpu/drm/msm/adreno/adreno_device.c | 1 +
drivers/gpu/drm/msm/msm_drv.h | 1 +
drivers/gpu/drm/msm/msm_gem.c | 8
include/uapi/drm/
Some dongle require link training be done at irq_hpd request. This serial
patches address the issues so that DP/HDMI display can be lit up properlly.
This serial Patch also fixes clock stuck at "off" state error caused by
previous link training failed.
Kuogee Hsieh (3):
drm/msm/dp: deinitialize
Now Internal and External memory controllers are memory interconnection
providers. This allows us to use interconnect API for tuning of memory
configuration. EMC driver now supports OPPs and DVFS. MC driver now
supports tuning of memory arbitration latency, which needs to be done
for ISO memory cli
Fix the following sparse warning:
./virtgpu_prime.c:46:33: warning: symbol 'virtgpu_dmabuf_ops' was not declared.
Should it be static?
Signed-off-by: Zou Wei
---
drivers/gpu/drm/virtio/virtgpu_prime.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/virtio/vi
When we can't allocate a new channel, we can simply return instead of
having to handle both cases, and that simplifies a bit the code.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_kms.c | 13 ++---
1 file changed, 6 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/
Add EMC OPP DVFS/DFS tables and interconnect paths that will be used for
dynamic memory bandwidth scaling based on memory utilization statistics.
Update board device-trees by removing unsupported EMC OPPs.
Note that ACTMON watches all memory interconnect paths, but we use a
single CPU-READ interco
Add EMC OPP DVFS tables and update board device-trees by removing
unsupported OPPs.
Signed-off-by: Dmitry Osipenko
---
.../boot/dts/tegra20-acer-a500-picasso.dts| 5 +
arch/arm/boot/dts/tegra20-colibri.dtsi| 4 +
arch/arm/boot/dts/tegra20-paz00.dts | 4 +
.../arm/boot/dt
It's useful to know the total number of underflow events and currently
the debug stats are getting reset each time CRTC is being disabled. Let's
account the overall number of events that doesn't get a reset.
Tested-by: Peter Geis
Tested-by: Nicolas Chauvet
Signed-off-by: Dmitry Osipenko
---
dr
This makes it possible to use the non-coherent cached MSM_BO_CACHED mode,
which otherwise doesn't provide any method for cleaning/invalidating the
cache to sync with the device.
Signed-off-by: Jonathan Marek
---
drivers/gpu/drm/msm/msm_drv.c | 21 +
drivers/gpu/drm/msm/msm_dr
On Thu, 12 Nov 2020 at 23:14, Dmitry Osipenko wrote:
>
> 12.11.2020 23:43, Thierry Reding пишет:
> >> The difference in comparison to using voltage regulator directly is
> >> minimal, basically the core-supply phandle is replaced is replaced with
> >> a power-domain phandle in a device tree.
> > T
Increase the minor version to indicate the presence of new features.
Signed-off-by: Jonathan Marek
---
drivers/gpu/drm/msm/msm_drv.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c
index 3f17acdf6594..7230d3c0eee
Some fields that we're going to add cannot be just copied over to the
new state, and thus kmemdup is a bit unnecessary. Let's move to kzalloc
instead, and clean it up in the process.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_kms.c | 8 +---
1 file changed, 5 insertions(+), 3 d
Private objects storing a state shared across all CRTCs need to be
carefully handled to avoid a use-after-free issue.
The proper way to do this to track all the commits using that shared
state and wait for the previous commits to be done before going on with
the current one to avoid the reordering
13.11.2020 17:45, Ulf Hansson пишет:
> On Thu, 12 Nov 2020 at 23:14, Dmitry Osipenko wrote:
>>
>> 12.11.2020 23:43, Thierry Reding пишет:
The difference in comparison to using voltage regulator directly is
minimal, basically the core-supply phandle is replaced is replaced with
a pow
Hi,
Here's a conversion of vc4 to remove the hand-rolled atomic_commit helper from
vc4 in favour of the generic one.
This requires some rework of vc4, but also a new hook and some documentation
for corner-cases in the DRM core that have been reported and explained by
Daniel recently.
Let me know
Example `display-subsystem` has an incorrect compatible string.
Required properties section tells that developers should use
"fsl,imx-display-subsystem" as "compatible" string but the example
misses 'imx-' prefix.
Change example to have correct "compatible" string.
Signed-off-by: Cengiz Can
---
DP compo phy have to be enable to start link training. When
link training failed phy need to be disabled so that next
link traning can be proceed smoothly at next plug in. This
patch de-initialize mainlink to disable phy if link training
failed. This prevent system crash due to
disp_cc_mdss_dp_link
If we're having two subsequent, non-blocking, commits on two different
CRTCs that share no resources, there's no guarantee on the order of
execution of both commits.
However, the second one will consider the first one as the old state,
and will be in charge of freeing it once that second commit is
Hi,
Here's a conversion of vc4 to remove the hand-rolled atomic_commit helper from
vc4 in favour of the generic one.
This requires some rework of vc4, but also a new hook and some documentation
for corner-cases in the DRM core that have been reported and explained by
Daniel recently.
Let me know
Some dongle will not clear LINK_STATUS_UPDATED bit after
DPCD read which cause link training failed. This patch
just read 6 bytes of DPCD link status from sink and return
without checking LINK_STATUS_UPDATED bit.
Only 8 bits are used to represent link rate at sinker DPCD.
The really link rate is 2.
Add interconnect properties to the Memory Controller, External Memory
Controller and the Display Controller nodes in order to describe hardware
interconnection.
Signed-off-by: Dmitry Osipenko
---
arch/arm/boot/dts/tegra124.dtsi | 25 +
1 file changed, 25 insertions(+)
di
This patch moves ACTMON driver away from generating OPP table by itself,
transitioning it to use the table which comes from device-tree. This
change breaks compatibility with older device-trees in order to bring
support for the interconnect framework to the driver. This is a mandatory
change which
As we are using bus negotiations for selecting bus format
remove the setting of bus format using the connector info
structure.
Signed-off-by: Yuti Amonkar
---
drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c | 6 --
1 file changed, 6 deletions(-)
diff --git a/drivers/gpu/drm/bridge/caden
Now that the semaphore is gone, our atomic_commit implementation is
basically drm_atomic_helper_commit with a somewhat custom commit_tail,
the main difference being that we're using wait_for_flip_done instead of
wait_for_vblanks used in the drm_atomic_helper_commit_tail helper.
Let's switch to usi
Add modularization support to the Tegra124 EMC driver, which now can be
compiled as a loadable kernel module.
Note that EMC clock must be registered at clk-init time, otherwise PLLM
will be disabled as unused clock at boot time if EMC driver is compiled
as a module. Hence add a prepare/complete ca
On Fri, Nov 13, 2020 at 03:51:20AM +, Xiong, Jianxin wrote:
> > > +static void mlx5_ib_dmabuf_invalidate_cb(struct dma_buf_attachment
> > > +*attach) {
> > > + struct ib_umem_dmabuf *umem_dmabuf = attach->importer_priv;
> > > + struct mlx5_ib_mr *mr = umem_dmabuf->private;
> > > +
> > > + dma_
Hi CK,
On Sun, 15 Nov 2020 08:53:24 +0800
Chun-Kuang Hu wrote:
> Hi, Bilal:
>
> Please help to test this patch on your Chromebook elm, thanks.
>
> Regards,
> Chun-Kuang Hu
Just tried this patch on the Chromebook Elm, and it doesn't work. The
HDMI screen remains black, though the rest of the
13.11.2020 19:15, Mark Brown пишет:
> On Fri, Nov 13, 2020 at 06:55:27PM +0300, Dmitry Osipenko wrote:
>> 13.11.2020 17:29, Mark Brown пишет:
>
>>> It's not clear if it matters - it's more a policy decision on the part
>>> of the driver about what it thinks safe error handling is. If it's not
>
Some dongles require link training done at irq_hpd request instead
of plugin request. This patch promote irq_hpd handler to handle link
training and setup hpd_state correctly.
Changes in V2:
-- fix Fixes tag text
Fixes: fdaf9a5e3c15 ("drm/msm/dp: fixes wrong connection state caused by
failure o
Add interconnect properties to the Memory Controller, External Memory
Controller and the Display Controller nodes in order to describe hardware
interconnection.
Signed-off-by: Dmitry Osipenko
---
arch/arm/boot/dts/tegra30.dtsi | 27 ++-
1 file changed, 26 insertions(+), 1
Hi,
Here's a conversion of vc4 to remove the hand-rolled atomic_commit helper from
vc4 in favour of the generic one.
This requires some rework of vc4, but also a new hook and some documentation
for corner-cases in the DRM core that have been reported and explained by
Daniel recently.
Let me know
Looks good for me, patch is:
Reviewed-by: Qiang Yu
Regards,
Qiang
On Fri, Nov 6, 2020 at 3:05 PM Viresh Kumar wrote:
>
> The dev_pm_opp_put_*() APIs now accepts a NULL opp_table pointer and so
> there is no need for us to carry the extra check. Drop them.
>
> Signed-off-by: Viresh Kumar
> ---
Applied to drm-misc-next.
On Wed, Oct 28, 2020 at 2:44 PM Viresh Kumar wrote:
>
> dev_pm_opp_of_remove_table() doesn't report any errors when it fails to
> find the OPP table with error -ENODEV (i.e. OPP table not present for
> the device). And we can call dev_pm_opp_of_remove_table()
> unconditi
Applied to drm-misc-next.
On Fri, Nov 13, 2020 at 9:50 PM Lee Jones wrote:
>
> Fixes the following W=1 kernel build warning(s):
>
> drivers/gpu/drm/lima/lima_sched.c: In function ‘lima_sched_run_job’:
> drivers/gpu/drm/lima/lima_sched.c:227:20: warning: variable ‘ret’ set but
> not used [-Wunu
Applied to drm-misc-next.
On Sat, Sep 19, 2020 at 6:43 PM Qiang Yu wrote:
>
> Looks good for me, patch is:
> Reviewed-by: Qiang Yu
>
> Regards,
> Qiang
>
> On Sat, Sep 19, 2020 at 5:47 PM Liu Shixin wrote:
> >
> > Simplify the return expression.
> >
> > Signed-off-by: Liu Shixin
> > ---
> > d
Applied to drm-misc-next.
On Fri, Nov 13, 2020 at 9:50 PM Lee Jones wrote:
>
> Fixes the following W=1 kernel build warning(s):
>
> drivers/gpu/drm/lima/lima_drv.c:264: warning: cannot understand function
> prototype: 'const struct drm_driver lima_drm_driver = '
>
> Cc: Qiang Yu
> Cc: David Ai
Hi Stephen,
On Thu, 5 Nov 2020 18:02:50 +1100 Stephen Rothwell
wrote:
>
> Hi all,
>
> After merging the drm tree, today's linux-next build (htmldocs) produced
> this warning:
>
> Documentation/gpu/drm-kms:466: drivers/gpu/drm/drm_crtc.c:236: WARNING:
> Unexpected indentation.
> Documentation/
On Sun, Nov 15, 2020 at 11:55 PM Sam Ravnborg wrote:
> I have looked through the series - and all looks good.
> Acked-by: Sam Ravnborg
>
> Please commit patches yourself.
Thanks a lot Sam, I pushed the patches.
Yours,
Linus Walleij
___
dri-devel mail
Hi all,
On Thu, 5 Nov 2020 17:50:31 +1100 Stephen Rothwell
wrote:
>
> Hi all,
>
> After merging the drm tree, today's linux-next build (htmldocs) produced
> these warnings:
>
> include/linux/dma-buf-map.h:106: warning: Excess function parameter 'vaddr'
> description in 'DMA_BUF_MAP_INIT_VADDR
Chun-Kuang Hu 於 2020年11月3日 週二 上午8:34寫道：
>
> mtk ccorr is controlled by DRM and MDP [1]. In order to share
> mtk_ccorr driver for DRM and MDP, decouple Mediatek DRM sub driver
> which include mtk_ccorr, so MDP could use this decoupled mtk_ccorr.
Applied the whole series into mediatek-drm-next [1].
Hi, Bilal:
Bilal Wasim 於 2020年11月16日 週一 上午3:25寫道：
>
> Hi CK,
>
> On Sun, 15 Nov 2020 08:53:24 +0800
> Chun-Kuang Hu wrote:
>
> > Hi, Bilal:
> >
> > Please help to test this patch on your Chromebook elm, thanks.
> >
> > Regards,
> > Chun-Kuang Hu
>
> Just tried this patch on the Chromebook Elm, a
On Fri, 2020-11-13 at 13:48 +, Lee Jones wrote:
> This patch fixes nearly 400 warnings!
>
> These structures are too widely used in too many varying
> configurations to be split-up into different headers or moved into
> source files.
>
> Instead, we'll mark them as __maybe_unused which tells
On Mon, 16 Nov 2020 at 05:19, Karol Herbst wrote:
>
> On Sun, Nov 15, 2020 at 6:43 PM Salvatore Bonaccorso
> wrote:
> >
> > Hi,
> >
> > On Fri, Aug 28, 2020 at 11:28:46AM +0200, Frantisek Hrbata wrote:
> > > Unprivileged user can crash kernel by using
> > > DRM_IOCTL_NOUVEAU_CHANNEL_ALLOC
> > >
Hi Linus,
On Wed, Nov 11, 2020 at 12:46:48AM +0100, Linus Walleij wrote:
> These improvements to the Samsung s6e63m0 makes SPI
> writing and reading to the panel simpler, and add some
> support required by the Samsung GT-I9070.
>
> Tested and working fine on the Samsung GT-I9070 mobile
> phone wit
On Sun, Nov 15, 2020 at 12:41 PM Dave Airlie wrote:
>
> As mentioned I did have a fixes pull from Ben from after I'd sent you
> out stuff, it contains the fix for the regression reported in the rc1
> thread along with two others.
Thanks, pulled,
Linus
___
The pull request you sent on Mon, 16 Nov 2020 06:41:34 +1000:
> git://anongit.freedesktop.org/drm/drm tags/drm-fixes-2020-11-16
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/a6af8718b98e1cd37a9ea9a02269c79577fc9138
Thank you!
--
Deet-doot-dot, I am a bot.
https://k
Hi Linus,
As mentioned I did have a fixes pull from Ben from after I'd sent you
out stuff, it contains the fix for the regression reported in the rc1
thread along with two others.
Dave.
drm-fixes-2020-11-16:
drm nouveau fixes for 5.10-rc4
nouveau:
- atomic modesetting regression fix
- ttm pre-n
On Mon, 16 Nov 2020 at 03:57, Linus Torvalds
wrote:
>
> On Tue, Nov 3, 2020 at 2:20 PM Kirill A. Shutemov
> wrote:
> >
> > On Thu, Oct 15, 2020 at 11:33:08AM +1000, Dave Airlie wrote:
> > > drm/nouveau/kms: Search for encoders' connectors properly
> >
> > This commit (09838c4efe9a) broke b
On Sun, Nov 15, 2020 at 6:43 PM Salvatore Bonaccorso wrote:
>
> Hi,
>
> On Fri, Aug 28, 2020 at 11:28:46AM +0200, Frantisek Hrbata wrote:
> > Unprivileged user can crash kernel by using DRM_IOCTL_NOUVEAU_CHANNEL_ALLOC
> > ioctl. This was reported by trinity[1] fuzzer.
> >
> > [ 71.073906] nouvea
On Sun, Nov 15, 2020 at 8:08 PM Sam Ravnborg wrote:
>
> Hi Patrik,
> On Sun, Nov 15, 2020 at 07:51:27PM +0100, Patrik Jakobsson wrote:
> > On Sun, Nov 15, 2020 at 7:32 PM Sam Ravnborg wrote:
> > >
> > > Hi Patrik.
> > > On Sun, Nov 15, 2020 at 06:54:20PM +0100, Patrik Jakobsson wrote:
> > > > 2D
Hi Linus,
On Sun, Nov 15, 2020 at 07:51:45PM +0100, Linus Walleij wrote:
> This moves the MCDE bindings over to using the YAML schema
> to describe the ST-Ericsson MCDE display controller,
> making use of the generic DSI controller schema.
>
> In the process we correct an error in the old text bin
Hi Patrik,
On Sun, Nov 15, 2020 at 07:51:27PM +0100, Patrik Jakobsson wrote:
> On Sun, Nov 15, 2020 at 7:32 PM Sam Ravnborg wrote:
> >
> > Hi Patrik.
> > On Sun, Nov 15, 2020 at 06:54:20PM +0100, Patrik Jakobsson wrote:
> > > 2D acceleration is only available on PSB and MRST and very slow on both
Hi
Am 15.11.20 um 18:55 schrieb Deepak Rawat:
> On Sun, 2020-11-15 at 10:14 +0100, Thomas Zimmermann wrote:
>> Hi Deepak
>>
>> Am 11.09.20 um 02:38 schrieb Deepak Rawat:
>>> On Thu, 2020-09-10 at 08:19 +, Tang, Shaofeng wrote:
Hi Deepak,
Do you have a new version of this patch
Hi
Am 15.11.20 um 18:54 schrieb Patrik Jakobsson:
> 2D acceleration is only available on PSB and MRST and very slow on both
> platforms. CPU acceleration is faster so don't bother with 2D accel
> anymore.
>
> Signed-off-by: Patrik Jakobsson
> ---
> drivers/gpu/drm/gma500/accel_2d.c| 292
This moves the MCDE bindings over to using the YAML schema
to describe the ST-Ericsson MCDE display controller,
making use of the generic DSI controller schema.
In the process we correct an error in the old text bindings:
the clocks for the SDI host controllers were specified as
part of the main M
On Sun, Nov 15, 2020 at 7:32 PM Sam Ravnborg wrote:
>
> Hi Patrik.
> On Sun, Nov 15, 2020 at 06:54:20PM +0100, Patrik Jakobsson wrote:
> > 2D acceleration is only available on PSB and MRST and very slow on both
> > platforms. CPU acceleration is faster so don't bother with 2D accel
> > anymore.
>
On Sun, Nov 15, 2020 at 03:39:07PM +, Simon Ser wrote:
> crtc can be NULL. connector, extracted from conn_state, can't.
>
> Fixes: e3aae683e861 ("drm: convert drm_atomic_uapi.c to new debug helpers")
> Signed-off-by: Simon Ser
> Cc: Chris Wilson
> Cc: Daniel Vetter
> Cc: Sam Ravnborg
Revi
Hi Patrik.
On Sun, Nov 15, 2020 at 06:54:20PM +0100, Patrik Jakobsson wrote:
> 2D acceleration is only available on PSB and MRST and very slow on both
> platforms. CPU acceleration is faster so don't bother with 2D accel
> anymore.
>
> Signed-off-by: Patrik Jakobsson
I like the patch and it foll
On Tue, Nov 3, 2020 at 2:20 PM Kirill A. Shutemov wrote:
>
> On Thu, Oct 15, 2020 at 11:33:08AM +1000, Dave Airlie wrote:
> > drm/nouveau/kms: Search for encoders' connectors properly
>
> This commit (09838c4efe9a) broke boot for me. These two hunks in
> particular:
Christ. It's been two we
On Sun, 2020-11-15 at 10:14 +0100, Thomas Zimmermann wrote:
> Hi Deepak
>
> Am 11.09.20 um 02:38 schrieb Deepak Rawat:
> > On Thu, 2020-09-10 at 08:19 +, Tang, Shaofeng wrote:
> > > Hi Deepak,
> > >
> > > Do you have a new version of this patch now?
> > > I take a try with it. and meet some
2D acceleration is only available on PSB and MRST and very slow on both
platforms. CPU acceleration is faster so don't bother with 2D accel
anymore.
Signed-off-by: Patrik Jakobsson
---
drivers/gpu/drm/gma500/accel_2d.c| 292 ---
drivers/gpu/drm/gma500/cdv_device.c
Reviewed-by: Bas Nieuwenhuizen
On Sun, Nov 15, 2020 at 10:39 AM Simon Ser wrote:
>
> This field doesn't alias with BANK_XOR_BITS: PACKERS is bits 26:28 while
> BANK_XOR_BITS is bits 23:25.
>
> Fixes: 8ba16d599374 ("drm/fourcc: Add AMD DRM modifiers.")
> Signed-off-by: Simon Ser
> Cc: Bas Nieuwe
crtc can be NULL. connector, extracted from conn_state, can't.
Fixes: e3aae683e861 ("drm: convert drm_atomic_uapi.c to new debug helpers")
Signed-off-by: Simon Ser
Cc: Chris Wilson
Cc: Daniel Vetter
Cc: Sam Ravnborg
---
drivers/gpu/drm/drm_atomic_uapi.c | 4 ++--
1 file changed, 2 insertions(
Total wipeout in boot!
<7>[3.739908] i915 :00:02.0:
[drm:__drm_fb_helper_initial_config_and_unlock] test CRTC 0 primary plane
<7>[3.739916] i915 :00:02.0:
[drm:__drm_fb_helper_initial_config_and_unlock] test CRTC 1 primary plane
9] Hardware name: Hewlett-Packard HP Pro 3500 Serie
This field doesn't alias with BANK_XOR_BITS: PACKERS is bits 26:28 while
BANK_XOR_BITS is bits 23:25.
Fixes: 8ba16d599374 ("drm/fourcc: Add AMD DRM modifiers.")
Signed-off-by: Simon Ser
Cc: Bas Nieuwenhuizen
Cc: Alex Deucher
Cc: Daniel Vetter
---
include/uapi/drm/drm_fourcc.h | 2 +-
1 file c
Hi Deepak
Am 11.09.20 um 02:38 schrieb Deepak Rawat:
> On Thu, 2020-09-10 at 08:19 +, Tang, Shaofeng wrote:
>> Hi Deepak,
>>
>> Do you have a new version of this patch now?
>> I take a try with it. and meet some typo and “incompatible pointer”
>> error.
>> If you have a new version, could yo
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