Hi Dave & Daniel -
Pretty quiet still, but here's some cc: stable fixes.
(Well, one doesn't have the explicit stable tag, but the Fixes tag
points at a commit in v3.9...)
drm-intel-fixes-2021-01-07:
drm/i915 fixes for v5.11-rc3:
- Use per-connector PM QoS tracking for DP aux communication
- Gu
On Thu, Jan 7, 2021 at 10:16 AM Icenowy Zheng wrote:
>
>
>
> 于 2021年1月6日 GMT+08:00 下午5:47:20, Jagan Teki 写到:
> >On Sat, Nov 28, 2020 at 6:23 PM Icenowy Zheng wrote:
> >>
> >> Attaching the panel can fail, so cleanup work is necessary, otherwise
> >> a pointer to freed struct drm_panel* will rema
On Mon, Dec 07, 2020 at 03:09:31PM +0100, Oleksij Rempel wrote:
> changes v7:
> - panel-simple.yaml: fix comments and part order
> - panel-simple.yaml: invent a product description for the Kyocera tcg070wvlq
> panel
>
> changes v6:
> - do more panel-simple.yaml related cleanups
>
> changes v5:
>
From: Philip Yang
If xnack is on, VM retry fault interrupt send to IH ring1, and ring1
will be full quickly. IH cannot receive other interrupts, this causes
deadlock if migrating buffer using sdma and waiting for sdma done while
handling retry fault.
Remove VMC from IH storm client, enable ring1
From: Philip Yang
With xnack on, GPU vm fault handler decide the best restore location,
then migrate range to the best restore location and update GPU mapping
to recover the GPU vm fault.
Signed-off-by: Philip Yang
Signed-off-by: Alex Sierra
Signed-off-by: Felix Kuehling
---
drivers/gpu/drm/
From: Philip Yang
With xnack on, add validate timestamp in order to handle GPU vm fault
from multiple GPUs.
If GPU retry fault need migrate the range to the best restore location,
use range validate timestamp to record system timestamp after range is
restored to update GPU page table.
Because m
From: Philip Yang
If prefetch range to gpu with acutal location is another gpu, or GPU
retry fault restore pages to migrate the range with acutal location is
gpu, then migrate from one gpu to another gpu.
Use system memory as bridge because sdma engine may not able to access
another gpu vram, us
From: Philip Yang
Forgot to reserve a fence slot to use sdma to update page table, cause
below kernel BUG backtrace to handle vm retry fault while application is
exiting.
[ 133.048143] kernel BUG at
/home/yangp/git/compute_staging/kernel/drivers/dma-buf/dma-resv.c:281!
[ 133.048487] Workqueue
From: Alex Sierra
Add to amdgpu_amdkfd_fence.enable_signal callback, support
for svm_bo fence eviction.
Signed-off-by: Alex Sierra
Signed-off-by: Felix Kuehling
---
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_fence.c | 11 ---
1 file changed, 8 insertions(+), 3 deletions(-)
diff --git a
From: Alex Sierra
[why]
To support svm bo eviction mechanism.
[how]
If the BO crated has AMDGPU_AMDKFD_CREATE_SVM_BO flag set,
enable_signal callback will be called inside amdgpu_evict_flags.
This also causes gutting of the BO by removing all placements,
so that TTM won't actually do an eviction
From: Alex Sierra
Page table restore implementation in SVM API. This is called from
the fault handler at amdgpu_vm. To update page tables through
the page fault retry IH.
Signed-off-by: Alex Sierra
Signed-off-by: Philip Yang
Signed-off-by: Felix Kuehling
---
drivers/gpu/drm/amd/amdkfd/kfd_sv
From: Alex Sierra
Use SVM API to restore page tables when retry fault and
compute context are enabled.
Signed-off-by: Alex Sierra
Signed-off-by: Felix Kuehling
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 20 +++-
1 file changed, 15 insertions(+), 5 deletions(-)
diff --git a/
From: Philip Yang
If CPU page fault happens, HMM pgmap_ops callback migrate_to_ram start
migrate memory from vram to ram in steps:
1. migrate_vma_pages get vram pages, and notify HMM to invalidate the
pages, HMM interval notifier callback evict process queues
2. Allocate system memory pages
3. U
From: Alex Sierra
Add CREATE_SVM_BO define bit for SVM BOs.
Another define flag was moved to concentrate these
KFD type flags in one include file.
Signed-off-by: Alex Sierra
Signed-off-by: Felix Kuehling
---
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c | 7 ++-
drivers/gpu/drm/amd/amd
From: Alex Sierra
[why]
As part of the SVM functionality, the eviction mechanism used for
SVM_BOs is different. This mechanism uses one eviction fence per prange,
instead of one fence per kfd_process.
[how]
A svm_bo reference to amdgpu_amdkfd_fence to allow differentiate between
SVM_BO or regula
From: Alex Sierra
GPU page tables are invalidated by unmapping prange directly at
the mmu notifier, when page fault retry is enabled through
amdgpu_noretry global parameter. The restore page table is
performed at the page fault handler.
If xnack is on, we need update GPU mapping after prefetch m
From: Philip Yang
Register svm range with same address and size but perferred_location
is changed from CPU to GPU or from GPU to CPU, trigger migration the svm
range from ram to vram or from vram to ram.
If svm range prefetch location is GPU with flags
KFD_IOCTL_SVM_FLAG_HOST_ACCESS, validate th
From: Alex Sierra
svm_bo eviction mechanism is different from regular BOs.
Every SVM_BO created contains one eviction fence and one
worker item for eviction process.
SVM_BOs can be attached to one or more pranges.
For SVM_BO eviction mechanism, TTM will start to call
enable_signal callback for ev
From: Alex Sierra
Xnack retries are used for page fault recovery. Some AMD chip
families support continuously retry while page table entries are invalid.
The driver must handle the page fault interrupt and fill in a valid entry
for the GPU to continue.
This ioctl allows to enable/disable XNACK r
From: Philip Yang
If svm range perfetch location is not zero, use TTM to alloc
amdgpu_bo vram nodes to validate svm range, then map vram nodes to GPUs.
Use offset to sub allocate from the same amdgpu_bo to handle overlap
vram range while adding new range or unmapping range.
svm_bo has ref count
From: Philip Yang
HMM interval notifier callback notify CPU page table will be updated,
stop process queues if the updated address belongs to svm range
registered in process svms objects tree. Scheduled restore work to
update GPU page table using new pages address in the updated svm range.
svm r
From: Philip Yang
Use amdgpu_vm_bo_update_mapping to update GPU page table to map or unmap
svm range system memory pages address to GPUs.
Signed-off-by: Philip Yang
Signed-off-by: Alex Sierra
Signed-off-by: Felix Kuehling
---
drivers/gpu/drm/amd/amdkfd/kfd_svm.c | 232 +++
From: Philip Yang
Use sdma linear copy to migrate data between ram and vram. The sdma
linear copy command uses kernel buffer function queue to access system
memory through gart table.
Use reserved gart table window 0 to map system page address, and vram
page address is direct mapping. Use the sa
From: Philip Yang
amdgpu_gmc_get_vm_pte use bo_va->is_xgmi same hive information to set
pte flags to update GPU mapping. Add local structure variable bo_va, and
update bo_va.is_xgmi, pass it to mapping->bo_va while mapping to GPU.
Assuming xgmi pstate is hi after boot.
Signed-off-by: Philip Yan
From: Philip Yang
Register vram memory as MEMORY_DEVICE_PRIVATE type resource, to
allocate vram backing pages for page migration.
Signed-off-by: Philip Yang
Signed-off-by: Felix Kuehling
---
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c | 3 +
drivers/gpu/drm/amd/amdkfd/Makefile| 3 +
From: Alex Sierra
This flag is useful at cpu invalidation page table
decision. Between select queue eviction or page fault.
Signed-off-by: Alex Sierra
Signed-off-by: Felix Kuehling
---
drivers/gpu/drm/amd/amdkfd/kfd_priv.h| 4 +++
drivers/gpu/drm/amd/amdkfd/kfd_process.c | 36 +++
From: Philip Yang
It will be used by kfd to map svm range to GPU, because svm range does
not have amdgpu_bo and bo_va, cannot use amdgpu_bo_update interface, use
amdgpu vm update interface directly.
Signed-off-by: Philip Yang
Signed-off-by: Felix Kuehling
---
drivers/gpu/drm/amd/amdgpu/amdgpu
From: Philip Yang
Get the intersection of attributes over all memory in the given
range
Signed-off-by: Philip Yang
Signed-off-by: Alex Sierra
Signed-off-by: Felix Kuehling
---
drivers/gpu/drm/amd/amdkfd/kfd_svm.c | 175 ++-
1 file changed, 173 insertions(+), 2 deletio
From: Philip Yang
No overlap range interval [start, last] exist in svms object interval
tree. If process registers new range which has overlap with old range,
the old range split into 2 ranges depending on the overlap happens at
head or tail part of old range.
Signed-off-by: Philip Yang
Signed-
From: Philip Yang
When application explicitly call unmap or unmap from mmput when
application exit, driver will receive MMU_NOTIFY_UNMAP event to remove
svm range from process svms object tree and list first, unmap from GPUs
(in the following patch).
Split the svm ranges to handle unmap partial
From: Philip Yang
Use HMM to get system memory pages address, which will be used to
map to GPUs or migrate to vram.
Signed-off-by: Philip Yang
Signed-off-by: Felix Kuehling
---
drivers/gpu/drm/amd/amdkfd/kfd_priv.h | 1 +
drivers/gpu/drm/amd/amdkfd/kfd_svm.c | 88 +++
From: Philip Yang
svm range structure stores the range start address, size, attributes,
flags, prefetch location and gpu bitmap which indicates which GPU this
range maps to. Same virtual address is shared by CPU and GPUs.
Process has svm range list which uses both interval tree and list to
store
From: Philip Yang
Move the HMM get pages function from amdgpu_ttm and to amdgpu_mn. This
common function will be used by new svm APIs.
Signed-off-by: Philip Yang
Signed-off-by: Felix Kuehling
---
drivers/gpu/drm/amd/amdgpu/amdgpu_mn.c | 83 +
drivers/gpu/drm/amd/amdgp
From: Alex Sierra
svm range uses gpu bitmap to store which GPU svm range maps to.
Application pass driver gpu id to specify GPU, the helper is needed to
convert gpu id to gpu bitmap idx.
Access through kfd_process_device pointers array from kfd_process.
Signed-off-by: Alex Sierra
Signed-off-by
From: Philip Yang
SVMAPISupported property added to HSA_CAPABILITY, the value match
HSA_CAPABILITY defined in Thunk spec:
SVMAPISupported: it will not be supported on older kernels that don't
have HMM or on GFXv8 or older GPUs without support for 48-bit virtual
addresses.
CoherentHostAccess pro
From: Philip Yang
Add svm (shared virtual memory) ioctl data structure and API definition.
The svm ioctl API is designed to be extensible in the future. All
operations are provided by a single IOCTL to preserve ioctl number
space. The arguments structure ends with a variable size array of
attrib
From: Philip Yang
DEVICE_PRIVATE kernel config option is required for HMM page migration,
to register vram (GPU device memory) as DEVICE_PRIVATE zone memory.
Enabling this option recompiles kernel.
Signed-off-by: Philip Yang
Signed-off-by: Felix Kuehling
---
drivers/gpu/drm/amd/amdkfd/Kconfig
From: Alex Sierra
Remove per_device_list from kfd_process and replace it with a
kfd_process_device pointers array of MAX_GPU_INSTANCES size. This helps
to manage the kfd_process_devices binded to a specific kfd_process.
Also, functions used by kfd_chardev to iterate over the list were
removed, si
This is the first version of our HMM based shared virtual memory manager
for KFD. There are still a number of known issues that we're working through
(see below). This will likely lead to some pretty significant changes in
MMU notifier handling and locking on the migration code paths. So don't
get
https://bugzilla.kernel.org/show_bug.cgi?id=210321
Tyler Kropp (kernel-b...@tylerkropp.xyz) changed:
What|Removed |Added
CC||kernel-b...@tyl
https://bugzilla.kernel.org/show_bug.cgi?id=211033
--- Comment #9 from Artur Bac (arturbac...@gmail.com) ---
I can confirm this regression with
AMD Radeon RX 5700 XT (NAVI10, DRM 3.40.0, 5.10.3, LLVM 11.0.0)
I have display only on one monitor of 2 connected with 5.10.4 and 5.10.5
--
You may rep
https://bugzilla.kernel.org/show_bug.cgi?id=211033
Artur Bac (arturbac...@gmail.com) changed:
What|Removed |Added
CC||arturbac...@gmail.com
https://bugzilla.kernel.org/show_bug.cgi?id=211065
Artur Bac (arturbac...@gmail.com) changed:
What|Removed |Added
Status|NEW |RESOLVED
Reso
From: CK Hu
mtk mutex is used by DRM and MDP driver, and its function is SoC-specific,
so move it to soc folder.
Signed-off-by: CK Hu
Signed-off-by: Chun-Kuang Hu
---
drivers/gpu/drm/mediatek/Makefile | 3 +--
drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 2 +-
drivers
From: CK Hu
Moving mutex resource management from client driver to mutex driver
could prevent client drivers negotiating for resource management.
Signed-off-by: CK Hu
Signed-off-by: Chun-Kuang Hu
---
drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 2 +-
drivers/gpu/drm/mediatek/mtk_mutex.c| 1
From: CK Hu
mtk mutex is used by both drm and mdp driver, so change disp/ddp term to
mutex to show that it's a common driver for drm and mdp.
Signed-off-by: CK Hu
Signed-off-by: Chun-Kuang Hu
---
drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 30 +--
drivers/gpu/drm/mediatek/mtk_drm_drv.c | 2
From: CK Hu
After mmsys routing function is moved out of mtk_drm_ddp.c, mtk_drm_ddp.c
has only mtk mutex function, so rename it to match the function in it.
Signed-off-by: CK Hu
Signed-off-by: Chun-Kuang Hu
---
drivers/gpu/drm/mediatek/Makefile | 4 ++--
drivers/gpu/drm/
From: CK Hu
Those file includings are useless, so remove them.
Signed-off-by: CK Hu
Signed-off-by: Chun-Kuang Hu
---
drivers/gpu/drm/mediatek/mtk_drm_ddp.h | 2 --
drivers/gpu/drm/mediatek/mtk_drm_drv.c | 2 --
2 files changed, 4 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp
mtk mutex is a driver used by DRM and MDP [1], so this series move
mtk mutex driver from DRM folder to soc folder, so it could be used
by DRM and MDP.
Changes in v2:
1. Rebase onto mediatek-drm-next [2].
2. Export symbol for mtk-mutex API.
[1] https://patchwork.kernel.org/patch/11140751/
[2]
htt
From: Sean Paul
The HDCP 1.4 spec does not require the QUERY_STREAM_ENCRYPTION_STATUS
check, it was always a nice-to-have. After deploying this across various
devices, we've determined that some MST bridge chips do not properly
support this call for HDCP 1.4 (namely Synaptics and Realtek).
I had
https://bugzilla.kernel.org/show_bug.cgi?id=211065
Alex Deucher (alexdeuc...@gmail.com) changed:
What|Removed |Added
CC||alexdeuc...@gmail.c
Hi Dave, Daniel,
New URL. FDO ran out of disk space, so I'm attempting to move to gitlab.
Let me know if you run into any issues.
Thanks
The following changes since commit 5b2fc08c455bbf749489254a81baeffdf4c0a693:
Merge tag 'amd-drm-fixes-5.11-2020-12-23' of
git://people.freedesktop.org/~ag
https://bugzilla.kernel.org/show_bug.cgi?id=211065
Artur Bac (arturbac...@gmail.com) changed:
What|Removed |Added
CC||arturbac...@gmail.com
https://bugzilla.kernel.org/show_bug.cgi?id=211065
Bug ID: 211065
Summary: drm:dm_restore_drm_connector_state [amdgpu] *ERROR*
Restoring old state failed with -12
Product: Drivers
Version: 2.5
Kernel Version: 5.10.4, 5.10.5
https://bugzilla.kernel.org/show_bug.cgi?id=210201
Artur Bac (arturbac...@gmail.com) changed:
What|Removed |Added
Status|NEW |RESOLVED
Reso
On Mon, 2021-01-04 at 12:34 +0100, Christian König wrote:
> Hi Maxim,
>
> I can't help with the display related stuff. Probably best approach to get
> this fixes would be to open up a bug tracker for this on FDO.
Done, bugs are opened
https://gitlab.freedesktop.org/drm/amd/-/issues/1429
https://
On Mon, 2021-01-04 at 09:45 -0700, Alex Williamson wrote:
> On Mon, 4 Jan 2021 12:34:34 +0100
> Christian König wrote:
>
> > Hi Maxim,
> >
> > I can't help with the display related stuff. Probably best approach to
> > get this fixes would be to open up a bug tracker for this on FDO.
> >
> > Bu
On 2021-01-04 4:08 p.m., Aurabindo Pillai wrote:
[Why&How]
Inorder to enable freesync video mode, driver adds extra
modes based on preferred modes for common freesync frame rates.
When commiting these mode changes, a full modeset is not needed.
If the change in only in the front porch timing valu
It turned out(Maxime suggestion) that bit 26 of SUN4I_TCON0_IO_POL_REG is
dedicated to invert DCLK polarity and this makes thing really easier than
before. So let's handle DCLK polarity by adding
SUN4I_TCON0_IO_POL_DCLK_POSITIVE as bit 26 and activating according to
bus_flags the same way is done f
First patch is a tested by me fix, while the second need testing to
understand if it works correctly with any sunxi SoC with DE peripheral.
Already tested SoCs are:
- A20
- A33
Need testing:
- A10
- A10s
- A13
Giulio Benetti (2):
drm/sun4i: tcon: fix inverted DCLK polarity
drm/sun4i: tcon: im
During commit "88bc4178568b8e0331143cc0616640ab72f0cba1" DRM_BUS_FLAG_*
macros have been changed to avoid ambiguity but just because of this
ambiguity previous DRM_BUS_FLAG_PIXDATA_(POS/NEG)EDGE were used meaning
_SAMPLE_ not _DRIVE_. This lead to DLCK inversion, so let's swap DCLK
phase to fix it.
On 01/05, Sumera Priyadarsini wrote:
> Currently, data for the device instance is held by vkms_device.
> Add a separate type, vkms_config to contain configuration details
> for the device and various modes to be later used by configfs.
> This config data stays constant once the device is created.
>
https://bugzilla.kernel.org/show_bug.cgi?id=207383
--- Comment #120 from Duncan (1i5t5.dun...@cox.net) ---
On Wed, 06 Jan 2021 12:05:17 +
bugzilla-dae...@bugzilla.kernel.org wrote:
> https://bugzilla.kernel.org/show_bug.cgi?id=207383
>
> --- Comment #119 from Duncan (1i5t5.dun...@cox.net) --
https://bugzilla.kernel.org/show_bug.cgi?id=211033
Andre Tomt (an...@tomt.net) changed:
What|Removed |Added
CC||an...@tomt.net
--- Comment
The i.MX6 HDMI driver uses of_drm_find_bridge() and thus cannot be built
with CONFIG_OF disabled:
ld: drivers/gpu/drm/imx/dw_hdmi-imx.o: in function `dw_hdmi_imx_probe':
dw_hdmi-imx.c:(.text+0x29f): undefined reference to `of_drm_find_bridge'
Reported-by: Randy Dunlap
Fixes: c805ec7eb210
On Wed, Jan 6, 2021 at 7:17 AM Laurent Pinchart
wrote:
>
> Hi Philipp,
>
> On Wed, Jan 06, 2021 at 03:10:32PM +0100, Philipp Zabel wrote:
> > On Tue, 2021-01-05 at 13:50 +0200, Laurent Pinchart wrote:
> > > On Tue, Jan 05, 2021 at 10:32:01AM +0100, Philipp Zabel wrote:
> > > > On Tue, 2021-01-05 a
https://bugzilla.kernel.org/show_bug.cgi?id=211033
Shlomo (shl...@fastmail.com) changed:
What|Removed |Added
CC||shl...@fastmail.com
--- Co
On Wed, Jan 6, 2021 at 11:54 AM David Woodhouse wrote:
>
> On Tue, 2021-01-05 at 16:40 +0100, Christian König wrote:
> > Am 05.01.21 um 13:20 schrieb Huang Rui:
> > > On Tue, Jan 05, 2021 at 07:43:51PM +0800, Borislav Petkov wrote:
> > > > On Tue, Jan 05, 2021 at 07:08:52PM +0800, Huang Rui wrote:
On Tue, 2021-01-05 at 16:40 +0100, Christian König wrote:
> Am 05.01.21 um 13:20 schrieb Huang Rui:
> > On Tue, Jan 05, 2021 at 07:43:51PM +0800, Borislav Petkov wrote:
> > > On Tue, Jan 05, 2021 at 07:08:52PM +0800, Huang Rui wrote:
> > > > Ah, this asic is a bit old and still use radeon driver. S
Hi, Yongqiang:
Yongqiang Niu 於 2021年1月5日 週二 上午11:17寫道:
>
> add mt8192 mmsys support
>
> Signed-off-by: Yongqiang Niu
> ---
> drivers/soc/mediatek/mmsys/Makefile | 1 +
> drivers/soc/mediatek/mmsys/mt8192-mmsys.c | 149
> ++
> drivers/soc/mediatek/mmsys/mtk-m
Hi Rob,
Given that the maintainers property is mandatory in the schema, what's
the procedure when no maintainer steps up for a converter YAML binding ?
On Tue, Jan 05, 2021 at 08:08:16AM +0200, Laurent Pinchart wrote:
> Convert the Rockchip HDMI TX text binding to YAML.
>
> Signed-off-by: Lauren
[AMD Official Use Only - Internal Distribution Only]
> -Original Message-
> From: Liu, Zhan
> Sent: 2021/January/04, Monday 3:46 PM
> To: Bas Nieuwenhuizen ; Mario Kleiner
>
> Cc: dri-devel ; amd-gfx list g...@lists.freedesktop.org>; Deucher, Alexander
> ; Daniel Vetter ;
> Kazlauskas,
Hi Philipp,
On Wed, Jan 06, 2021 at 03:10:32PM +0100, Philipp Zabel wrote:
> On Tue, 2021-01-05 at 13:50 +0200, Laurent Pinchart wrote:
> > On Tue, Jan 05, 2021 at 10:32:01AM +0100, Philipp Zabel wrote:
> > > On Tue, 2021-01-05 at 07:49 +0200, Laurent Pinchart wrote:
> > > > On Mon, Jan 04, 2021 a
Hi Laurent,
On Tue, 2021-01-05 at 13:50 +0200, Laurent Pinchart wrote:
> Hi Philipp,
>
> On Tue, Jan 05, 2021 at 10:32:01AM +0100, Philipp Zabel wrote:
> > On Tue, 2021-01-05 at 07:49 +0200, Laurent Pinchart wrote:
> > > On Mon, Jan 04, 2021 at 04:30:36PM +0100, Philipp Zabel wrote:
> > > > On Su
Hi Zheng,
On Wed, Jan 6, 2021 at 2:23 PM Zheng Yongjun wrote:
> Use resource_size rather than a verbose computation on
> the end and start fields.
>
> Signed-off-by: Zheng Yongjun
Thanks for your patch!
But the one-line summary and patch description don't seem to match
with the actual change?
https://bugzilla.kernel.org/show_bug.cgi?id=211043
Daniel (kdeb...@staznosti.sk) changed:
What|Removed |Added
Attachment #294529|mesg output complete|dmesg output complete
https://bugzilla.kernel.org/show_bug.cgi?id=211043
--- Comment #4 from Daniel (kdeb...@staznosti.sk) ---
Actually, this happens with other mice as well (e.g. not a bluetooth one, but a
USB dongle one, so the BT autosuspend is not related)
--
You may reply to this email to add a comment.
You are
https://bugzilla.kernel.org/show_bug.cgi?id=211043
--- Comment #3 from Daniel (kdeb...@staznosti.sk) ---
Created attachment 294529
--> https://bugzilla.kernel.org/attachment.cgi?id=294529&action=edit
mesg output complete
--
You may reply to this email to add a comment.
You are receiving this
On 1/5/21 5:27 PM, Mathieu Poirier wrote:
> Adding Suman and Paul - guys please have a look.
>
> On Mon, Jan 04, 2021 at 04:02:53PM -0700, Rob Herring wrote:
>> DT properties which can have multiple entries need to specify what the
>> entries are and define how many entries there can be. In the ca
Hello,
syzbot found the following issue on:
HEAD commit:6207214a Merge tag 'afs-fixes-04012021' of git://git.kerne..
git tree: upstream
console output: https://syzkaller.appspot.com/x/log.txt?x=17d0c7a8d0
kernel config: https://syzkaller.appspot.com/x/.config?x=104b0cac547b2149
das
On Mon, Jan 04, 2021 at 11:36:38PM -0800, Isaac J. Manjarres wrote:
> The goal of the Generic Kernel Image (GKI) effort is to have a common
> kernel image that works across multiple Android devices. This involves
> generating a kernel image that has core features integrated into it,
> while SoC spe
https://bugzilla.kernel.org/show_bug.cgi?id=207383
--- Comment #119 from Duncan (1i5t5.dun...@cox.net) ---
(In reply to Christopher Snowhill from comment #118)
> Now experiencing this attempting to run Luxmark with literally any OpenCL
> runtime on my RX 480, be it ROCm, Clover, or AMDGPU Pro 20.4
drm-misc-next-2021-01-06:
drm-misc-next for v5.12:
Core Changes:
- Lots of drm documentation updates by Simor Ser.
- Require that each crtc has a unique primary plane.
- Add fixme that fbdev_generic_setup is confusing.
Driver Changes:
- Update addresses for TI display drivers maintainers.
- Make
On Sat, Nov 28, 2020 at 6:23 PM Icenowy Zheng wrote:
>
> Attaching the panel can fail, so cleanup work is necessary, otherwise
> a pointer to freed struct drm_panel* will remain in drm_panel code.
>
> Do the cleanup if panel attaching failed.
>
> Fixes: 69dc678abc2b ("drm/panel: Add Feiyang FY0702
Adds dsi host controller support for the Unisoc's display subsystem.
Adds dsi phy support for the Unisoc's display subsystem.
Only MIPI DSI Displays supported, DP/TV/HMDI will be support
in the feature.
v1:
- Remove dphy and dsi graph binding, merge the dphy driver into the dsi.
v2:
- Use drm
Adding Suman and Paul - guys please have a look.
On Mon, Jan 04, 2021 at 04:02:53PM -0700, Rob Herring wrote:
> DT properties which can have multiple entries need to specify what the
> entries are and define how many entries there can be. In the case of
> only a single entry, just 'maxItems: 1' is
Add devicetree schema for Arm Mali Valhall GPU
Define a compatible string for the Mali Valhall GPU
for Mediatek's SoC platform.
Signed-off-by: Nick Fan
---
.../bindings/gpu/arm,mali-valhall.yaml| 252 ++
1 file changed, 252 insertions(+)
create mode 100644 Documentation
ChangeList:
RFC v1:
1. only upstream modeset and atomic at first commit.
2. remove some unused code;
3. use alpha and blend_mode properties;
3. add yaml support;
4. remove auto-adaptive panel driver;
5. bugfix
RFC v2:
1. add sprd crtc and plane module for KMS, preparing for multi crtc&encoder
2.
Add a basic GPU node for mt8192.
Signed-off-by: Nick Fan
---
This patch depends on Mediatek power and regulator support.
Listed as following.
[1]https://lore.kernel.org/patchwork/patch/1336293/
[2]https://patchwork.kernel.org/project/linux-mediatek/list/?series=374013
[3]https://lore.kernel.org
Similar to commit ("drm/amdgpu: fix IH overflow on Vega10 v2").
When an ring buffer overflow happens the appropriate bit is set in the WPTR
register which is also written back to memory. But clearing the bit in the
WPTR doesn't trigger another memory writeback.
So what can happen is that we end up
On 1/5/21 4:39 AM, Benjamin Gaignard wrote:
> Fix the warnings reported in functions documentation when compiling with W=1
>
> Signed-off-by: Benjamin Gaignard
> ---
> drivers/gpu/drm/drm_agpsupport.c | 111 ---
> 1 file changed, 59 insertions(+), 52 deletions(-)
>
On Mon, Jan 04, 2021 at 04:02:53PM -0700, Rob Herring wrote:
> .../input/touchscreen/elan,elants_i2c.yaml| 1 +
Acked-by: Dmitry Torokhov
--
Dmitry
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On Tue, Jan 5, 2021 at 12:03 AM Rob Herring wrote:
>
> DT properties which can have multiple entries need to specify what the
> entries are and define how many entries there can be. In the case of
> only a single entry, just 'maxItems: 1' is sufficient.
>
> Add the missing entry constraints. These
Hi Neil,
On Mon, Jan 4, 2021 at 2:29 PM Neil Armstrong wrote:
>
> Hi,
>
> Sorry for the delay...
>
> On 31/12/2020 00:24, Martin Blumenstingl wrote:
> > Hi Neil and all interested people,
> >
> > in the past there were concerns about how some of the components are
> > coupled in our Meson DRM dri
Hi,
Le mar. 5 janv. 2021 à 16:27, Mathieu Poirier
a écrit :
Adding Suman and Paul - guys please have a look.
On Mon, Jan 04, 2021 at 04:02:53PM -0700, Rob Herring wrote:
DT properties which can have multiple entries need to specify what
the
entries are and define how many entries there ca
Adds drm support for the Unisoc's display subsystem.
This is drm kms driver, this driver provides support for the
application framework in Android, Yocto and more.
Application framework can access Unisoc's display internel
peripherals through libdrm or libkms, it's test ok by modetest
(DRM/KMS te
Devfreq framework supports 2 modes for monitoring devices.
Use delayed timer as default instead of deferrable timer
in order to monitor the GPU status regardless of CPU idle.
Signed-off-by: Lukasz Luba
---
Hi all,
This is just a simple change but has impact on reliable polling mode
with guarante
It is observed 'use-after-free' on the dmabuf's file->f_inode with the
race between closing the dmabuf file and reading the dmabuf's debug
info.
Consider the below scenario where P1 is closing the dma_buf file
and P2 is reading the dma_buf's debug info in the system:
P1
Gracious ping for these two patches
On Fri, 27 Nov 2020 at 12:23, Dmitry Baryshkov
wrote:
>
> - Call wake_up() when EDID ready event is received to wake
> wait_event_interruptible_timeout()
>
> - Increase waiting timeout, reading EDID can take longer than 100ms, so
> let's be on a safe side.
Fix the warnings reported in functions documentation when compiling with W=1
Signed-off-by: Benjamin Gaignard
---
drivers/gpu/drm/drm_agpsupport.c | 111 ---
1 file changed, 59 insertions(+), 52 deletions(-)
diff --git a/drivers/gpu/drm/drm_agpsupport.c b/drivers/gpu
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