On 6/2/21 8:40 PM, Daniel Vetter wrote:
On Wed, Jun 02, 2021 at 11:48:41AM +0200, Christian König wrote:
Am 02.06.21 um 11:16 schrieb Thomas Hellström (Intel):
On 6/2/21 10:32 AM, Christian König wrote:
Uff I'm just waiting for feedback from Philip to merge a large patch
set for TTM through
https://bugzilla.kernel.org/show_bug.cgi?id=213321
--- Comment #3 from Sujay1844 (sujay1...@protonmail.com) ---
The same files I uploaded here, I uploaded them to gist as well if that's what
you prefer.
[System-info.txt](https://gist.github.com/e92b976a8a90d2c7a452ffe3d9032573)
[Dmesg.txt](https:
On 03-06-2021 05:35, Doug Anderson wrote:
Hi,
On Sun, May 30, 2021 at 8:57 AM Rajeev Nandan
wrote:
Other than the two nits (ordering of memory allocation and word
wrapping in a comment), this looks good to me. Feel free to add my
Reviewed-by tag when you fix the nits.
NOTE: Even though
https://bugzilla.kernel.org/show_bug.cgi?id=213321
--- Comment #2 from Sujay1844 (sujay1...@protonmail.com) ---
Created attachment 297127
--> https://bugzilla.kernel.org/attachment.cgi?id=297127&action=edit
Dmesg output
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https://bugzilla.kernel.org/show_bug.cgi?id=213321
--- Comment #1 from Sujay1844 (sujay1...@protonmail.com) ---
Created attachment 297125
--> https://bugzilla.kernel.org/attachment.cgi?id=297125&action=edit
Journalctl output
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You are receiving t
https://bugzilla.kernel.org/show_bug.cgi?id=213321
Bug ID: 213321
Summary: Laptop not waking from sleep
Product: Drivers
Version: 2.5
Kernel Version: 5.12.8-arch1-1
Hardware: All
OS: Linux
Tree: Mainline
From: Michal Wajdeczko
Stop using fence/status from CTB descriptor as future GuC ABI will
no longer support replies over CTB descriptor.
Signed-off-by: Michal Wajdeczko
Signed-off-by: Matthew Brost
Reviewed-by: Matthew Brost
---
.../gt/uc/abi/guc_communication_ctb_abi.h | 4 +-
drivers/
From: Michal Wajdeczko
In irq handler try to receive just single G2H message, let other
messages to be received from tasklet.
Signed-off-by: Michal Wajdeczko
Signed-off-by: Matthew Brost
Reviewed-by: Matthew Brost
---
drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c | 67 ---
dr
From: Michal Wajdeczko
In upcoming patch we will allow more CTB requests to be sent in
parallel to the GuC for processing, so we shouldn't assume any more
that GuC will always reply without 10ms.
Use bigger value from CONFIG_DRM_I915_GUC_CTB_TIMEOUT instead.
v2: Add CONFIG_DRM_I915_GUC_CTB_TIME
From: Michal Wajdeczko
We can retrieve offsets to cmds buffers and descriptor from
actual pointers that we already keep locally.
Signed-off-by: Michal Wajdeczko
Signed-off-by: Matthew Brost
Reviewed-by: Matthew Brost
---
drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c | 16 ++--
1 file
From: Michal Wajdeczko
Since most of future CT traffic will be based on G2H requests,
instead of copying incoming CT message to static buffer and then
create new allocation for such request, always copy incoming CT
message to new allocation. Also by doing it while reading CT
header, we can safely
From: Michal Wajdeczko
We are no longer using descriptor to hold G2H replies and we are
protecting access to the descriptor and command buffer by the
separate spinlock, so we can stop using mutex.
Signed-off-by: Michal Wajdeczko
Signed-off-by: Matthew Brost
Reviewed-by: Matthew Brost
---
dri
From: Michal Wajdeczko
Future GuC will require CTB buffers sizes to be multiple of 4K.
Make these changes now as this shouldn't impact us too much.
Signed-off-by: Michal Wajdeczko
Signed-off-by: Matthew Brost
Reviewed-by: Matthew Brost
Cc: John Harrison
---
drivers/gpu/drm/i915/gt/uc/intel_
From: Daniele Ceraolo Spurio
We have a couple of failure injection points in the CT enablement path,
so we need to use i915_probe_error() to select the appropriate log level.
A new macro (CT_PROBE_ERROR) has been added to the set of CT logging
macros to be used in this scenario and upcoming ones.
From: Michal Wajdeczko
Base offset and count of the GuC scratch registers, used for
sending MMIO messages to GuC, can be initialized earlier with
other GuC members that also depends on platform.
Signed-off-by: Michal Wajdeczko
Signed-off-by: Matthew Brost
Reviewed-by: Matthew Brost
Cc: Daniel
From: Michal Wajdeczko
We want to stop using guc.send_mutex while sending CTB messages
so we have to start protecting access to CTB send descriptor.
For completeness protect also CTB receive descriptor.
Add spinlock to struct intel_guc_ct_buffer and start using it.
Signed-off-by: Michal Wajdec
From: Michal Wajdeczko
In upcoming GuC firmware, CTB size will be removed from the CTB
descriptor so we must keep it locally for any calculations.
While around, improve some debug messages and helpers.
Signed-off-by: Michal Wajdeczko
Signed-off-by: Matthew Brost
Reviewed-by: Matthew Brost
--
From: Michal Wajdeczko
Upcoming GuC firmware will always require just two CTBs and we
also plan to configure them with different sizes, so definining
them as array is no longer suitable.
Signed-off-by: Michal Wajdeczko
Signed-off-by: Matthew Brost
Reviewed-by: Matthew Brost
---
drivers/gpu/d
From: Rodrigo Vivi
This action is no-op in the GuC side for a few versions already
and it is getting entirely removed soon, in an upcoming version.
Time to remove before we face communication issues.
Cc: Vinay Belgaumkar
Signed-off-by: Rodrigo Vivi
Signed-off-by: Matthew Brost
Acked-by: Mich
From: Daniele Ceraolo Spurio
If we're about to sanitize the GuC, something might have going wrong
beforehand, so we should avoid trying to talk to it. Even if GuC is
still running fine, the sanitize will reset its internal state and clear
the CTB registration, so there is still no need to explici
From: Michal Wajdeczko
Generic helpers should be placed in i915_utils.h.
Signed-off-by: Michal Wajdeczko
Signed-off-by: Matthew Brost
Reviewed-by: Matthew Brost
---
drivers/gpu/drm/i915/i915_utils.h | 5 +
drivers/gpu/drm/i915/i915_vma.h | 5 -
2 files changed, 5 insertions(+), 5 d
Single series to merge the following series that have been reviewed /
passed CI:
https://patchwork.freedesktop.org/series/90633/
https://patchwork.freedesktop.org/series/90552/
Signed-off-by: Matthew Brost
Daniele Ceraolo Spurio (4):
drm/i915/guc: skip disabling CTBs before sanitizing the GuC
From: Daniele Ceraolo Spurio
GuC has its own defines for the engine classes. They're currently
mapping 1:1 to the defines used by the driver, but there is no guarantee
this will continue in the future. Given that we've been caught off-guard
in the past by similar divergences, we can prepare for t
Ensure H2G buffer updates are visible before descriptor tail updates by
inserting a barrier between the H2G buffer update and the tail. The
barrier is simple wmb() for SMEM and is register write for LMEM. This is
needed if more than 1 H2G can be inflight at once.
If this barrier is not inserted it
From: Michal Wajdeczko
Our fwif.h file is now mix of strict firmware ABI definitions and
set of our helpers. In anticipation of upcoming changes to the GuC
interface try to keep them separate in smaller maintainable files.
Signed-off-by: Michal Wajdeczko
Signed-off-by: Matthew Brost
Reviewed-b
From: Daniele Ceraolo Spurio
In GuC submission mode the CS is owned by the GuC FW, so all CS status
interrupts are handled by it. We only need the user interrupt as that
signals request completion.
Since we're now starting the engines directly in GuC submission mode
when selected, we can stop sw
Drop the variable guc->interrupts.enabled as this variable is just
leading to bugs creeping into the code.
e.g. A full GPU reset disables the GuC interrupts but forgot to clear
guc->interrupts.enabled, guc->interrupts.enabled being true suppresses
interrupts from getting re-enabled and now we are
On Thu, Jun 3, 2021 at 5:48 AM Matthew Brost wrote:
>
> On Wed, Jun 02, 2021 at 08:57:02PM +0200, Daniel Vetter wrote:
> > On Wed, Jun 2, 2021 at 5:27 PM Tvrtko Ursulin
> > wrote:
> > > On 25/05/2021 17:45, Matthew Brost wrote:
> > > > On Tue, May 25, 2021 at 11:32:26AM +0100, Tvrtko Ursulin wrot
On Wed, Jun 02, 2021 at 04:27:18PM +0100, Tvrtko Ursulin wrote:
>
> On 25/05/2021 17:45, Matthew Brost wrote:
> > On Tue, May 25, 2021 at 11:32:26AM +0100, Tvrtko Ursulin wrote:
> > >
> > > On 06/05/2021 20:13, Matthew Brost wrote:
> > > > Basic GuC submission support. This is the first bullet po
Hi Dave, Daniel,
Fixes for 5.13.
The following changes since commit 8124c8a6b35386f73523d27eacb71b5364a68c4c:
Linux 5.13-rc4 (2021-05-30 11:58:25 -1000)
are available in the Git repository at:
https://gitlab.freedesktop.org/agd5f/linux.git
tags/amd-drm-fixes-5.13-2021-06-02
for you to fe
On Wed, Jun 02, 2021 at 08:57:02PM +0200, Daniel Vetter wrote:
> On Wed, Jun 2, 2021 at 5:27 PM Tvrtko Ursulin
> wrote:
> > On 25/05/2021 17:45, Matthew Brost wrote:
> > > On Tue, May 25, 2021 at 11:32:26AM +0100, Tvrtko Ursulin wrote:
> > >> * Context pinning code with it's magical two adds, su
On Mon, May 31, 2021 at 10:31:53AM +0200, Daniel Vetter wrote:
> On Thu, May 27, 2021 at 4:19 PM Matthew Brost wrote:
> >
> > On Thu, May 27, 2021 at 10:41:10AM +0100, Tvrtko Ursulin wrote:
> > >
> > > On 26/05/2021 21:03, Matthew Brost wrote:
> > > > Introduce i915_sched_engine object which is lo
Fix following coccicheck warning:
./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c:1726:2-3: Unneeded semicolon
Signed-off-by: Wan Jiabing
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
b/drivers/gpu/
On Wed, Jun 2, 2021 at 2:48 PM Daniel Vetter wrote:
> On Wed, Jun 02, 2021 at 05:38:51AM -0400, Marek Olšák wrote:
> > On Wed, Jun 2, 2021 at 5:34 AM Marek Olšák wrote:
> >
> > > Yes, we can't break anything because we don't want to complicate things
> > > for us. It's pretty much all NAK'd alre
Hi all,
On Thu, 3 Jun 2021 12:48:47 +1000 Stephen Rothwell
wrote:
>
> diff --cc drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> index bcfd4a8d0288,1923f035713a..
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> @@@ -657,11 -657,10 +658,11 @@@ v
drm_drv.h is included at line 28, remove the duplicate here.
Signed-off-by: Wan Jiabing
---
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
index 3ff76cb..131cff0 10064
Hi all,
Today's linux-next merge of the amdgpu tree got conflicts in:
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
between commit:
d3116756a710 ("drm/ttm: rename bo->mem and make it a pointer")
from the drm-misc tree and commits:
b453e42a6e8b ("drm/am
Hi,
On Sun, May 30, 2021 at 8:57 AM Rajeev Nandan wrote:
>
> If there is no backlight specified in the device tree and the panel
> has access to the DP AUX channel then create a DP AUX backlight if
> supported by the panel.
>
> Signed-off-by: Rajeev Nandan
> ---
>
> This patch depends on [1] (dr
On Mon, 2021-05-24 at 22:47 -0700, Daniele Ceraolo Spurio wrote:
> From: "Huang, Sean Z"
>
> Implement the funcs to create the TEE channel, so kernel can
> send the TEE commands directly to TEE for creating the arbitrary
> (default) session.
>
> v2: fix locking, don't pollute dev_priv (Chris)
>
On 2021-06-02 07:43, Dmitry Baryshkov wrote:
Unlike previous generations, 7nm PHYs are required to collaborate with
the host for conitnuos clock mode. Add changes neccessary to enable
continuous clock mode in the 7nm DSI PHYs.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/dsi/dsi.h
Hi,
On Sun, May 30, 2021 at 8:57 AM Rajeev Nandan wrote:
>
> Some panels datasheets may specify a delay between the enable GPIO and
> the regulator. Support this in panel-simple.
>
> Signed-off-by: Rajeev Nandan
> ---
>
> Changes in v4:
> - New
>
> Changes in v5:
> - Update description (Douglas)
Hi,
On Sun, May 30, 2021 at 8:57 AM Rajeev Nandan wrote:
>
> +static int dp_aux_backlight_update_status(struct backlight_device *bd)
> +{
> + struct dp_aux_backlight *bl = bl_get_data(bd);
> + u16 brightness = backlight_get_brightness(bd);
> + int ret = 0;
> +
> + if (brig
Quoting Lee Jones (2021-06-02 07:32:47)
> Fixes the following W=1 kernel build warning(s):
>
> drivers/gpu/drm/msm/dp/dp_catalog.c:206: warning: Function parameter or
> member 'dp_catalog' not described in 'dp_catalog_aux_reset'
> drivers/gpu/drm/msm/dp/dp_catalog.c:206: warning: Excess function
On 2021-06-02 4:22 p.m., Shankar, Uma wrote:
>
>
>> -Original Message-
>> From: Pekka Paalanen
>> Sent: Wednesday, June 2, 2021 2:59 PM
>> To: Shankar, Uma
>> Cc: intel-...@lists.freedesktop.org; dri-devel@lists.freedesktop.org; Modem,
>> Bhanuprakash ; Harry Wentland
>>
>> Subject:
On Mon, May 31, 2021 at 4:50 AM Daniel Vetter wrote:
>
> On Thu, May 27, 2021 at 11:26:45AM -0500, Jason Ekstrand wrote:
> > The current context uAPI allows for two methods of setting context
> > parameters: SET_CONTEXT_PARAM and CONTEXT_CREATE_EXT_SETPARAM. The
> > former is allowed to be called
On Mon, May 31, 2021 at 4:12 AM Daniel Vetter wrote:
>
> On Thu, May 27, 2021 at 11:26:42AM -0500, Jason Ekstrand wrote:
> > This means that the proto-context needs to grow support for engine
> > configuration information as well as setparam logic. Fortunately, we'll
> > be deleting a lot of setp
On Mon, May 31, 2021 at 3:48 AM Daniel Vetter wrote:
>
> On Thu, May 27, 2021 at 11:26:39AM -0500, Jason Ekstrand wrote:
> > For now this is a no-op because everyone passes in a null SSEU but it
> > lets us get some of the error handling and selftest refactoring plumbed
> > through.
> >
> > Signed
On Tue, May 4, 2021 at 11:13 AM Daniel Vetter wrote:
>
> On Mon, May 03, 2021 at 10:57:37AM -0500, Jason Ekstrand wrote:
> > The current context uAPI allows for two methods of setting context
> > parameters: SET_CONTEXT_PARAM and CONTEXT_CREATE_EXT_SETPARAM. The
> > former is allowed to be called
From: Arnd Bergmann
When LLCC support is in a loadable module, the adreno support
cannot be built-in:
aarch64-linux-ld: drivers/gpu/drm/msm/adreno/a6xx_gpu.o: in function
`a6xx_gpu_init':
a6xx_gpu.c:(.text+0xe0): undefined reference to `llcc_slice_getd'
a6xx_gpu.c:(.text+0xe0): relocation trunc
Avoid randconfig build failures by requiring VEXPRESS_CONFIG:
aarch64-linux-gnu-ld: drivers/gpu/drm/pl111/pl111_versatile.o: in function
`pl111_vexpress_clcd_init':
pl111_versatile.c:(.text+0x220): undefined reference to
`devm_regmap_init_vexpress_config'
Fixes: 826fc86b5903 ("drm: pl111: Move
Hi,
While tracking down spurious "orphan section" warnings on arm and arm64,
I needed to fix several other issues that it seems other folks have
tripped over before.
Here's the series that fixed everything for me...
-Kees
Arnd Bergmann (1):
drm/msm/a6xx: add CONFIG_QCOM_LLCC dependency
Kees
When cleaning up other drm config dependencies, it is too easy to create
larger problems. Instead, mark CONFIG_FB as a "depends":
drivers/gpu/drm/Kconfig:74:error: recursive dependency detected!
Suggested-by: Arnd Bergmann
Link:
https://lore.kernel.org/lkml/cak8p3a3juqs6c5tessnmbqfuymewj9fhqriz
On 16/05/2021 01:57, Dmitry Baryshkov wrote:
From Dmitry Baryshkov # This line is ignored.
From: Dmitry Baryshkov
Reply-To:
Subject: [PATCH v2 0/6] drm/msm/dpu: simplify RM code
In-Reply-To:
There is no need to request most of hardware blocks through the resource
manager (RM), since typically
On 16/05/2021 04:21, Arnaud Vrac wrote:
Hi Dmitry,
Le dim. 16 mai 2021 à 00:58, Dmitry Baryshkov
a écrit :
No code uses lm_max_width from resource manager, so drop it.
I have a pending patch which uses this value to properly determine the
number of LMs to use in the topology. Currently the
On 15/05/2021 22:09, Dmitry Baryshkov wrote:
Drop most of "extra" features of dpu_hw_blk.
Changes since v2:
- Include a patch to fix compilation issue with merge3d id handling
Changes since v1:
- Make dpu_hw_blk an empty structure
- Split this into separate patchset
Gracious ping for th
Hi Dave, Daniel,
More new stuff for 5.14.
The following changes since commit 9a91e5e0af5e03940d0eec72c36364a1701de240:
Merge tag 'amd-drm-next-5.14-2021-05-21' of
https://gitlab.freedesktop.org/agd5f/linux into drm-next (2021-05-21 15:59:05
+1000)
are available in the Git repository at:
On Mon, May 31, 2021 at 3:47 AM Daniel Vetter wrote:
>
> On Thu, May 27, 2021 at 11:26:37AM -0500, Jason Ekstrand wrote:
> > The current context uAPI allows for two methods of setting context
> > parameters: SET_CONTEXT_PARAM and CONTEXT_CREATE_EXT_SETPARAM. The
> > former is allowed to be called
Add driver for TI SN65DSI83 Single-link DSI to Single-link LVDS bridge
and TI SN65DSI84 Single-link DSI to Dual-link or 2x Single-link LVDS
bridge. TI SN65DSI85 is unsupported due to lack of hardware to test on,
but easy to add.
The driver operates the chip via I2C bus. Currently the LVDS clock ar
Add DT binding document for TI SN65DSI83 and SN65DSI84 DSI to LVDS bridge.
Reviewed-by: Linus Walleij
Reviewed-by: Rob Herring
Signed-off-by: Marek Vasut
Cc: Douglas Anderson
Cc: Jagan Teki
Cc: Laurent Pinchart
Cc: Linus Walleij
Cc: Rob Herring
Cc: Sam Ravnborg
Cc: Stephen Boyd
Cc: devic
Decoder input LVDS format is a property of the decoder chip or even
its strapping. Add DT property data-mapping the same way lvds-panel
does, to define the LVDS data mapping.
Signed-off-by: Marek Vasut
Cc: Laurent Pinchart
Cc: Rob Herring
Cc: Sam Ravnborg
Cc: devicet...@vger.kernel.org
To: dri
Decoder input LVDS format is a property of the decoder chip or even
its strapping. Handle data-mapping the same way lvds-panel does. In
case data-mapping is not present, do nothing, since there are still
legacy bindings which do not specify this property.
Signed-off-by: Marek Vasut
Cc: Laurent Pi
The OnSemi FIN3385 Parallel-to-LVDS encoder has a dedicated input line to
select input pixel data sampling edge. Add DT property "pclk-sample", not
the same as the one used by display timings but rather the same as used by
media, to define the pixel data sampling edge.
Signed-off-by: Marek Vasut
The OnSemi FIN3385 Parallel-to-LVDS encoder has a dedicated input line to
select input pixel data sampling edge. Add DT property "pclk-sample", not
the same as the one used by display timings but rather the same as used by
media, and configure bus flags based on this DT property.
Signed-off-by: Ma
On Wed, Jun 2, 2021 at 6:17 AM Christian König
wrote:
>
> The functions can be called both in _rcu context as well
> as while holding the lock.
>
> Signed-off-by: Christian König
> ---
> drivers/dma-buf/dma-buf.c | 3 +--
> drivers/dma-buf/dma-resv.c| 24
> -Original Message-
> From: Pekka Paalanen
> Sent: Wednesday, June 2, 2021 3:04 PM
> To: Shankar, Uma
> Cc: intel-...@lists.freedesktop.org; dri-devel@lists.freedesktop.org; Modem,
> Bhanuprakash
> Subject: Re: [PATCH 01/21] drm: Add Enhanced Gamma and color lut range
> attributes
>
Reviewed-by: Jason Ekstrand
On Wed, Jun 2, 2021 at 6:17 AM Christian König
wrote:
>
> That describes much better what the function is doing here.
>
> Signed-off-by: Christian König
> ---
> drivers/gpu/drm/drm_gem.c| 2 +-
> drivers/gpu/drm/drm_gem_atomic_helper.c | 2 +
On Wed, Jun 2, 2021 at 6:17 AM Christian König
wrote:
>
> When the comment needs to state explicitly that this is doesn't get a
> reference
> to the object then the function is named rather badly.
>
> Rename the function and use it in even more places.
>
> Signed-off-by: Christian König
> ---
>
> -Original Message-
> From: Pekka Paalanen
> Sent: Wednesday, June 2, 2021 2:59 PM
> To: Shankar, Uma
> Cc: intel-...@lists.freedesktop.org; dri-devel@lists.freedesktop.org; Modem,
> Bhanuprakash ; Harry Wentland
>
> Subject: Re: [PATCH 00/21] Add Support for Plane Color Lut and CSC
> -Original Message-
> From: Pekka Paalanen
> Sent: Wednesday, June 2, 2021 2:40 PM
> To: Shankar, Uma
> Cc: intel-...@lists.freedesktop.org; dri-devel@lists.freedesktop.org; Modem,
> Bhanuprakash
> Subject: Re: [PATCH 1/9] drm: Add gamma mode property
>
> On Tue, 1 Jun 2021 16:11:2
'commit eec44d44a3d2 ("drm/atmel: Use drm_atomic_helper_commit")'
removed the home-grown handling of atomic commits and exposed an issue
in the crtc atomic commit handling where vblank is expected to be
enabled but hasn't yet, causing kernel warnings during boot. This patch
cleans up the crtc vbla
> -Original Message-
> From: Pekka Paalanen
> Sent: Wednesday, June 2, 2021 2:33 PM
> To: Shankar, Uma
> Cc: intel-...@lists.freedesktop.org; dri-devel@lists.freedesktop.org; Modem,
> Bhanuprakash
> Subject: Re: [PATCH 5/9] drm: Add Client Cap for advance gamma mode
>
> On Tue, 1 Ju
On Wed, Jun 2, 2021 at 7:43 AM Daniel Vetter wrote:
>
> On Wed, Jun 02, 2021 at 01:17:11PM +0200, Christian König wrote:
> > When the comment needs to state explicitly that this
> > doesn't get a reference to the object then the function
> > is named rather badly.
> >
> > Rename the function and u
On 02-06-2021 02:28, Rob Herring wrote:
On Mon, May 31, 2021 at 07:03:53PM +0530, Rajeev Nandan wrote:
+
+properties:
+ compatible:
+oneOf:
+ - const: qcom,dsi-phy-7nm
When would one use this?
This is for SM8250.
+ - const: qcom,dsi-phy-7nm-7280
+ - const: qcom,dsi-p
Hi,
On Wed, Jun 2, 2021 at 11:16 AM Rob Herring wrote:
>
> On Mon, May 24, 2021 at 05:01:52PM -0700, Douglas Anderson wrote:
> > Now that we have an eDP controller that lists aux-bus, we can safely
> > add an example to the aux-bus bindings.
> >
> > NOTE: this example is just a copy of the one in
On Wed, Jun 02, 2021 at 04:03:59PM +0200, Christian König wrote:
> dma_resv_lockdep() seems to have some space/tab mixups. Fix that and
> move the function to the end of the file.
>
> Also fix some minor things checkpatch.pl pointed out while at it.
>
> No functional change.
>
> Signed-off-by: C
On Wed, Jun 02, 2021 at 04:03:58PM +0200, Christian König wrote:
> Drop the whole rcu handling since we are holding the resv lock anyway.
>
> v2: drop all rcu handling instead.
>
> Signed-off-by: Christian König
Reviewed-by: Daniel Vetter
> ---
> drivers/dma-buf/dma-buf.c | 27 +-
On Wed, Jun 02, 2021 at 01:31:16PM -0500, Bjorn Helgaas wrote:
>
> On Wed, Jun 2, 2021 at 11:22 AM Daniel Vetter wrote:
> > On Wed, Jun 02, 2021 at 06:36:03PM +0800, Huacai Chen wrote:
> > > On Wed, Jun 2, 2021 at 2:03 AM Daniel Vetter wrote:
> > > > On Tue, Jun 01, 2021 at 07:12:27PM +0200, Gre
On Wed, Jun 02, 2021 at 10:09:01AM +0200, Michel Dänzer wrote:
> On 2021-06-01 12:49 p.m., Michel Dänzer wrote:
> > On 2021-06-01 12:21 p.m., Christian König wrote:
> >
> >> Another question is if that is sufficient as security for the display
> >> server or if we need further handling down the r
On 6/2/21 8:36 PM, Daniel Vetter wrote:
On Wed, Jun 02, 2021 at 02:21:17PM +0200, Thomas Hellström wrote:
On 6/2/21 2:04 PM, Christian König wrote:
Am 02.06.21 um 13:24 schrieb Thomas Hellström (Intel):
[SNIP]
@@ -576,14 +565,10 @@ static void
ttm_bo_mmap_vma_setup(struct ttm_buffer_object
On Wed, Jun 02, 2021 at 08:52:38PM +0200, Christian König wrote:
>
>
> Am 02.06.21 um 20:48 schrieb Daniel Vetter:
> > On Wed, Jun 02, 2021 at 05:38:51AM -0400, Marek Olšák wrote:
> > > On Wed, Jun 2, 2021 at 5:34 AM Marek Olšák wrote:
> > >
> > > > Yes, we can't break anything because we don't
On Mon, May 24, 2021 at 10:47:48PM -0700, Daniele Ceraolo Spurio wrote:
> From: Vitaly Lubart
>
> Export PAVP client to work with i915 driver,
> for binding it uses kernel component framework.
>
> Signed-off-by: Vitaly Lubart
> Signed-off-by: Tomas Winkler
> Signed-off-by: Daniele Ceraolo Spur
On Mon, May 24, 2021 at 10:48:02PM -0700, Daniele Ceraolo Spurio wrote:
> From: Anshuman Gupta
>
> When protected sufaces has flipped and pxp session is disabled,
> display black pixels by using plane color CTM correction.
>
> v2:
> - Display black pixels in async flip too.
>
> v3:
> - Removed
On Wed, Jun 2, 2021 at 5:27 PM Tvrtko Ursulin
wrote:
> On 25/05/2021 17:45, Matthew Brost wrote:
> > On Tue, May 25, 2021 at 11:32:26AM +0100, Tvrtko Ursulin wrote:
> >> * Context pinning code with it's magical two adds, subtract and cmpxchg
> >> is
> >> dodgy as well.
> >
> > Daniele tried to
Am 02.06.21 um 20:52 schrieb Thomas Hellström (Intel):
On 6/2/21 8:41 PM, Christian König wrote:
Am 02.06.21 um 17:28 schrieb Thomas Hellström (Intel):
Hi!
On 6/2/21 4:17 PM, Christian König wrote:
Am 02.06.21 um 16:13 schrieb Thomas Hellström (Intel):
On 6/2/21 3:07 PM, Christian König
Am 02.06.21 um 20:48 schrieb Daniel Vetter:
On Wed, Jun 02, 2021 at 05:38:51AM -0400, Marek Olšák wrote:
On Wed, Jun 2, 2021 at 5:34 AM Marek Olšák wrote:
Yes, we can't break anything because we don't want to complicate things
for us. It's pretty much all NAK'd already. We are trying to ga
On 6/2/21 8:41 PM, Christian König wrote:
Am 02.06.21 um 17:28 schrieb Thomas Hellström (Intel):
Hi!
On 6/2/21 4:17 PM, Christian König wrote:
Am 02.06.21 um 16:13 schrieb Thomas Hellström (Intel):
On 6/2/21 3:07 PM, Christian König wrote:
Am 02.06.21 um 14:33 schrieb Thomas Hellström (
On Wed, Jun 02, 2021 at 03:06:50PM +0100, Steven Price wrote:
> On 21/05/2021 10:09, Daniel Vetter wrote:
> > More consistency and prep work for the next patch.
> >
> > Aside: I wonder whether we shouldn't just move this entire xarray
> > business into the scheduler so that not everyone has to rei
On Wed, Jun 02, 2021 at 05:38:51AM -0400, Marek Olšák wrote:
> On Wed, Jun 2, 2021 at 5:34 AM Marek Olšák wrote:
>
> > Yes, we can't break anything because we don't want to complicate things
> > for us. It's pretty much all NAK'd already. We are trying to gather more
> > knowledge and then make b
Am 02.06.21 um 20:38 schrieb Daniel Vetter:
On Wed, Jun 02, 2021 at 10:30:13AM +0200, Christian König wrote:
We discussed if that is really the right approach for quite a while now, but
digging deeper into a bug report on arm turned out that this is actually
horrible broken right now.
The re
Am 02.06.21 um 17:28 schrieb Thomas Hellström (Intel):
Hi!
On 6/2/21 4:17 PM, Christian König wrote:
Am 02.06.21 um 16:13 schrieb Thomas Hellström (Intel):
On 6/2/21 3:07 PM, Christian König wrote:
Am 02.06.21 um 14:33 schrieb Thomas Hellström (Intel):
On 6/2/21 2:11 PM, Christian König
On Wed, Jun 02, 2021 at 11:48:41AM +0200, Christian König wrote:
> Am 02.06.21 um 11:16 schrieb Thomas Hellström (Intel):
> >
> > On 6/2/21 10:32 AM, Christian König wrote:
> > > Uff I'm just waiting for feedback from Philip to merge a large patch
> > > set for TTM through drm-misc-next.
> > >
>
On Wed, Jun 02, 2021 at 10:30:13AM +0200, Christian König wrote:
> We discussed if that is really the right approach for quite a while now, but
> digging deeper into a bug report on arm turned out that this is actually
> horrible broken right now.
>
> The reason for this is that vmf_insert_mixed_p
On Wed, Jun 02, 2021 at 02:21:17PM +0200, Thomas Hellström wrote:
>
> On 6/2/21 2:04 PM, Christian König wrote:
> >
> >
> > Am 02.06.21 um 13:24 schrieb Thomas Hellström (Intel):
> > > [SNIP]
> > > > > > @@ -576,14 +565,10 @@ static void
> > > > > > ttm_bo_mmap_vma_setup(struct ttm_buffer_object
On Sun, 30 May 2021 21:26:11 +0530, Rajeev Nandan wrote:
> Add Samsung 13.3" FHD eDP AMOLED panel.
>
> Signed-off-by: Rajeev Nandan
> Reviewed-by: Douglas Anderson
> ---
>
> (no changes since v4)
>
> Changes in v4:
> - New
>
> Documentation/devicetree/bindings/display/panel/panel-simple.yaml
[+cc linux-pci]
On Wed, Jun 2, 2021 at 11:22 AM Daniel Vetter wrote:
> On Wed, Jun 02, 2021 at 06:36:03PM +0800, Huacai Chen wrote:
> > On Wed, Jun 2, 2021 at 2:03 AM Daniel Vetter wrote:
> > > On Tue, Jun 01, 2021 at 07:12:27PM +0200, Greg KH wrote:
> > > > On Tue, Jun 01, 2021 at 05:56:40PM +0
On Mon, May 24, 2021 at 10:48:01PM -0700, Daniele Ceraolo Spurio wrote:
> From: Anshuman Gupta
>
> Add support to enable/disable PLANE_SURF Decryption Request bit.
> It requires only to enable plane decryption support when following
> condition met.
> 1. PXP session is enabled.
> 2. Buffer object
On Tue, Jun 01, 2021 at 02:23:00PM -0700, Daniele Ceraolo Spurio wrote:
>
>
> On 6/1/2021 1:20 PM, Rodrigo Vivi wrote:
> > On Mon, May 24, 2021 at 10:47:50PM -0700, Daniele Ceraolo Spurio wrote:
> > > From: Chris Wilson
> > >
> > > Allow internal clients to create a pinned context.
> > >
> > >
On Mon, May 24, 2021 at 05:01:52PM -0700, Douglas Anderson wrote:
> Now that we have an eDP controller that lists aux-bus, we can safely
> add an example to the aux-bus bindings.
>
> NOTE: this example is just a copy of the one in the 'ti-sn65dsi86'
> one. It feels useful to have the example in bo
On Mon, May 24, 2021 at 10:47:58PM -0700, Daniele Ceraolo Spurio wrote:
> Now that we can handle destruction and re-creation of the arb session,
> we can postpone the start of the session to the first submission that
> requires it, to avoid keeping it running with no user.
>
> Signed-off-by: Danie
On Mon, 24 May 2021 17:01:51 -0700, Douglas Anderson wrote:
> The patch ("dt-bindings: drm: Introduce the DP AUX bus") talks about
> how using the DP AUX bus is better than learning how to slice
> bread. Let's add it to the ti-sn65dsi86 bindings.
>
> Signed-off-by: Douglas Anderson
> ---
>
> Cha
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