Re: [PATCH v5 02/16] drm/sched: Allow using a dedicated workqueue for the timeout/fault tdr

On Tue, 7 Sep 2021 14:53:58 -0400 Andrey Grodzovsky wrote: > On 2021-06-29 7:24 a.m., Christian König wrote: > > > Am 29.06.21 um 13:18 schrieb Boris Brezillon: > >> Hi Christian, > >> > >> On Tue, 29 Jun 2021 13:03:58 +0200 > >> Christian König wrote: > >> > >>> Am 29.06.21 um 09:34 schrie

Re: [PATCH v10 07/17] dt-bindings: display: mediatek: merge: add additional prop for mt8195

Hi Jason, On Wed, 2021-09-08 at 14:03 +0800, jason-jh.lin wrote: > add MERGE additional properties description for mt8195: > 1. async clock > 2. fifo setting enable > 3. reset controller > > Signed-off-by: jason-jh.lin > --- > .../display/mediatek/mediatek,merge.yaml | 30 +

[PATCH v10 17/17] drm/mediatek: add mediatek-drm of vdosys0 support for mt8195

Add driver data of mt8195 vdosys0 to mediatek-drm and the sub driver. Signed-off-by: jason-jh.lin --- rebase on series [1] [1] drm/mediatek: add support for mediatek SOC MT8192 - https://patchwork.kernel.org/project/linux-mediatek/list/?series=529489 --- drivers/gpu/drm/mediatek/mtk_disp_rdma.c

[PATCH v10 16/17] drm/mediatek: add MERGE support for mediatek-drm

Add MERGE engine file: MERGE module is used to merge two slice-per-line inputs into one side-by-side output. Signed-off-by: jason-jh.lin --- rebase on series [1] [1] drm/mediatek: add support for mediatek SOC MT8192 - https://patchwork.kernel.org/project/linux-mediatek/list/?series=529489 --- d

[PATCH v10 15/17] drm/mediatek: add DSC support for mediatek-drm

DSC is designed for real-time systems with real-time compression, transmission, decompression and display. The DSC standard is a specification of the algorithms used for compressing and decompressing image display streams, including the specification of the syntax and semantics of the compressed vi

[PATCH v10 07/17] dt-bindings: display: mediatek: merge: add additional prop for mt8195

add MERGE additional properties description for mt8195: 1. async clock 2. fifo setting enable 3. reset controller Signed-off-by: jason-jh.lin --- .../display/mediatek/mediatek,merge.yaml | 30 +++ 1 file changed, 30 insertions(+) diff --git a/Documentation/devicetree/bindi

[PATCH v10 08/17] dt-bindings: display: mediatek: add mt8195 SoC binding for vdosys0

Add mt8195 SoC binding to AAL, CCORR, COLOR, DITHER, GAMMA, MERGE, OVL and RDMA yaml schema for vdosys0. Signed-off-by: jason-jh.lin --- .../devicetree/bindings/display/mediatek/mediatek,aal.yaml | 1 + .../devicetree/bindings/display/mediatek/mediatek,ccorr.yaml | 5 + .../devicetree/bind

[PATCH v10 13/17] drm/mediatek: rename the define of register offset

Add DISP_REG prefix for the define of register offset to make the difference from the define of register value. Signed-off-by: jason-jh.lin --- rebase on series [1] [1] drm/mediatek: add support for mediatek SOC MT8192 - https://patchwork.kernel.org/project/linux-mediatek/list/?series=529489 ---

[PATCH v10 04/17] dt-bindings: arm: mediatek: mutex: move mutex binding from display folder

Because mutex does not only control display function block, but also control mdp function block, so move mutex binding document from display folder to this folder. Signed-off-by: jason-jh.lin --- .../bindings/{display => arm}/mediatek/mediatek,mutex.yaml | 7 +++ 1 file changed, 3 insertions

[PATCH v10 12/17] drm/mediatek: remove unused define in mtk_drm_ddp_comp.c

Remove the unsed define in mtk_drm_ddp_comp.c Signed-off-by: jason-jh.lin Reviewed-by: Chun-Kuang Hu --- drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 10 -- 1 file changed, 10 deletions(-) diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp

[PATCH v10 06/17] dt-bindings: display: mediatek: dsc: add yaml for mt8195 SoC binding

1. Add mediatek,dsc.yaml to describe DSC module in details. 2. Add mt8195 SoC binding to mediatek,dsc.yaml. Signed-off-by: jason-jh.lin --- .../display/mediatek/mediatek,dsc.yaml| 71 +++ 1 file changed, 71 insertions(+) create mode 100644 Documentation/devicetree/bindi

[PATCH v10 10/17] soc: mediatek: add mtk-mmsys support for mt8195 vdosys0

Add mt8195 vdosys0 clock driver name and routing table to the driver data of mtk-mmsys. Signed-off-by: jason-jh.lin --- This patch is base on [1][2][3] [1] soc: mediatek: mmsys: add MT8365 support - https://patchwork.kernel.org/project/linux-mediatek/patch/20210519161847.3747352-3-fpar...@baylib

[PATCH v10 11/17] soc: mediatek: add mtk-mutex support for mt8195 vdosys0

Add mtk-mutex support for mt8195 vdosys0. Signed-off-by: jason-jh.lin --- This patch is base on [1] [1] soc: mediatek: add mtk mutex support for MT8192 - https://patchwork.kernel.org/project/linux-mediatek/patch/1628647802-5127-5-git-send-email-yongqiang@mediatek.com/ --- drivers/soc/media

[PATCH v10 14/17] drm/mediatek: adjust to the alphabetic order for mediatek-drm

Adjust to the alphabetic order for the define, function, struct and array in mediatek-drm driver Signed-off-by: jason-jh.lin --- rebase on series [1] [1] drm/mediatek: add support for mediatek SOC MT8192 - https://patchwork.kernel.org/project/linux-mediatek/list/?series=529489 --- drivers/gpu/d

[PATCH v10 03/17] dt-bindings: display: mediatek: disp: split each block to individual yaml

1. Remove mediatek,dislpay.txt 2. Split each display function block to individual yaml file. Signed-off-by: jason-jh.lin --- .../display/mediatek/mediatek,aal.yaml| 79 +++ .../display/mediatek/mediatek,ccorr.yaml | 74 ++ .../display/mediatek/mediatek,color.yaml | 8

[PATCH v10 09/17] arm64: dts: mt8195: add display node for vdosys0

Add display node for vdosys0. Signed-off-by: jason-jh.lin --- This patch is based on [1][2][3] [1]arm64: dts: Add Mediatek SoC MT8195 and evaluation board dts and Makefile - https://patchwork.kernel.org/project/linux-mediatek/patch/20210601075350.31515-2-seiya.w...@mediatek.com/ [2]arm64: dts:

[PATCH v10 02/17] dt-bindings: arm: mediatek: mmsys: add mt8195 SoC binding

There are 2 mmsys, namely vdosys0 and vdosys1 in mt8195. Each of them is bound to a display pipeline, so add their definition in mtk-mmsys documentation with 2 compatibles. Signed-off-by: jason-jh.lin --- this patch is base on [1][2] [1] dt-bindings: arm: mediatek: mmsys: convert to YAML format

[PATCH v10 00/17] Add Mediatek Soc DRM (vdosys0) support for mt8195

Change in v10: - rebase on "drm/mediatek: add support for mediatek SOC MT8192" series https://patchwork.kernel.org/project/linux-mediatek/list/?series=529489 - rebase on "soc: mediatek: mmsys: add mt8192 mmsys support" series https://patchwork.kernel.org/project/linux-mediatek/list/?series=5248

[PATCH v10 05/17] dt-bindings: arm: mediatek: mutex: add mt8195 SoC binding

add mt8195 SoC binding to mutex. Signed-off-by: jason-jh.lin --- .../devicetree/bindings/arm/mediatek/mediatek,mutex.yaml| 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mutex.yaml b/Documentation/devicetree/bindings/arm/media

[PATCH v10 01/17] dt-bindings: arm: mediatek: mmsys: add power and gce properties

Power: 1. Add description for power-domains property. GCE: 1. Add description for mboxes property. 2. Add description for mediatek,gce-client-reg property. Signed-off-by: jason-jh.lin --- .../bindings/arm/mediatek/mediatek,mmsys.yaml | 30 ++- 1 file changed, 29 insertions(+), 1

Re: linux-next: build failure after merge of the drm tree

On Mon, Sep 6, 2021 at 4:34 PM Daniel Vetter wrote: > > On Mon, Sep 6, 2021 at 12:49 AM Stephen Rothwell > wrote: > > Hi all, > > > > On Thu, 2 Sep 2021 07:50:38 +1000 Stephen Rothwell > > wrote: > > > > > > On Fri, 20 Aug 2021 15:23:34 +0900 Masahiro Yamada > > > wrote: > > > > > > > > On F

[PATCH] dt-bindings: panel: ilitek, ili9341: Fix the warning-wrong indentation: expected 10 but found 8 (indentation)

Fix indentation for the warning- wrong indentation: expected 10 but found 8 (indentation) Signed-off-by: Cai Huoqing --- .../devicetree/bindings/display/panel/ilitek,ili9341.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/display/

[drm:i915-vtable-cleanup 12/12] drivers/gpu/drm/i915/display/intel_audio.c:852:24: error: member reference type 'const struct drm_i915_display_audio_funcs *' is a pointer; did you mean to use '->'?

tree: git://people.freedesktop.org/~airlied/linux.git i915-vtable-cleanup head: b0d0061aeef594fc572295c0e3c02ba91596cbf6 commit: b0d0061aeef594fc572295c0e3c02ba91596cbf6 [12/12] drm/i915/display: constify the audio functions config: x86_64-randconfig-a016-20210906 (attached as .config) compile

Re: [PATCH] drm/msm: Disable frequency clamping on a630

On Mon 09 Aug 10:26 PDT 2021, Akhil P Oommen wrote: > On 8/9/2021 9:48 PM, Caleb Connolly wrote: > > > > > > On 09/08/2021 17:12, Rob Clark wrote: > > > On Mon, Aug 9, 2021 at 7:52 AM Akhil P Oommen > > > wrote: [..] > > > > I am a bit confused. We don't define a power domain for gpu in dt, > >

[PATCH 4/8] drm/i915/guc: Enable GuC submission by default on DG1

From: Matthew Brost Enable GuC submission by default on DG1 Signed-off-by: Matthew Brost --- drivers/gpu/drm/i915/gt/uc/intel_uc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc.c b/drivers/gpu/drm/i915/gt/uc/intel_uc.c index 86c318516e

[PATCH 2/8] drm/i915/guc: put all guc objects in lmem when available

From: Daniele Ceraolo Spurio The firmware binary has to be loaded from lmem and the recommendation is to put all other objects in there as well. Note that we don't fall back to system memory if the allocation in lmem fails because all objects are allocated during driver load and if we have issues

[PATCH 6/8] Me: Workaround LMEM blow up

From: Matthew Brost --- drivers/gpu/drm/i915/i915_gpu_error.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c index b9f66dbd46bb..a61e23deeb00 100644 --- a/drivers/gpu/drm/i915/i915_gpu_error.c +++

[PATCH 8/8] drm/i915: Get PM ref before accessing HW register

From: Vinay Belgaumkar Seeing these errors when GT is likely in suspend state- "RPM wakelock ref not held during HW access" Ensure GT is awake before trying to access HW registers. Avoid reading the register if that is not the case. Signed-off-by: Vinay Belgaumkar --- drivers/gpu/drm/i915/gt/

[PATCH 1/8] drm/i915: Do not define vma on stack

From: Venkata Sandeep Dhanalakota Defining vma on stack can cause stack overflow, if vma gets populated with new fields. Cc: Daniele Ceraolo Spurio Cc: Tvrtko Ursulin Signed-off-by: Venkata Sandeep Dhanalakota Signed-off-by: Matthew Brost --- drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 18 ++

[PATCH 7/8] Me: Dump GuC log to dmesg on SLPC load failure

From: Matthew Brost --- drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c | 3 + drivers/gpu/drm/i915/i915_gpu_error.c | 97 + drivers/gpu/drm/i915/i915_gpu_error.h | 3 + 3 files changed, 103 insertions(+) diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c b/

[PATCH 3/8] drm/i915/guc: Add DG1 GuC / HuC firmware defs

From: Matthew Brost Add DG1 GuC / HuC firmware defs Signed-off-by: Matthew Brost --- drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c index f8cb00ffb506..a685d563df7

[PATCH 5/8] Me: Allow relocs on DG1 for CI

From: Matthew Brost --- drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c index 2f2434b52317..390019fdcd6b 100644 --- a/drivers/gpu/dr

[PATCH 0/8] [CI] Enable GuC submission by default on DG1

From: John Harrison Minimum set of patches to enable GuC submission on DG1 and enable it by default. A little difficult to test as IGTs do not work with DG1 due to a bunch of uAPI features being disabled (e.g. relocations, caching memory options, etc...). Hence extra patches at the end to enable

[drm:i915-vtable-cleanup 12/12] drivers/gpu/drm/i915/display/intel_audio.c:852:24: error: 'dev_priv->audio_funcs' is a pointer; did you mean to use '->'?

tree: git://people.freedesktop.org/~airlied/linux.git i915-vtable-cleanup head: b0d0061aeef594fc572295c0e3c02ba91596cbf6 commit: b0d0061aeef594fc572295c0e3c02ba91596cbf6 [12/12] drm/i915/display: constify the audio functions config: i386-buildonly-randconfig-r006-20210906 (attached as .config)

[PATCH] drm/i915: Get PM ref before accessing HW register

Seeing these errors when GT is likely in suspend state- "RPM wakelock ref not held during HW access" Ensure GT is awake before trying to access HW registers. Avoid reading the register if that is not the case. Signed-off-by: Vinay Belgaumkar --- drivers/gpu/drm/i915/gt/intel_rps.c | 8 +++-

Re: [PATCH] drm/msm/dsi: Use division result from div_u64_rem in 7nm and 14nm PLL

On 2021-09-06 13:25, Marijn Suijten wrote: div_u64_rem provides the result of the divison and additonally the remainder; don't use this function to solely calculate the remainder while calculating the division again with div_u64. A similar improvement was applied earlier to the 10nm pll in 5c191

Re: [PATCH] drm/bridge: ti-sn65dsi83: Check link status register after enabling the bridge

On 9/7/21 7:29 PM, Andrzej Hajda wrote: W dniu 07.09.2021 o 16:25, Marek Vasut pisze: On 9/7/21 9:31 AM, Andrzej Hajda wrote: On 07.09.2021 04:39, Marek Vasut wrote: In rare cases, the bridge may not start up correctly, which usually leads to no display output. In case this happens, warn abou

Re: [PATCH] drm/mcde: Make use of the helper function devm_platform_ioremap_resource()

On Tue, Aug 31, 2021 at 3:56 PM Cai Huoqing wrote: > Use the devm_platform_ioremap_resource() helper instead of > calling platform_get_resource() and devm_ioremap_resource() > separately > > Signed-off-by: Cai Huoqing Patch applied! Yours, Linus Walleij

Re: [PATCH v3] drm/dp_mst: Fix return code on sideband message failure

On 2021-08-30 09:58, Lyude Paul wrote: On Mon, 2021-08-30 at 08:56 -0700, khs...@codeaurora.org wrote: On 2021-08-25 09:26, Lyude Paul wrote: > The patch was pushed yes (was part of drm-misc-next-2021-07-29), seems > like it > just hasn't trickled down to linus's branch quite yet. Hi Stephen B,

Re: [PATCH v10 0/4] drm: update locking for modesetting

On 31/8/21 3:24 am, Desmond Cheong Zhi Xi wrote: Sorry for the noise, rebasing on top of drm-misc-next. Please ignore the v9 series. Hi, I updated the patch set with some suggestions by Daniel Vetter, and dropped the patches after patch 4 so that we can stick the landing for avoiding races with

Re: [PATCH v2] dt-bindings: display: renesas, du: Provide bindings for r8a779a0

Hi Rob, On Tue, Sep 7, 2021 at 8:45 PM Rob Herring wrote: > On Mon, Sep 06, 2021 at 10:13:07AM +0200, Geert Uytterhoeven wrote: > > On Thu, Sep 2, 2021 at 1:39 AM Kieran Bingham > > wrote: > > > From: Kieran Bingham > > > > > > Extend the Renesas DU display bindings to support the r8a779a0 V3U.

Re: [Freedreno] [PATCH 2/3] drm/msm/dpu1: Add MSM8998 to hw catalog

On Wed, Sep 1, 2021 at 12:11 PM AngeloGioacchino Del Regno wrote: > > Bringup functionality for MSM8998 in the DPU, driver which is mostly > the same as SDM845 (just a few variations). > > Signed-off-by: AngeloGioacchino Del Regno > I don't seem to see a cover letter for this series. Eh, there

Re: [PATCH 1/2] drm/panel: Add driver for Novatek NT35950 DSI DriverIC panels

On 2021-09-01 19:31:26, AngeloGioacchino Del Regno wrote: > Add a driver for panels using the Novatek NT35950 Display Driver IC, > including support for the Sharp LS055D1SX04, found in some Sony Xperia > Z5 Premium and XZ Premium smartphones. > > Signed-off-by: AngeloGioacchino Del Regno > Some

Re: [PATCH v5 02/16] drm/sched: Allow using a dedicated workqueue for the timeout/fault tdr

On 2021-06-29 7:24 a.m., Christian König wrote: Am 29.06.21 um 13:18 schrieb Boris Brezillon: Hi Christian, On Tue, 29 Jun 2021 13:03:58 +0200 Christian König wrote: Am 29.06.21 um 09:34 schrieb Boris Brezillon: Mali Midgard/Bifrost GPUs have 3 hardware queues but only a global GPU reset.

Re: [PATCH v2] dt-bindings: display: renesas,du: Provide bindings for r8a779a0

On Mon, Sep 06, 2021 at 10:13:07AM +0200, Geert Uytterhoeven wrote: > Hi Kieran, > > On Thu, Sep 2, 2021 at 1:39 AM Kieran Bingham > wrote: > > From: Kieran Bingham > > > > Extend the Renesas DU display bindings to support the r8a779a0 V3U. > > > > Reviewed-by: Laurent Pinchart > > Signed-off-b

Re: [PATCH 3/3] dt-bindings: display: msm: Add binding for msm8998 dpu

On Wed, Sep 01, 2021 at 08:11:38PM +0200, AngeloGioacchino Del Regno wrote: > Add yaml binding for msm8998 dpu1 support. > > Signed-off-by: AngeloGioacchino Del Regno > > --- > .../bindings/display/msm/dpu-msm8998.yaml | 220 ++ > 1 file changed, 220 insertions(+) > create

[PATCH] Change igt_log level from IGT_LOG_WARN to IGT_LOG_INFO

change igt_warn to igt_info when unloading the snd module before unbinding i915 until WA is fixed. Signed-off-by: Jeevan B --- tests/core_hotunplug.c | 2 +- tests/device_reset.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/tests/core_hotunplug.c b/tests/core_hotunplu

Re: [PATCH 2/2] dt-bindings: display: Add binding for LG.Philips SW43101

On Wed, Sep 01, 2021 at 06:07:30PM +, Yassine Oudjana wrote: > Add a device tree binding for LG.Philips SW43101. > > Signed-off-by: Yassine Oudjana > --- > .../display/panel/lgphilips,sw43101.yaml | 52 +++ > 1 file changed, 52 insertions(+) > create mode 100644 > Docu

Re: [PATCH 2/2] dt-bindings: display: Add bindings for Novatek NT35950

On Wed, 01 Sep 2021 19:31:27 +0200, AngeloGioacchino Del Regno wrote: > The nt35950 IC from Novatek is a Driver IC used to drive MIPI-DSI panels, > with Static RAM for content retention in command mode and also supports > video mode with VESA Frame Buffer Compression or Display Stream Compression >

Re: [PATCH 2/2] dt-bindings: display: Document BOE BF060Y8M-AJ0 panel compatible

On Wed, 01 Sep 2021 19:31:15 +0200, AngeloGioacchino Del Regno wrote: > Document the boe,bf060y8m-aj0 panel. > > Signed-off-by: AngeloGioacchino Del Regno > > --- > .../display/panel/boe,bf060y8m-aj0.yaml | 81 +++ > 1 file changed, 81 insertions(+) > create mode 100644

Re: [PATCH] drm/kmb: Avoid warnings on impossible plane_id

On Tue, Sep 07, 2021 at 05:32:53PM +, Chrisanthus, Anitha wrote: > Hi Kees, > This patch > https://patchwork.kernel.org/project/dri-devel/patch/20210728003126.1425028-13-anitha.chrisant...@intel.com/ > is pushed to drm-misc-fixes. This change should fix the below warnings. > > I apologize fo

Re: [PATCH v2 1/5] dt-bindings: reserved-memory: Document memory region specifier

On Tue, Sep 07, 2021 at 10:33:24AM -0500, Rob Herring wrote: > On Fri, Sep 3, 2021 at 10:36 AM Thierry Reding > wrote: > > > > On Fri, Sep 03, 2021 at 09:36:33AM -0500, Rob Herring wrote: > > > On Fri, Sep 3, 2021 at 8:52 AM Thierry Reding > > > wrote: > > > > > > > > On Fri, Sep 03, 2021 at 08

Re: [PATCH v2 3/6] drm/i915 Implement LMEM backup and restore for suspend / resume

On 06/09/2021 17:55, Thomas Hellström wrote: Just evict unpinned objects to system. For pinned LMEM objects, make a backup system object and blit the contents to that. Backup is performed in three steps, 1: Opportunistically evict evictable objects using the gpu blitter. 2: After gt idle, evict

RE: [PATCH] drm/kmb: Avoid warnings on impossible plane_id

Hi Kees, This patch https://patchwork.kernel.org/project/dri-devel/patch/20210728003126.1425028-13-anitha.chrisant...@intel.com/ is pushed to drm-misc-fixes. This change should fix the below warnings. I apologize for all the inconveniences. Thanks, Anitha > -Original Message- > From:

Re: [PATCH] drm/bridge: ti-sn65dsi83: Check link status register after enabling the bridge

W dniu 07.09.2021 o 16:25, Marek Vasut pisze: > On 9/7/21 9:31 AM, Andrzej Hajda wrote: >> On 07.09.2021 04:39, Marek Vasut wrote: >>> In rare cases, the bridge may not start up correctly, which usually >>> leads to no display output. In case this happens, warn about it in >>> the kernel log. >>>

Re: [Intel-gfx] [PATCH v7 3/8] i915/gvt: use DEFINE_DYNAMIC_DEBUG_CATEGORIES to create "gvt:core:" etc categories

On Tue, Sep 7, 2021 at 9:14 AM Tvrtko Ursulin wrote: > > > On 06/09/2021 18:41, jim.cro...@gmail.com wrote: > > On Mon, Sep 6, 2021 at 6:26 AM Tvrtko Ursulin > > mailto:tvrtko.ursu...@linux.intel.com>> > > wrote: > > > > > > > > > On 03/09/2021 20:22, jim.cro...@gmail.com > >

Re: [RFC][PATCH] drm/amdgpu/powerplay/smu10: Add custom profile

On Tue, Sep 7, 2021 at 4:53 AM Daniel Gomez wrote: > > Add custom power profile mode support on smu10. > Update workload bit list. > --- > > Hi, > > I'm trying to add custom profile for the Raven Ridge but not sure if > I'd need a different parameter than PPSMC_MSG_SetCustomPolicy to > configure t

[PATCH 7/8] drm/i915/xehp: Enable ccs/dual-ctx in RCU_MODE

We have to specify in the Render Control Unit Mode register when CCS is enabled. Bspec: 46034 Original-patch-by: Michel Thierry Cc: Daniele Ceraolo Spurio Cc: Tvrtko Ursulin Cc: Vinay Belgaumkar Signed-off-by: Daniele Ceraolo Spurio Signed-off-by: Aravind Iddamsetty Signed-off-by: Matt Roper

[PATCH 6/8] drm/i915/xehp: Define context scheduling attributes in lrc descriptor

In Dual Context mode the EUs are shared between render and compute command streamers. The hardware provides a field in the lrc descriptor to indicate the prioritization of the thread dispatch associated to the corresponding context. The context priority is set to 'low' at creation time and relies

[PATCH 4/8] drm/i915/xehp: CCS should use RCS setup functions

The compute engine handles the same commands the render engine can (except 3D pipeline), so it makes sense that CCS is more similar to RCS than non-render engines. The CCS context state (lrc) is also similar to the render one, so reuse it. Note that the compute engine has its own CTX_R_PWR_CLK_STA

[PATCH 2/8] drm/i915/xehp: CCS shares the render reset domain

The reset domain is shared between render and all compute engines, so resetting one will affect the others. Note: Before performing a reset on an RCS or CCS engine, the GuC will attempt to preempt-to-idle the other non-hung RCS/CCS engines to avoid impacting other clients (since some shared modul

[PATCH 8/8] drm/i915/xehp: Extend uninterruptible OpenCL workloads to CCS

From: John Harrison Now that OpenCL workloads can run on the compute engine, we need to set preempt_timeout_ms = 0 on the CCS engines too. Signed-off-by: John Harrison Signed-off-by: Matt Roper --- drivers/gpu/drm/i915/gt/intel_engine_cs.c | 9 + 1 file changed, 5 insertions(+), 4 del

[PATCH 1/8] drm/i915/xehp: Define compute class and engine

Introduce a Compute Command Streamer (CCS), which has access to the media and GPGPU pipelines (but not the 3D pipeline). To begin with, define the compute class/engine common functions, based on the existing render ones. Bspec: 46167, 45544 Original-patch-by: Michel Thierry Cc: Daniele Ceraolo Sp

[PATCH 5/8] drm/i915/xehp: compute engine pipe_control

From: Daniele Ceraolo Spurio CCS re-uses the RCS functions for breadcrumb and flush emission. However, CCS pipe_control has additional programming restrictions: - Command Streamer Stall Enable must be always set - Post Sync Operations must not be set to Write PS Depth Count - 3D-related bits mus

[PATCH 3/8] drm/i915/xehp: Add Compute CS IRQ handlers

Add execlists and GuC interrupts for compute CS into existing IRQ handlers. All compute command streamers belong to the same compute class, so the only change needed to enable their interrupts is to program their GT engine interrupt mask registers. CCS0 shares the register with CCS1, while CCS2 a

[PATCH 0/8] i915: Introduce Xe_HP compute engines

The Xe_HP architecture introduces compute engines as a new engine class. These compute command streamers (CCS) are similar to the render engine, except that they're intended for GPGPU usage and lack support for the 3D pipeline. The definition of I915_ENGINE_CLASS_COMPUTE is new ABI; see below for

Re: [PATCH] drm/amd/display: make configure_lttpr_mode_transparent and configure_lttpr_mode_non_transparent static

Applied. Thanks! Alex On Mon, Sep 6, 2021 at 5:42 AM Jiapeng Chong wrote: > > From: chongjiapeng > > This symbols is not used outside of dc_link_dp.c, so marks it static. > > Fix the following sparse warning: > > drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_link_dp.c:1766:16: > warning: sy

Re: [PATCH] drm/amd/display: Fix warning comparing pointer to 0

Applied. Thanks! Alex On Mon, Sep 6, 2021 at 5:23 AM Jiapeng Chong wrote: > > From: chongjiapeng > > Fix the following coccicheck warning: > > ./drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c:643:35-36: > WARNING comparing pointer to 0. > > Reported-by: Abaci Robot > Signed-off-

Re: [PATCH] drm/radeon/ci_dpm: Remove redundant initialization of variables hi_sidd, lo_sidd

Applied. Thanks! Alex On Tue, Sep 7, 2021 at 7:09 AM Colin King wrote: > > From: Colin Ian King > > The variables hi_sidd and lo_sidd are being initialized with a values > that are never read, they are being updated later on. The assignments > are redundant and can be removed. > > Addresses-Co

Re: [PATCH] drm/radeon: Prefer kcalloc over open coded arithmetic

Applied. Thanks! Alex On Sat, Sep 4, 2021 at 11:41 AM Len Baker wrote: > > As noted in the "Deprecated Interfaces, Language Features, Attributes, > and Conventions" documentation [1], size calculations (especially > multiplication) should not be performed in memory allocator (or similar) > func

Re: [PATCH][next] drm/amdgpu: sdma: clean up identation

Applied. Thanks! Alex On Fri, Sep 3, 2021 at 2:31 AM Christian König wrote: > > Am 02.09.21 um 23:51 schrieb Colin King: > > From: Colin Ian King > > > > There is a statement that is indented incorrectly. Clean it up. > > > > Signed-off-by: Colin Ian King > > Reviewed-by: Christian König > >

Re: [PATCH][next] drm/amdgpu: clean up inconsistent indenting

Applied. Thanks! Alex On Fri, Sep 3, 2021 at 2:31 AM Christian König wrote: > > Am 02.09.21 um 23:45 schrieb Colin King: > > From: Colin Ian King > > > > There are a couple of statements that are indented one character > > too deeply, clean these up. > > > > Signed-off-by: Colin Ian King > >

[PATCH v2 3/3] drm/etnaviv: use a 32 bit mask as coherent DMA mask

The STLB and the first command buffer (which is used to set up the TLBs) has a 32 bit size restriction in hardware. There seems to be no way to specify addresses larger than 32 bit. Keep it simple and restict the addresses to the lower 4 GiB range for all coherent DMA memory allocations. Please no

[PATCH v2 2/3] drm/etnaviv: fix dma configuration of the virtual device

The DMA configuration of the virtual device is inherited from the first actual etnaviv device. Unfortunately, this doesn't work with an IOMMU: [5.191008] Failed to set up IOMMU for device (null); retaining platform DMA ops This is because there is no associated iommu_group with the device. T

[PATCH v2 1/3] drm/etnaviv: use PLATFORM_DEVID_NONE

There is already a macro for the magic value. Use it. Signed-off-by: Michael Walle Reviewed-by: Christian Gmeiner --- drivers/gpu/drm/etnaviv/etnaviv_drv.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/etnaviv/etnaviv_drv.c b/drivers/gpu/drm/etnaviv/etnavi

[PATCH v2 0/3] drm/etnaviv: IOMMU related fixes

This patch series fixes usage of the etnaviv driver with GPUs behind a IOMMU. It was tested on a NXP LS1028A SoC. Together with Lucas' MMU patches [1] there are not more (GPU internal) MMU nor (system) IOMMU faults on the LS1028A. [1] https://lists.freedesktop.org/archives/etnaviv/2021-August/0036

Re: [PATCH 4/4] dt-bindings: display: mediatek: add MT8195 hdmi bindings

On Tue, Sep 07, 2021 at 09:51:44AM -0500, Rob Herring wrote: > On Tue, 07 Sep 2021 10:37:21 +0200, Guillaume Ranquet wrote: > > Add Mediatek HDMI and HDMI-DDC bindings for MT8195 SoC. > > > > Signed-off-by: Guillaume Ranquet > > --- > > .../mediatek/mediatek,mt8195-hdmi-ddc.yaml| 46

Re: [PATCH v5 08/16] soc: mediatek: add cmdq support of mtk-mmsys config API for mt8195 vdosys1

Hi, Nancy: Nancy.Lin 於 2021年9月6日 週一 下午3:15寫道： > > Add cmdq support for mtk-mmsys config API. > The mmsys config register settings need to take effect with the other > HW settings(like OVL_ADAPTOR...) at the same vblanking time. > > If we use CPU to write the mmsys reg, we can't guarantee all the

Re: [PATCH v5 04/16] dt-bindings: reset: mt8195: add vdosys1 reset control bit

Hi, Nancy: Nancy.Lin 於 2021年9月6日 週一 下午3:15寫道： > > Add vdosys1 reset control bit for MT8195 platform. > > Signed-off-by: Nancy.Lin > --- > include/dt-bindings/reset/mt8195-resets.h | 12 > 1 file changed, 12 insertions(+) > > diff --git a/include/dt-bindings/reset/mt8195-resets.h >

Re: [PATCH v5 03/16] dt-bindings: mediatek: add ethdr definition for mt8195

Hi, Nancy: Nancy.Lin 於 2021年9月6日 週一 下午3:15寫道： > > Add vdosys1 ETHDR definition. > > Signed-off-by: Nancy.Lin > --- > .../display/mediatek/mediatek,ethdr.yaml | 144 ++ > 1 file changed, 144 insertions(+) > create mode 100644 > Documentation/devicetree/bindings/display/med

[PATCH] drm/plane-helper: fix uninitialized variable reference

drivers/gpu/drm/drm_plane_helper.c: In function 'drm_primary_helper_update': drivers/gpu/drm/drm_plane_helper.c:113:32: error: 'visible' is used uninitialized [-Werror=uninitialized] 113 | struct drm_plane_state plane_state = { |^~~ drivers/g

Re: Handling DRM master transitions cooperatively

On Tue, 07 Sep 2021 10:19:03 + Simon Ser wrote: > FWIW, I've just hit a case where a compositor leaves a "rotation" KMS > prop set behind, then Xorg tries to startup and fails because it doesn't > reset this prop. So none of this is theoretical. > > I still think a "reset all KMS props to an

Re: [PATCH] drm/msm: Disable frequency clamping on a630

On Mon 09 Aug 14:08 PDT 2021, Rob Clark wrote: > On Mon, Aug 9, 2021 at 1:35 PM Caleb Connolly > wrote: > > > > > > > > On 09/08/2021 18:58, Rob Clark wrote: > > > On Mon, Aug 9, 2021 at 10:28 AM Akhil P Oommen > > > wrote: > > >> > > >> On 8/9/2021 9:48 PM, Caleb Connolly wrote: > > >>> > > >

Re: [PATCH v2 1/5] dt-bindings: reserved-memory: Document memory region specifier

On Fri, Sep 3, 2021 at 10:36 AM Thierry Reding wrote: > > On Fri, Sep 03, 2021 at 09:36:33AM -0500, Rob Herring wrote: > > On Fri, Sep 3, 2021 at 8:52 AM Thierry Reding > > wrote: > > > > > > On Fri, Sep 03, 2021 at 08:20:55AM -0500, Rob Herring wrote: > > > > On Wed, Sep 1, 2021 at 9:13 AM Thie

Re: [PATCH 8/8] drm/ttm: enable TTM page pool kerneldoc

On Tue, Sep 7, 2021 at 4:01 AM Christian König wrote: > > Fix the remaining warnings and finally enable this. > > Signed-off-by: Christian König Reviewed-by: Alex Deucher > --- > Documentation/gpu/drm-mm.rst | 9 + > include/drm/ttm/ttm_pool.h | 5 +++-- > 2 files changed, 12 insert

Re: [PATCH 7/8] drm/ttm: enable TTM TT object kerneldoc v2

On Tue, Sep 7, 2021 at 4:01 AM Christian König wrote: > > Fix the remaining warnings and finally enable this. > > v2: add caching enum link > > Signed-off-by: Christian König > Reviewed-by: Matthew Auld Reviewed-by: Alex Deucher > --- > Documentation/gpu/drm-mm.rst | 9 + > include/

Re: [PATCH 5/8] drm/ttm: enable TTM resource object kerneldoc v2

On Tue, Sep 7, 2021 at 4:01 AM Christian König wrote: > > Fix the last two remaining warnings and finally enable this. > > v2: add caching enum link > > Signed-off-by: Christian König > Reviewed-by: Matthew Auld Reviewed-by: Alex Deucher > --- > Documentation/gpu/drm-mm.rst | 9 + >

Re: [PATCH 6/8] drm/ttm: enable TTM placement kerneldoc

On Tue, Sep 7, 2021 at 4:01 AM Christian König wrote: > > Fix the last remaining warning and finally enable this. > > Signed-off-by: Christian König > Reviewed-by: Matthew Auld Reviewed-by: Alex Deucher > --- > Documentation/gpu/drm-mm.rst| 6 ++ > include/drm/ttm/ttm_placement.h | 1

Re: [PATCH 4/8] drm/ttm: enable TTM device object kerneldoc

On Tue, Sep 7, 2021 at 4:01 AM Christian König wrote: > > Fix the remaining warnings, switch to inline structure documentation > and finally enable this. > > Signed-off-by: Christian König > Reviewed-by: Matthew Auld > --- > Documentation/gpu/drm-mm.rst | 9 + > include/drm/ttm/ttm_device.

Re: [PATCH 3/8] drm/ttm: add kerneldoc for enum ttm_caching

On Tue, Sep 7, 2021 at 4:01 AM Christian König wrote: > > Briefly describe what this is all about. > > Signed-off-by: Christian König Reviewed-by: Alex Deucher > --- > Documentation/gpu/drm-mm.rst | 3 +++ > include/drm/ttm/ttm_caching.h | 17 + > 2 files changed, 20 inserti

Re: [PATCH 2/8] drm/ttm: add some general module kerneldoc

On Tue, Sep 7, 2021 at 4:01 AM Christian König wrote: > > For now just a brief description of what TTM is all about. > > Signed-off-by: Christian König > --- > Documentation/gpu/drm-mm.rst | 3 ++- > drivers/gpu/drm/ttm/ttm_module.c | 12 > 2 files changed, 14 insertions(+), 1

[PATCH v2] drm/stm: ltdc: add layer alpha support

Android Hardware Composer supports alpha values applied to layers. Enabling non-opaque layers for the STM CRTC could help offload GPU resources for screen composition. Signed-off-by: Raphael Gallais-Pou Acked-by: Yannick Fertre Reviewed-by: Yannick Fertre --- drivers/gpu/drm/stm/ltdc.c | 4 +++

Re: [Intel-gfx] [PATCH v7 3/8] i915/gvt: use DEFINE_DYNAMIC_DEBUG_CATEGORIES to create "gvt:core:" etc categories

On 06/09/2021 18:41, jim.cro...@gmail.com wrote: On Mon, Sep 6, 2021 at 6:26 AM Tvrtko Ursulin mailto:tvrtko.ursu...@linux.intel.com>> wrote: > > > On 03/09/2021 20:22, jim.cro...@gmail.com wrote: > > On Fri, Sep 3, 2021 at 5:07 AM Tvrtko Ursulin > >

[PATCH v2] drm/stm: ltdc: attach immutable zpos property to planes

Defines plane ordering by hard-coding an immutable Z position from the first plane, used as primary layer, to the next ones as overlay in order of instantiation. This zpos is only an information as it is not possible to modify it, blending operations are still applied from the top to the bottom la

[PATCH] drm/stm: ltdc: add layer alpha support

Android Hardware Composer supports alpha values applied to layers. Enabling non-opaque layers for the STM CRTC could help offload GPU resources for screen composition. Signed-off-by: Raphael Gallais-Pou --- drivers/gpu/drm/stm/ltdc.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff

Re: [PATCH] kernel/locking: Add context to ww_mutex_trylock.

Hi Maarten, I love your patch! Perhaps something to improve: [auto build test WARNING on regulator/for-next] [also build test WARNING on tegra-drm/drm/tegra/for-next v5.14] [cannot apply to tip/locking/core linus/master next-20210907] [If your patch is applied to the wrong git tree, kindly drop

Re: [PATCH v2] backlight: propagate errors from get_brightness()

On 2021-09-07T14:10+0100, Daniel Thompson wrote: > On Tue, Sep 07, 2021 at 02:47:51PM +0200, Thomas Weißschuh wrote: > > backlight.h documents "struct backlight_ops->get_brightness()" to return > > a negative errno on failure. > > So far these errors have not been handled in the backlight core. > >

Re: [PATCH 4/4] dt-bindings: display: mediatek: add MT8195 hdmi bindings

On Tue, 07 Sep 2021 10:37:21 +0200, Guillaume Ranquet wrote: > Add Mediatek HDMI and HDMI-DDC bindings for MT8195 SoC. > > Signed-off-by: Guillaume Ranquet > --- > .../mediatek/mediatek,mt8195-hdmi-ddc.yaml| 46 + > .../mediatek/mediatek,mt8195-hdmi.yaml| 99 +

Re: [PATCH 3/4] dt-bindings: phy: Add binding for Mediatek MT8195 HDMI PHY

On Tue, 07 Sep 2021 10:37:20 +0200, Guillaume Ranquet wrote: > Add bindings to describe Mediatek MT8195 HDMI PHY > > Signed-off-by: Guillaume Ranquet > --- > .../phy/mediatek,mtk8195-hdmi-phy.yaml| 71 +++ > 1 file changed, 71 insertions(+) > create mode 100644 > Docume

Re: [Intel-gfx] [PATCH 05/11] drm/i915: Rename i915_gem_context_get_vm_rcu to i915_gem_context_get_eb_vm

On 06/09/2021 09:51, Daniel Vetter wrote: On Fri, Sep 03, 2021 at 09:05:00AM +0100, Tvrtko Ursulin wrote: On 02/09/2021 15:20, Daniel Vetter wrote: The important part isn't so much that this does an rcu lookup - that's more an implementation detail, which will also be removed. The thing tha

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