Fix kernel-doc warnings in gtt.c:
gtt.c:1152: warning: This comment starts with '/**', but isn't a kernel-doc
comment. Refer Documentation/doc-guide/kernel-doc.rst
* Check if can do 2M page
gtt.c:1152: warning: missing initial short description on line:
* Check if can do 2M page
gtt.c:2209: war
On 10/07/2021 00:07, Dmitry Baryshkov wrote:
There is no reason to set clock parents manually, use device tree to
assign DSI/display clock parents to DSI PHY clocks. Dropping this manual
setup allows us to drop repeating code and to move registration of hw
clock providers to generic place.
Signe
On 07/11/2020 06:19, Wang Qing wrote:
a6xx_gmu_get_mmio() never return null in case of error, but ERR_PTR(), so
we should use IS_ERR() instead of null pointer check and IS_ERR_OR_NULL().
Signed-off-by: Wang Qing
As a second thought, ioremap's NULL is converted to ERR_PTR(-EINVAL), so
the pat
On 07/11/2020 06:19, Wang Qing wrote:
a6xx_gmu_get_mmio() never return null in case of error, but ERR_PTR(), so
we should use IS_ERR() instead of null pointer check and IS_ERR_OR_NULL().
Not quite. a6xx_gmu_get_mmio() can return NULL, as it uses ioremap()
internally. And ioremap returns NULL i
TXTAGOCNT and RXTASURECNT bitfields of BTACNTRL1 register are swapped in
the code, correct them. Driver doesn't implement low power mode for now,
so this change doesn't make a practical difference yet.
Tested-by: Andreas Westman Dorcsak # Asus TF700T
Tested-by: Maxim Schwalm #TF700T
Signed-off-b
Non-continuous clock mode doesn't work because driver doesn't support it
properly. The bridge driver programs wrong bitfields that are required by
the non-continuous mode (BTACNTRL1 register bitfields are swapped in the
code), but fixing them doesn't help.
Display panel of ASUS Transformer TF700T
Calculate video start delay based on the display timing instead
of hardcoding it to a default value. This fixes "trembling" display
output on Asus Transformer TF700T which uses Panasonic VVX10F004B00
display panel.
Tested-by: Andreas Westman Dorcsak # Asus TF700T
Tested-by: Maxim Schwalm #TF700T
Support pulse-mode synchronization which is supported and used by simple
DSI panels like Panasonic VVX10F004B00.
Tested-by: Andreas Westman Dorcsak # Asus TF700T
Tested-by: Maxim Schwalm #TF700T
Signed-off-by: Dmitry Osipenko
---
drivers/gpu/drm/bridge/tc358768.c | 66 ++---
The driver assumes that reference clock is always-enabled, but this is
hardware-dependent and not true for ASUS Transformer TF700T. Make driver
enable / disable the reference clock.
Tested-by: Andreas Westman Dorcsak # Asus TF700T
Tested-by: Maxim Schwalm #TF700T
Signed-off-by: Dmitry Osipenko
This series adds couple improvements to the TC358768 DSI bridge driver,
enabling Panasonic VVX10F004B00 DSI panel support. This panel is used by
ASUS Transformer TF700T tablet, which is ready for upstream kernel and
display panel support is the biggest missing part.
Dmitry Osipenko (5):
drm/brid
On 21/10/02 09:13AM, Fernando Ramos wrote:
>
> Sean, could you revert the whole patch series? I'll have a deeper look into
> the
> patch set and come up with a v3 where all these issues will be addressed.
>
Hi Sean,
I now understand the nature of the issue that caused the problem with i915 and
On Tue, Sep 28, 2021 at 10:44 AM Thomas Zimmermann wrote:
>
> struct gtt_range represents a GEM object. Rename the structure to struct
> psb_gem_object and update all users. No functional changes.
>
> Signed-off-by: Thomas Zimmermann
Acked-by: Patrik Jakobsson
> ---
> drivers/gpu/drm/gma500/
On Tue, Sep 28, 2021 at 10:44 AM Thomas Zimmermann wrote:
>
> struct gtt_range represents a GEM object and should not be used for GTT
> setup. Change psb_gtt_insert() and psb_gtt_remove() to receive all
> necessary parameters from their caller. This also eliminates possible
> failure from psb_gtt_
On Tue, Sep 28, 2021 at 10:44 AM Thomas Zimmermann wrote:
>
> Caching of the GEM object's backing pages are unrelated to GTT
> management. Move the respective calls from GTT code to GEM code.
>
> Signed-off-by: Thomas Zimmermann
> ---
> drivers/gpu/drm/gma500/gem.c | 9 -
> drivers/gpu/
On Tue, Sep 28, 2021 at 10:44 AM Thomas Zimmermann wrote:
>
> psb_gtt_alloc_range() allocates struct gtt_range, create the GTT resource
> and performs some half-baked initialization. Inline the function into its
> only caller psb_gem_create(). For creating the GTT resource, introduce a
> new helpe
On Tue, Sep 28, 2021 at 10:44 AM Thomas Zimmermann wrote:
>
> psb_gtt_attach_pages() are not GTT functions but deal with the GEM
> object's SHMEM pages. The only callers of psb_gtt_attach_pages() and
> psb_gtt_detach_pages() are the GEM pin helpers. Inline the calls and
> cleanup the resulting cod
On Tue, Sep 28, 2021 at 10:44 AM Thomas Zimmermann wrote:
>
> Rename psb_gtt_pin() to psb_gem_pin() to reflect the semantics of the
> function. Same for psb_gtt_unpin(). No functional changes.
Acked-by: Patrik Jakobsson
>
> Signed-off-by: Thomas Zimmermann
> ---
> drivers/gpu/drm/gma500/gem.
On Tue, Sep 28, 2021 at 10:44 AM Thomas Zimmermann wrote:
>
> Support private objects for stolen memory in psb_gem_create() and
> convert users to psb_gem_create(). For stolen memory, psb_gem_create()
> now initializes the GEM object via drm_gem_private_object_init().
>
> In the fbdev setup, repla
On Tue, Sep 28, 2021 at 10:44 AM Thomas Zimmermann wrote:
>
> Implement psb_gem_create() for general use. Create the GEM handle in
> psb_gem_create_dumb(). Allows to use psb_gem_create() for creating all
> of the GEM objects.
>
> While at it, clean-up drm_gem_dumb_create() to make it more readable
On Tue, Sep 28, 2021 at 10:44 AM Thomas Zimmermann wrote:
>
> Convert upcasts from struct drm_gem_object to struct gtt_range to
> to_gtt_range(). Some places used container_of() directly.
>
> Signed-off-by: Thomas Zimmermann
Acked-by: Patrik Jakobsson
> ---
> drivers/gpu/drm/gma500/gem.c
On Tue, Sep 28, 2021 at 10:44 AM Thomas Zimmermann wrote:
>
> Allocation and pinning helpers for struct gtt_range are GEM functions,
> so move them to gem.c. No functional changes.
>
> Signed-off-by: Thomas Zimmermann
> ---
> drivers/gpu/drm/gma500/framebuffer.c | 1 -
> drivers/gpu/drm/
01.10.2021 15:32, Ulf Hansson пишет:
>> +static __maybe_unused int tegra_clock_pm_suspend(struct device *dev)
>> +{
>> + struct tegra_clk_device *clk_dev = dev_get_drvdata(dev);
>> +
>> + /*
>> +* Power management of the clock is entangled with the Tegra PMC
>> +* GENPD
The model and make of the LCD panel of the Vivax TPC-9150 is unknown,
hence the panel settings that were retrieved with a FEX dump are named
after the device NOT the actual panel.
The LCD in question is a 50 pin MISO TFT LCD panel of the resolution
1024x600 used by the aforementioned device.
Vers
On 02/11/2020 15:50, Bernard Zhao wrote:
Delete the conversion from bool value to bool function return.
Signed-off-by: Bernard Zhao
Reviewed-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/
On 31/12/2020 12:56, Xu Wang wrote:
Because clk_prepare_enable() and clk_disable_unprepare() already checked
NULL clock parameter, so the additional checks are unnecessary, just
remove them.
Signed-off-by: Xu Wang
Reviewed-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/dsi/dsi_host.c | 15
On 31/12/2020 12:49, Xu Wang wrote:
Because clk_prepare_enable() and clk_disable_unprepare() already checked
NULL clock parameter, so the additional checks are unnecessary, just
remove them.
Signed-off-by: Xu Wang
Reviewed-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c
On 31/12/2020 12:41, Xu Wang wrote:
Because clk_prepare_enable() and clk_disable_unprepare() already checked
NULL clock parameter, so the additional checks are unnecessary, just
remove them.
Signed-off-by: Xu Wang
Reviewed-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c
First argument of cx_debugbus_read() should be 'void __iomem *' rather
than 'void * __iomem' to make sparse happy.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/adreno/a6xx_g
On 21/10/02 09:13AM, Fernando Ramos wrote:
> On 21/10/02 05:30AM, Ville Syrjälä wrote:
> > On Sat, Oct 02, 2021 at 01:05:47AM +0300, Ville Syrjälä wrote:
> > > On Fri, Oct 01, 2021 at 04:48:15PM -0400, Sean Paul wrote:
> > > > On Fri, Oct 01, 2021 at 10:00:50PM +0300, Ville Syrjälä wrote:
> > > > >
Hi,
On 10/1/21 6:33 PM, Simon Ser wrote:
> On Wednesday, September 22nd, 2021 at 11:21, Hans de Goede
> wrote:
>
>> I would be happy to work on the plymouth side of this, so that we
>> have at least one consumer of such a flag lined up for merging.
>
> Do you have plans to work on the kernel s
On Sat, Oct 2, 2021 at 5:17 AM Steven Rostedt wrote:
>
> On Sat, 2 Oct 2021 03:17:29 -0700 (PDT)
> Hugh Dickins wrote:
>
> > Yes (though bisection doesn't work right on this one): the fix
>
> Interesting, as it appeared to be very reliable. But I didn't do the
> "try before / after" on the patch.
Factor the extended hotkey handling out of hotkey_notify_hotkey() and
into a new hotkey_notify_extended_hotkey() helper.
This is a preparation patch for adding support the privacy-screen hotkey
toggle (which needs some special handling, it should NOT send an evdev
key-event to userspace...).
Revi
Register a privacy-screen device on laptops with a privacy-screen,
this exports the PrivacyGuard features to user-space using a
standardized vendor-agnostic sysfs interface. Note the sysfs interface
is read-only.
Registering a privacy-screen device with the new privacy-screen class
code will also
The upcoming privacy-screen support adds another check for
deferring probe till some other drivers have bound first.
Factor out the current vga_switcheroo_client_probe_defer() check
into an intel_modeset_probe_defer() helper, so that further
probe-deferral checks can be added there.
Signed-off-by
Add support for eDP panels with a built-in privacy screen using the
new drm_privacy_screen class.
Changes in v2:
- Call drm_connector_update_privacy_screen() from
intel_enable_ddi_dp() / intel_ddi_update_pipe_dp() instead of adding a
for_each_new_connector_in_state() loop to intel_atomic_commi
Get the privacy-screen / lcdshadow ACPI handles once and cache them,
instead of retrieving them every time we need them.
Reviewed-by: Emil Velikov
Reviewed-by: Lyude Paul
Signed-off-by: Hans de Goede
---
drivers/platform/x86/thinkpad_acpi.c | 18 --
1 file changed, 8 insertions
Add 2 drm_connector privacy-screen helper functions:
1. drm_connector_attach_privacy_screen_provider(), this function creates
and attaches the standard privacy-screen properties and registers a
generic notifier for generating sysfs-connector-status-events on external
changes to the privacy-screen
Add support for privacy-screen consumers to register a notifier to
be notified of external (e.g. done by the hw itself on a hotkey press)
state changes.
Changes in v2:
- Drop WARN_ON(mutex_is_locked(&priv->lock)) check in
drm_privacy_screen_call_notifier_chain() it may be locked by
another thr
Add X86 specific arch init code, which fills the privacy-screen lookup
table by checking for various vendor specific ACPI interfaces for
controlling the privacy-screen.
This initial version only checks for the Lenovo Thinkpad specific ACPI
methods for privacy-screen control.
Reviewed-by: Emil Vel
From: Rajat Jain
Add support for generic electronic privacy screen properties, that
can be added by systems that have an integrated EPS.
Changes in v2 (Hans de Goede)
- Create 2 properties, "privacy-screen sw-state" and
"privacy-screen hw-state", to deal with devices where the OS might be
lo
On some new laptops the LCD panel has a builtin electronic privacy-screen.
We want to export this functionality as a property on the drm connector
object. But often this functionality is not exposed on the GPU but on some
other (ACPI) device.
This commit adds a privacy-screen class allowing the dr
Hi all,
Here is a new version of my privacy-screen series, addressing the
(few) review-remarks from the version posted on September 6th.
This new version contains the following changes:
- drm: Add privacy-screen class (v4)
- Make drm_privacy_screen_set_sw_state() skip calling out to the hw if
From: Sean Paul
This reverts commit 21dde40902d2636f70766b3154931de57e1215e9.
This patchset breaks on intel platforms and was previously NACK'd by
Ville.
Cc: Ville Syrjälä
Cc: Fernando Ramos
Signed-off-by: Sean Paul
---
drivers/gpu/drm/drm_client_modeset.c | 9 ++---
1 file changed, 6 i
From: Sean Paul
This reverts commit 399190e70816886e2bca1f3f3bc3d9c544af88e7.
This patchset breaks on intel platforms and was previously NACK'd by
Ville.
Cc: Ville Syrjälä
Cc: Fernando Ramos
Signed-off-by: Sean Paul
---
drivers/gpu/drm/i915/display/intel_display.c | 18 +-
1
From: Sean Paul
This reverts commit 7c5f2eecc21f44fba1b1f13ce09c2533db9d781a.
This patchset breaks on intel platforms and was previously NACK'd by
Ville.
Cc: Ville Syrjälä
Cc: Fernando Ramos
Signed-off-by: Sean Paul
---
drivers/gpu/drm/drm_client_modeset.c | 5 ++---
drivers/gpu/drm/drm_cr
From: Sean Paul
This reverts commit 4c048437ef7adb2d81fe4ddc5c04179126eefcf2.
This patchset breaks on intel platforms and was previously NACK'd by
Ville.
Cc: Ville Syrjälä
Cc: Fernando Ramos
Signed-off-by: Sean Paul
---
drivers/gpu/drm/msm/disp/msm_disp_snapshot_util.c | 12 ++--
1
From: Sean Paul
This reverts commit 6b92e77156c5adf6606c8ad825c71404417d88af.
This patchset breaks on intel platforms and was previously NACK'd by
Ville.
Cc: Ville Syrjälä
Cc: Fernando Ramos
Signed-off-by: Sean Paul
---
drivers/gpu/drm/vmwgfx/vmwgfx_ioctl.c | 11 ---
drivers/gpu/drm
From: Sean Paul
This reverts commit a2cd9947d99b54c959fce20dc19d81af53f4674e.
This patchset breaks on intel platforms and was previously NACK'd by
Ville.
Cc: Ville Syrjälä
Cc: Fernando Ramos
Signed-off-by: Sean Paul
---
drivers/gpu/drm/tegra/dsi.c | 6 ++
drivers/gpu/drm/tegra/hdmi.c
From: Sean Paul
This reverts commit 9b8c437ef1a5f34686fc96b391c201a80f1a2ea0.
This patchset breaks on intel platforms and was previously NACK'd by
Ville.
Cc: Ville Syrjälä
Cc: Fernando Ramos
Signed-off-by: Sean Paul
---
drivers/gpu/drm/shmobile/shmob_drm_drv.c | 6 ++
1 file changed, 2
From: Sean Paul
This reverts commit 26723c3d6b930775f9a85521d09655c533a839e6.
This patchset breaks on intel platforms and was previously NACK'd by
Ville.
Cc: Ville Syrjälä
Cc: Fernando Ramos
Signed-off-by: Sean Paul
---
drivers/gpu/drm/radeon/radeon_device.c | 21 ++---
driv
From: Sean Paul
This reverts commit 6067fddc1a4fdf155787ab6182c192e4b360b73c.
This patchset breaks on intel platforms and was previously NACK'd by
Ville.
Cc: Ville Syrjälä
Cc: Fernando Ramos
Signed-off-by: Sean Paul
---
drivers/gpu/drm/omapdrm/omap_fb.c | 9 +++--
1 file changed, 3 inse
From: Sean Paul
This reverts commit 6aa2daae589b63e8b39fe6f7f2b59fb3063efa05.
This patchset breaks on intel platforms and was previously NACK'd by
Ville.
Cc: Ville Syrjälä
Cc: Fernando Ramos
Signed-off-by: Sean Paul
---
drivers/gpu/drm/nouveau/dispnv50/disp.c | 15 +--
1 file ch
From: Sean Paul
This reverts commit fd49ef52e2db015ce69ad02bab0702489d141a41.
This patchset breaks on intel platforms and was previously NACK'd by
Ville.
Cc: Ville Syrjälä
Cc: Fernando Ramos
Signed-off-by: Sean Paul
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 10 --
1 file change
From: Sean Paul
This reverts commit 746826bcf8fdf682668ff1c415d6b91dbf5858be.
This patchset breaks on intel platforms and was previously NACK'd by
Ville.
Cc: Ville Syrjälä
Cc: Fernando Ramos
Signed-off-by: Sean Paul
---
drivers/gpu/drm/i915/display/intel_audio.c| 16 +++
drivers/gpu
From: Sean Paul
This reverts commit 984c9949f1c4cf36c35aa2de5ee2b65c39379fd9.
This patchset breaks on intel platforms and was previously NACK'd by
Ville.
Cc: Ville Syrjälä
Cc: Fernando Ramos
Signed-off-by: Sean Paul
---
drivers/gpu/drm/i915/display/intel_overlay.c | 40 ++--
From: Sean Paul
This reverts commit 4f9e860e6ad65ff4ea8ce165a1407d96ff1b2211.
This patchset breaks on intel platforms and was previously NACK'd by
Ville.
Cc: Ville Syrjälä
Cc: Fernando Ramos
Signed-off-by: Sean Paul
---
drivers/gpu/drm/gma500/psb_device.c | 18 ++
1 file cha
From: Sean Paul
This reverts commit 299f040e855b69c29522cde446777902381a07f5.
This patchset breaks on intel platforms and was previously NACK'd by
Ville.
Cc: Ville Syrjälä
Cc: Fernando Ramos
Signed-off-by: Sean Paul
---
drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 21 +++-
.../gpu/dr
From: Sean Paul
This reverts commit 8d813d1a535c8c7503a5f4061654a73026be8c5e.
This patchset breaks on intel platforms and was previously NACK'd by
Ville.
Cc: Ville Syrjälä
Cc: Fernando Ramos
Signed-off-by: Sean Paul
---
drivers/gpu/drm/drm_modeset_lock.c | 94 +-
On Fri, Oct 01, 2021 at 04:34:34PM -0400, Sean Paul wrote:
> On Wed, Sep 29, 2021 at 03:39:25PM -0400, Mark Yacoub wrote:
> > From: Mark Yacoub
> >
> > [Why]
> > 1. drm_atomic_helper_check doesn't check for the LUT sizes of either Gamma
> > or Degamma props in the new CRTC state, allowing any inv
Am 2021-09-07 18:49, schrieb Michael Walle:
This patch series fixes usage of the etnaviv driver with GPUs behind a
IOMMU. It was tested on a NXP LS1028A SoC. Together with Lucas' MMU
patches
[1] there are not more (GPU internal) MMU nor (system) IOMMU faults on
the
LS1028A.
[1]
https://lists
On Sat, 2 Oct 2021 03:17:29 -0700 (PDT)
Hugh Dickins wrote:
> Yes (though bisection doesn't work right on this one): the fix
Interesting, as it appeared to be very reliable. But I didn't do the
"try before / after" on the patch.
> https://lore.kernel.org/lkml/1f955bff-fd9e-d2ee-132a-f758add9e..
Hi Lyude,
On 10/2/21 12:53 AM, Lyude Paul wrote:
> When I originally moved all of the VESA backlight code in i915 into DRM
> helpers, one of the things I didn't have the hardware or time for
> testing was machines that used a combination of PWM and DPCD in order to
> control their backlights. This
Signed-off-by: Bryant Mairs
---
drivers/gpu/drm/drm_panel_orientation_quirks.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/drm_panel_orientation_quirks.c
b/drivers/gpu/drm/drm_panel_orientation_quirks.c
index f6bdec7fa925..30c17a76f49a 100644
--- a/drivers/gpu/drm/d
On 21/10/02 05:30AM, Ville Syrjälä wrote:
> On Sat, Oct 02, 2021 at 01:05:47AM +0300, Ville Syrjälä wrote:
> > On Fri, Oct 01, 2021 at 04:48:15PM -0400, Sean Paul wrote:
> > > On Fri, Oct 01, 2021 at 10:00:50PM +0300, Ville Syrjälä wrote:
> > > > On Fri, Oct 01, 2021 at 02:36:55PM -0400, Sean Paul
64 matches
Mail list logo
