On 18-01-22, 19:50, Rob Herring wrote:
> The 'phandle-array' type is a bit ambiguous. It can be either just an
> array of phandles or an array of phandles plus args. Many schemas for
> phandle-array properties aren't clear in the schema which case applies
> though the description usually describes
On 19/01/2022 02:53, Rob Herring wrote:
> For a single pinctrl mode, it is not necessary to define pinctrl
> properties as the tools always allow pinctrl properties.
>
> Signed-off-by: Rob Herring
> ---
> .../display/rockchip/rockchip,rk3066-hdmi.yaml | 8
> Documentation/devic
On 19/01/2022 02:50, Rob Herring wrote:
> The 'phandle-array' type is a bit ambiguous. It can be either just an
> array of phandles or an array of phandles plus args. Many schemas for
> phandle-array properties aren't clear in the schema which case applies
> though the description usually describes
On 19.01.2022 03:37, Liu Ying wrote:
The D-PHY specification (v1.2) explicitly mentions that the T-CLK-PRE
parameter's unit is Unit Interval(UI) and the minimum value is 8. Also,
kernel doc of the 'clk_pre' member of struct phy_configure_opts_mipi_dphy
mentions that it should be in UI. Howeve
linux/string_helpers.h provides a helper to return "yes"/"no"
strings. Replace the open coded versions with yesno(). The places were
identified with the following semantic patch:
@@
expression b;
@@
- b ? "yes" : "no"
+ yesno(b)
Then the includes were adde
There are a few implementations of yesno() in the tree. Consolidate them
in include/linux/string_helpers.h. Quite a few users of open coded
yesno() could later be converted to the new function:
$ git grep '?\s*"yes"\s*' | wc -l
286
$ git grep '?\s*"no"\s*' | wc -l
20
The inlined function should
Follow the yes/no logic and add helpers for enabled/disabled and
enable/disable - those are not so common throughout the kernel,
but they give a nice way to reuse the strings to log things as
enabled/disabled or enable/disable.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/i915_utils.h
Add some helpers under lib/string_helpers.h so they can be used
throughout the kernel. When I started doing this there were 2 other
previous attempts I know of, not counting the iterations each of them
had:
1) https://lore.kernel.org/all/20191023131308.9420-1-jani.nik...@intel.com/
2)
https://lor
Am 18.01.22 um 11:44 schrieb Arunpravin:
Move the base i915 buddy allocator code into drm
- Move i915_buddy.h to include/drm
- Move i915_buddy.c to drm root folder
- Rename "i915" string with "drm" string wherever applicable
- Rename "I915" string with "DRM" string wherever applicable
- Fix heade
Quoting Tvrtko Ursulin (2022-01-17 18:02:50)
>
> On 17/01/2022 15:09, Andi Shyti wrote:
> > The GT has its own properties and in sysfs they should be grouped
> > in the 'gt/' directory.
> >
> > Create a 'gt/' directory in sysfs which will contain gt0...gtN
> > directories related to each tile con
Hi Paul,
> Am 18.01.2022 um 23:59 schrieb Paul Boddie :
>
> On Tuesday, 18 January 2022 17:58:58 CET Paul Cercueil wrote:
>>
>> Not at all. If the clock is disabled, the LCD controller is disabled,
>> so all the registers read zero, this makes sense. You can only read the
>> registers when the c
On Wed, Jan 19, 2022 at 4:18 AM Brian Norris wrote:
>
> Hi Chen-Yu,
>
> On Mon, Jan 17, 2022 at 05:01:52PM +0800, Chen-Yu Tsai wrote:
> > On Sat, Jan 15, 2022 at 7:03 AM Brian Norris
> > wrote:
> > >
> > > Now that the cdn-dp driver supports plug-change callbacks, let's wire it
> > > up.
> > >
>
pm_runtime_get_sync() will increase the rumtime PM counter
even it returns an error. Thus a pairing decrement is needed
to prevent refcount leak. Fix this by replacing this API with
pm_runtime_resume_and_get(), which will not change the runtime
PM counter on error.
Signed-off-by: Yongzhi Liu
---
Hi,
22. 1. 17. 오후 6:55에 Robert Foss 이(가) 쓴 글:
> Hi Inki,
>
> On Fri, 14 Jan 2022 at 02:18, Inki Dae wrote:
>>
>> Hi Robert,
>>
>> 22. 1. 12. 오후 7:05에 Robert Foss 이(가) 쓴 글:
>>> Thank you again for catching this and submitting a revert.
>>>
>>> Reviewed-by: Robert Foss >>
>>> Applied to drm-misc-n
pm_runtime_get_sync() will increase the rumtime PM counter
even it returns an error. Thus a pairing decrement is needed
to prevent refcount leak. Fix this by replacing this API with
pm_runtime_resume_and_get(), which will not change the runtime
PM counter on error.
Signed-off-by: Yongzhi Liu
---
pm_runtime_get_sync() will increase the rumtime PM counter
even it returns an error. Thus a pairing decrement is needed
to prevent refcount leak. Fix this by replacing this API with
pm_runtime_resume_and_get(), which will not change the runtime
PM counter on error.
Signed-off-by: Yongzhi Liu
---
On Wed, 19 Jan 2022 02:08:38 +0530, Rajeev Nandan wrote:
> In most cases, the default values of DSI PHY tuning registers should be
> sufficient as they are fully optimized. However, in some cases where
> extreme board parasitics cause the eye shape to degrade, the override
> bits can be used to imp
On Tue, 18 Jan 2022 16:47:34 +0100, Loic Poulain wrote:
> QCM2290 MSM Mobile Display Subsystem (MDSS) encapsulates sub-blocks
> like DPU display controller, DSI etc. Add YAML schema for DPU device
> tree bindings
>
> Signed-off-by: Loic Poulain
> ---
> .../bindings/display/msm/dpu-qcm2290.yaml
On 11/25/2021 6:35 PM, Dmitry Baryshkov wrote:
DPU driver contains code to parse clock items from device tree into
special data struct and then enable/disable/set rate for the clocks
using that data struct. However the DPU driver itself uses only parsing
and enabling/disabling part (the rate sett
The D-PHY specification (v1.2) explicitly mentions that the T-CLK-PRE
parameter's unit is Unit Interval(UI) and the minimum value is 8. Also,
kernel doc of the 'clk_pre' member of struct phy_configure_opts_mipi_dphy
mentions that it should be in UI. However, the dphy core driver wrongly
sets 'clk
On 2022/01/18 18:53, Andy Shevchenko wrote:
On Mon, Jan 17, 2022 at 02:15:48PM +0900, Esaki Tomohito wrote:
On 2022/01/14 23:16, Andy Shevchenko wrote:
On Fri, Jan 14, 2022 at 07:17:52PM +0900, Tomohito Esaki wrote:
The LINEAR modifier is advertised as default if a driver doesn't specify
modif
On Tue, 2022-01-18 at 20:00 +0100, Javier Martinez Canillas wrote:
> Hello Zack,
>
> On 1/17/22 19:03, Zack Rusin wrote:
> > From: Zack Rusin
> >
> > When sysfb_simple is enabled loading vmwgfx fails because the regions
> > are held by the platform. In that case
> > remove_conflicting*_framebuff
On Tue, 2022-01-18 at 20:58 -0500, Lyude Paul wrote:
> Hey - so, the original issue here was that payloads were not always deleted
> when we expected them to be - correct?
>
> If I'm remembering that correctly, then (and I'm not 100% sure on this yet)
> I
> might already have noticed something ver
Hey - so, the original issue here was that payloads were not always deleted
when we expected them to be - correct?
If I'm remembering that correctly, then (and I'm not 100% sure on this yet) I
might already have noticed something very possibly wonky in how we handle
payload allocations currently,
For a single pinctrl mode, it is not necessary to define pinctrl
properties as the tools always allow pinctrl properties.
Signed-off-by: Rob Herring
---
.../display/rockchip/rockchip,rk3066-hdmi.yaml | 8
Documentation/devicetree/bindings/input/gpio-keys.yaml | 6 --
.../d
The 'phandle-array' type is a bit ambiguous. It can be either just an
array of phandles or an array of phandles plus args. Many schemas for
phandle-array properties aren't clear in the schema which case applies
though the description usually describes it.
The array of phandles case boils down to n
On 1/18/2022 13:43, Matthew Brost wrote:
Now that the error capture is fully decoupled from fence signalling
(request retirement to free memory, which is turn depends on resets) we
s/is/in/
With that fixed:
Reviewed-by: John Harrison
John.
can safely flush the G2H handler during a GT reset.
On 1/18/2022 13:43, Matthew Brost wrote:
The G2H handler needs to be flushed during a GT reset but a G2H
indicating engine reset failure can trigger a GT reset. Add a worker to
trigger the GT when a engine reset failure is received to break this
s/a/an/
circular dependency.
Signed-off-by: Mat
On 1/18/2022 13:43, Matthew Brost wrote:
Allocate intel_engine_coredump_alloc with ALLOW_FAIL rather than
GFP_KERNEL do fully decouple the error capture from fence signalling.
s/do/to/
Fixes: 8b91cdd4f8649 ("drm/i915: Use __GFP_KSWAPD_RECLAIM in the capture code")
Does this really count as a
On 1/12/2022 21:59, Matthew Brost wrote:
Realized that the GuC multi-lrc fini breadcrumb emit code is very
delicate as the math this code does relies on functions it calls to emit
a certain number of DWs. Add a few GEM_BUG_ONs to assert the math is
correct.
Signed-off-by: Matthew Brost
Looks go
one>
On 2021-08-17 20:30, abhin...@codeaurora.org wrote:
On 2021-06-17 15:20, Dmitry Baryshkov wrote:
DPU interrupts code allows multiple callbacks per interrut. In reality
/interrupt
none of the interrupts is shared between blocks (and will probably
never
be). Drop support for registering m
Per VESA DisplayID Standard v2.0: Type VII Timing – Detailed Timing Data
Definitions were already provided as type I, but not used
Signed-off-by: Yaroslav Bolyukin
---
drivers/gpu/drm/drm_edid.c | 26 +-
include/drm/drm_displayid.h | 6 +++---
2 files changed, 20 inser
pm_runtime_get_sync() increments the runtime PM usage counter even
when it returns an error code, thus a matching decrement is needed
on the error handling path to keep the counter balanced.
Signed-off-by: Yongzhi Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c | 4 +++-
1 file changed, 3 in
Add support for MSM DSI PHY tuning configuration. Current design is
to support drive strength and drive level/amplitude tuning for
10nm PHY version, but this can be extended to other PHY versions.
Signed-off-by: Rajeev Nandan
---
Changes in v2:
- New.
- Split into generic code and 10nm-specifi
This series is to add DSI PHY tuning support in Qualcomm Snapdragon
SoCs with 10nm DSI PHY e.g. SC7180
In most cases the default values of DSI PHY tuning registers
should be sufficient as they are fully optimized. However, in
some cases (for example, where extreme board parasitics cause
the eye sh
DSI device attach to DSI host will be done with host device's lock
held.
Un-registering host in "device attach" error path (ex: probe retry)
will result in deadlock with below call trace and non operational
DSI display.
Startup Call trace:
[ 35.043036] rt_mutex_slowlock.constprop.21+0x184/0x1b
pm_runtime_get_sync() will increase the rumtime PM counter
even it returns an error. Thus a pairing decrement is needed
to prevent refcount leak. Fix this by replacing this API with
pm_runtime_resume_and_get(), which will not change the runtime
PM counter on error.
Signed-off-by: Yongzhi Liu
---
In most cases, the default values of DSI PHY tuning registers should be
sufficient as they are fully optimized. However, in some cases where
extreme board parasitics cause the eye shape to degrade, the override
bits can be used to improve the signal quality.
The general guidelines for DSI PHY tuni
Hello,
syzbot found the following issue on:
HEAD commit:a33f5c380c4b Merge tag 'xfs-5.17-merge-3' of git://git.ker..
git tree: upstream
console output: https://syzkaller.appspot.com/x/log.txt?x=17c4eb7fb0
kernel config: https://syzkaller.appspot.com/x/.config?x=dc846445c1d2060e
das
pm_runtime_get_sync() increments the runtime PM usage counter even
when it returns an error code, thus a matching decrement is needed
on the error handling path to keep the counter balanced.
Signed-off-by: Yongzhi Liu
---
drivers/gpu/drm/etnaviv/etnaviv_gpu.c | 3 +++
1 file changed, 3 insertion
The clock and data lanes of the DSI PHY have a calibration circuitry
feature. As per the MSM DSI PHY tuning guidelines, the drive strength
tuning can be done by adjusting rescode offset for hstop/hsbot, and
the drive level tuning can be done by adjusting the LDO output level
for the HSTX drive.
Si
On Tuesday, 18 January 2022 17:58:58 CET Paul Cercueil wrote:
>
> Not at all. If the clock is disabled, the LCD controller is disabled,
> so all the registers read zero, this makes sense. You can only read the
> registers when the clock is enabled. On some SoCs, reading disabled
> registers can ev
On 1/18/22 20:00, Javier Martinez Canillas wrote:
> Hello Zack,
>
> On 1/17/22 19:03, Zack Rusin wrote:
>> From: Zack Rusin
>>
>> When sysfb_simple is enabled loading vmwgfx fails because the regions
>> are held by the platform. In that case remove_conflicting*_framebuffers
>> only removes the si
Allocate intel_engine_coredump_alloc with ALLOW_FAIL rather than
GFP_KERNEL do fully decouple the error capture from fence signalling.
Fixes: 8b91cdd4f8649 ("drm/i915: Use __GFP_KSWAPD_RECLAIM in the capture code")
Signed-off-by: Matthew Brost
---
drivers/gpu/drm/i915/i915_gpu_error.c | 2 +-
1
The G2H handler needs to be flushed during a GT reset but a G2H
indicating engine reset failure can trigger a GT reset. Add a worker to
trigger the GT when a engine reset failure is received to break this
circular dependency.
Signed-off-by: Matthew Brost
---
drivers/gpu/drm/i915/gt/uc/intel_guc.
Now that the error capture is fully decoupled from fence signalling
(request retirement to free memory, which is turn depends on resets) we
can safely flush the G2H handler during a GT reset. This is eliminates
corner cases where GuC generated G2H (e.g. engine resets) race with a GT
reset.
Signed-
After a small fix to error capture code, we now can flush G2H during a
GT reset which simplifies code and seals some extreme corner case races.
v2:
(CI)
- Don't trigger GT reset from G2H handler
Signed-off-by: Matthew Brost
Matthew Brost (3):
drm/i915: Allocate intel_engine_coredump_alloc
Quoting Kuogee Hsieh (2022-01-18 10:47:25)
> Current DP drivers have regulators, clocks, irq and phy are grouped
> together within a function and executed not in a symmetric manner.
> This increase difficulty of code maintenance and limited code scalability.
> This patch divides the driver life cyc
On Tue, Jan 18, 2022 at 01:11:48PM -0600, Gustavo A. R. Silva wrote:
>
>
> On 1/5/22 11:35, Kees Cook wrote:
> > The link_status array was not large enough to read the Adjust Request
> > Post Cursor2 register, so remove the common helper function to avoid
> > an OOB read, found with a -Warray-bou
On 1/18/2022 12:01 PM, Dmitry Baryshkov wrote:
On Tue, 18 Jan 2022 at 22:41, Abhinav Kumar wrote:
On 12/7/2021 2:29 PM, Dmitry Baryshkov wrote:
Currently the DSI driver has two separate paths: one if the next device
in a chain is a bridge and another one if the panel is connected
directl
Applied. Thanks!
Alex
On Tue, Jan 18, 2022 at 2:57 AM wrote:
>
> From: Minghao Chi
>
> Return value from amdgpu_bo_create_kernel() directly instead
> of taking this in another redundant variable.
>
> Reported-by: Zeal Robot
> Signed-off-by: Minghao Chi
> Signed-off-by: CGEL ZTE
> ---
> dri
Hi Chen-Yu,
On Mon, Jan 17, 2022 at 05:01:52PM +0800, Chen-Yu Tsai wrote:
> On Sat, Jan 15, 2022 at 7:03 AM Brian Norris wrote:
> >
> > Now that the cdn-dp driver supports plug-change callbacks, let's wire it
> > up.
> >
> > Signed-off-by: Brian Norris
> > ---
> >
> > (no changes since v1)
> >
>
Applied. Thanks!
On Mon, Jan 17, 2022 at 3:05 PM Leo Liu wrote:
>
>
> On 2022-01-17 2:47 a.m., Qiang Ma wrote:
> > I met a bug recently and the kernel log:
> >
> > [ 330.171875] radeon :03:00.0: couldn't schedule ib
> > [ 330.175781] [drm:radeon_uvd_suspend [radeon]] *ERROR* Error destroyi
Applied. Strangely I can't seem to find this patch in my inbox or in
the dri-devel or amd-gfx archives.
Alex
On Tue, Jan 18, 2022 at 9:03 AM Lazar, Lijo wrote:
>
>
>
> On 1/18/2022 5:31 PM, Yongzhi Liu wrote:
> > pm_runtime_get_sync() increments the runtime PM usage counter even
> > when it ret
On Tue, 18 Jan 2022 at 22:29, Abhinav Kumar wrote:
>
>
>
> On 12/7/2021 2:29 PM, Dmitry Baryshkov wrote:
> > The DSI subsystem does not fully fall into the pre-enable/enable system
> > of callbacks, since typically DSI device bridge drivers expect to be
> > able to communicate with DSI devices at
On Tue, 18 Jan 2022 at 22:41, Abhinav Kumar wrote:
>
>
>
> On 12/7/2021 2:29 PM, Dmitry Baryshkov wrote:
> > Currently the DSI driver has two separate paths: one if the next device
> > in a chain is a bridge and another one if the panel is connected
> > directly to the DSI host. Simplify the code
On 1/5/2022 11:06 PM, Dmitry Baryshkov wrote:
The round_pixclk() callback returns different rate only on MDP4 in HDMI
(DTV) case. Stop using this callback in other cases to simplify
mode_valid callbacks.
Signed-off-by: Dmitry Baryshkov
Reviewed-by: Abhinav Kumar
---
Changes since v1:
-
On 1/5/22 11:35, Kees Cook wrote:
> The link_status array was not large enough to read the Adjust Request
> Post Cursor2 register, so remove the common helper function to avoid
> an OOB read, found with a -Warray-bounds build:
>
> drivers/gpu/drm/drm_dp_helper.c: In function
> 'drm_dp_get_adju
On 12/7/2021 2:29 PM, Dmitry Baryshkov wrote:
Currently the DSI driver has two separate paths: one if the next device
in a chain is a bridge and another one if the panel is connected
directly to the DSI host. Simplify the code path by using panel-bridge
driver (already selected in Kconfig) and
On 12/7/2021 2:29 PM, Dmitry Baryshkov wrote:
The DSI subsystem does not fully fall into the pre-enable/enable system
of callbacks, since typically DSI device bridge drivers expect to be
able to communicate with DSI devices at the pre-enable() callback. The
reason is that for some DSI hosts en
On Fri, Jan 14, 2022 at 4:46 AM Vincent Whitchurch
wrote:
>
> On Fri, Jan 07, 2022 at 06:29:26AM +0100, Jim Cromie wrote:
> >
> > Enabling debug-to-tracefs is 2 steps:
> >
> > # event enable
> > echo 1 > /sys/kernel/tracing/events/dyndbg/enable
> > # callsite enable
> > echo module foo +T
We should probably Cc: sta...@vger.kernel.org this as well, see:
https://www.kernel.org/doc/html/latest/process/stable-kernel-rules.html for
more info. As well, some useful tools for adding the appropriate Fixes: tags:
https://drm.pages.freedesktop.org/maintainer-tools/dim.html
At least on my
Hello Zack,
On 1/17/22 19:03, Zack Rusin wrote:
> From: Zack Rusin
>
> When sysfb_simple is enabled loading vmwgfx fails because the regions
> are held by the platform. In that case remove_conflicting*_framebuffers
> only removes the simplefb but not the regions held by sysfb.
>
Indeed, that's
On Tue, Jan 18, 2022 at 06:34:20PM +0200, Ville Syrjälä wrote:
> On Fri, Oct 22, 2021 at 12:51:12PM -0700, Navare, Manasi wrote:
> >
> > Hi Ville,
> >
> > Could you take a look at this, this addresses teh review comments from prev
> > version
>
> I don't think I ever got an answer to my questio
tree: git://anongit.freedesktop.org/drm/drm-tip drm-tip
head: ceefc39c8abf37ff93eb36001f82e725756863c8
commit: e38294cfc29f789b541ecc08be2e578da746663c [8/10] Merge remote-tracking
branch 'drm-intel/drm-intel-gt-next' into drm-tip
config: x86_64-randconfig-a002-20220117
(https://download.01.o
From: Kuogee Hsieh
Some DP sinkers prefer to use tps4 instead of tps3 during training #2.
This patch will use tps4 to perform link training #2 if sinker's DPCD
supports it.
Changes in V2:
-- replace dp_catalog_ctrl_set_pattern() with
dp_catalog_ctrl_set_pattern_state_bit()
Changes in V3:
--
Each DP link training contains link training 1 followed by link
training 2. There is maximum of 5 retries of DP link training
before declared link training failed. It is required to stop link
training at end of link training 2 if it is failed so that next
link training 1 can start freshly. This pa
DP CTS test case 4.2.2.6 has valid edid with bad checksum on purpose
and expect DP source return correct checksum. During drm edid read,
correct edid checksum is calculated and stored at
connector::real_edid_checksum.
The problem is struct dp_panel::connector never be assigned, instead the
connect
Current DP drivers have regulators, clocks, irq and phy are grouped
together within a function and executed not in a symmetric manner.
This increase difficulty of code maintenance and limited code scalability.
This patch divides the driver life cycle of operation into four states,
resume (including
Group below 4 dp driver related patches into one series.
Kuogee Hsieh (4):
drm/msm/dp: do not initialize phy until plugin interrupt received
drm/msm/dp: populate connector of struct dp_panel
drm/msm/dp: add support of tps4 (training pattern 4) for HBR3
drm/msm/dp: stop link training after
The two macros FBTFT_REGISTER_DRIVER and FBTFT_REGISTER_SPI_DRIVER
contain quite some duplication: Both define an spi driver and an of device
table and the differences are quite subtle.
So create two new macros and use both twice.
Signed-off-by: Uwe Kleine-König
---
drivers/staging/fbtft/fbtft.
If registering the platform driver fails, the function must not return
without undoing the spi driver registration first.
Fixes: c296d5f9957c ("staging: fbtft: core support")
Signed-off-by: Uwe Kleine-König
---
drivers/staging/fbtft/fbtft.h | 5 -
1 file changed, 4 insertions(+), 1 deletion(
On 18/01/2022 18:47, Loic Poulain wrote:
Add compatibility for QCM2290 display subsystem, including
required entries in DPU hw catalog.
Signed-off-by: Loic Poulain
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 175 -
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog
add test to check handling of misaligned offsets and sizes
Signed-off-by: Robert Beckett
---
drivers/gpu/drm/i915/selftests/i915_gem_gtt.c | 130 ++
1 file changed, 130 insertions(+)
diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c
b/drivers/gpu/drm/i915/selftests/i91
From: Matthew Auld
On discrete platforms like DG2, we need to support a minimum page size
of 64K when dealing with device local-memory. This is quite tricky for
various reasons, so try to document the new implicit uapi for this.
v2: Fixed suggestions on formatting [Daniel]
Signed-off-by: Matthe
From: Matthew Auld
discrete cards optimise 64K GTT pages for local-memory, since everything
should be allocated at 64K granularity. We say goodbye to sparse
entries, and instead get a compact 256B page-table for 64K pages,
which should be more cache friendly. 4K pages for local-memory
are no long
From: Matthew Auld
For local-memory objects we need to align the GTT addresses
to 64K, both for the ppgtt and ggtt.
We need to support vm->min_alignment > 4K, depending
on the vm itself and the type of object we are inserting.
With this in mind update the GTT selftests to take this
into account.
This series continues support for 64K pages for discrete cards.
It supersedes the 64K patches from
https://patchwork.freedesktop.org/series/95686/#rev4
Changes since that series:
- set min alignment for DG2 to 2MB in i915_address_space_init
- replace coloring with simpler 2MB VA alignment for lme
On Mon, 2022-01-17 at 11:35 -0400, Jason Gunthorpe wrote:
> On Fri, Jan 14, 2022 at 11:30:36AM -0500, Eric Farman wrote:
> > On Fri, 2022-01-14 at 20:28 +0800, Liu Yi L wrote:
> > > Hi Eric,
> > >
> > > Hope you are back from new year holiday.:-) Have you got chane to
> > > consider
> > > this pat
Hi Paul,
> Am 18.01.2022 um 17:58 schrieb Paul Cercueil :
>
> Hi Nikolaus,
>
> Le mar., janv. 18 2022 at 15:50:01 +0100, H. Nikolaus Schaller
> a écrit :
>> Hi Paul,
>> any insights on the JZ_REG_LCD_OSDC issue below?
>
> Sorry, I missed your previous email. I blame the holidays ;)
No proble
On 18/01/2022 18:17, Javier Martinez Canillas wrote:
On 1/18/22 17:52, Jocelyn Falempe wrote:
On 18/01/2022 17:38, Javier Martinez Canillas wrote:
Hello Jocelyn,
On 1/14/22 10:47, Jocelyn Falempe wrote:
My worry is if this could cause other issues so I would only do this change
if (is_kdum
On 1/18/22 17:52, Jocelyn Falempe wrote:
> On 18/01/2022 17:38, Javier Martinez Canillas wrote:
>> Hello Jocelyn,
>>
>> On 1/14/22 10:47, Jocelyn Falempe wrote:
>
>>
>> My worry is if this could cause other issues so I would only do this change
>> if (is_kdump_kernel()), to make it as non intrusiv
Hi Nikolaus,
Le mar., janv. 18 2022 at 15:50:01 +0100, H. Nikolaus Schaller
a écrit :
Hi Paul,
any insights on the JZ_REG_LCD_OSDC issue below?
Sorry, I missed your previous email. I blame the holidays ;)
There is a second, unrelated issue with the introduction of
"drm/bridge: display-con
On 18/01/2022 17:38, Javier Martinez Canillas wrote:
Hello Jocelyn,
On 1/14/22 10:47, Jocelyn Falempe wrote:
My worry is if this could cause other issues so I would only do this change
if (is_kdump_kernel()), to make it as non intrusive as possible. And also
add a verbose comment about why t
Hello Jocelyn,
On 1/14/22 10:47, Jocelyn Falempe wrote:
> On some server with MGA G200e (rev 42), booting with Legacy BIOS,
> The hardware hangs when using kdump and kexec into the kdump kernel.
> This happens when the uncompress code tries to write "Decompressing Linux"
> to the VGA Console.
>
>
On Fri, Oct 22, 2021 at 12:51:12PM -0700, Navare, Manasi wrote:
>
> Hi Ville,
>
> Could you take a look at this, this addresses teh review comments from prev
> version
I don't think I ever got an answer to my question as to whether this
was tested with all the interesting scenarios:
1) just wit
Update the include statements for DisplayPort helpers. The header
files are in the dp/ subdirectory.
Signed-off-by: Thomas Zimmermann
Fixes: 5b529e8d9c38 ("drm/dp: Move public DisplayPort headers into dp/")
Reported-by: kernel test robot
Cc: Lyude Paul
Cc: Daniel Vetter
Cc: Maarten Lankhorst
Resolve warnings about non-existing symbols by selecting DRM_DP_HELPER.
Signed-off-by: Thomas Zimmermann
Fixes: adb9d5a2cc77 ("drm/dp: Move DisplayPort helpers into separate helper
module")
Reported-by: kernel test robot
Cc: Lyude Paul
Cc: Daniel Vetter
Cc: Maarten Lankhorst
Cc: Maxime Ripar
QCM2290 MSM Mobile Display Subsystem (MDSS) encapsulates sub-blocks
like DPU display controller, DSI etc. Add YAML schema for DPU device
tree bindings
Signed-off-by: Loic Poulain
---
.../bindings/display/msm/dpu-qcm2290.yaml | 214 +
1 file changed, 214 insertions(+)
Add compatibility for QCM2290 display subsystem, including
required entries in DPU hw catalog.
Signed-off-by: Loic Poulain
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 175 -
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 1 +
drivers/gpu/drm/msm/disp/dpu1/dpu
Hi Paul,
any insights on the JZ_REG_LCD_OSDC issue below?
There is a second, unrelated issue with the introduction of
"drm/bridge: display-connector: implement bus fmts callbacks"
which breaks bus format negotiations.
These are the two last unsolved issues to submit a fully working driver.
> A
Op 17-01-2022 om 15:08 schreef Thomas Hellström:
>
> On 1/17/22 08:56, Maarten Lankhorst wrote:
>> i915_gem_evict_vm will need to be able to evict objects that are
>> locked by the current ctx. By testing if the current context already
>> locked the object, we can do this correctly. This allows us
On Tuesday, January 18th, 2022 at 15:23, Thomas Zimmermann
wrote:
> Am 18.01.22 um 09:10 schrieb Geert Uytterhoeven:
> > Hi Gerd,
> >
> > On Tue, Jan 18, 2022 at 7:30 AM Gerd Hoffmann wrote:
> >> Also note that using a shadow framebuffer allows to decouple fbcon
> >> updates and scanout framebu
Hi
Am 18.01.22 um 09:10 schrieb Geert Uytterhoeven:
Hi Gerd,
On Tue, Jan 18, 2022 at 7:30 AM Gerd Hoffmann wrote:
Also note that using a shadow framebuffer allows to decouple fbcon
updates and scanout framebuffer updates. Can be used to speed up
things without depending on the 2d blitter.
Hi
Am 17.01.22 um 17:21 schrieb Helge Deller:
On 1/17/22 16:58, Thomas Zimmermann wrote:
Hi
Am 17.01.22 um 16:42 schrieb Helge Deller:
[...]
c) reintroduce the state where fbcon is fast on fbdev. This is important for
non-DRM machines,
either when run on native hardware or in an emulat
Hi
Am 17.01.22 um 19:47 schrieb Sven Schnelle:
Hi Thomas,
Thomas Zimmermann writes:
Hi
Am 14.01.22 um 19:11 schrieb Helge Deller:
The fbdev layer is orphaned, but seems to need some care.
So I'd like to step up as new maintainer.
Signed-off-by: Helge Deller
First of all, thank you for s
On 1/18/2022 5:31 PM, Yongzhi Liu wrote:
pm_runtime_get_sync() increments the runtime PM usage counter even
when it returns an error code, thus a matching decrement is needed
on the error handling path to keep the counter balanced.
Signed-off-by: Yongzhi Liu
Thanks!
Reviewed-by: Lijo Laza
Optimize mtk_drm_crtc_duplicate_state() by switching from kzalloc() to
kmalloc(): the only variable of this struct that gets checked in other
functions is `pending_config`, but if that's set to false, then all of
the remaining variables will only ever be set, but not read - so, also
set `pending_co
There is no need to zero out the newly allocated memory because we are
duplicating all members of struct mtk_plane_state: switch to kmalloc
to save some overhead.
Signed-off-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/mediatek/mtk_drm_plane.c | 2 +-
1 file changed, 1 insertion(+), 1 del
Hi Tvrtko,
> > +bool is_object_gt(struct kobject *kobj)
>
> Not sure if you will need it exported in a later patch but for now it seems
> only users are local to this file.
it is actually used by sysfs_gt.c and sysfs_gt_pm.c.
Thank you,
Andi
PS. in this v4 I forgot to replace many drm_err() wi
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