On 3/17/2022 5:07 PM, Stephen Boyd wrote:
The member 'msm_dsi->connector' isn't assigned until
msm_dsi_manager_connector_init() returns (see msm_dsi_modeset_init() and
how it assigns the return value). Therefore this pointer is going to be
NULL here. Let's use 'connector' which is what was
commit b4bdc4fbf8d0 ("soc: sunxi: Deal with the MBUS DMA offsets in a
central place") added a platform device notifier that sets the DMA
offset for all of the display engine frontend and backend devices.
The code applying the offset to DMA buffer physical addresses was then
removed from the
D1 has a TCON TOP with TCON TV0 and DSI, but no TCON TV1. This puts the
DSI clock name at index 1 in clock-output-names. Support this by only
incrementing the index for clocks that are actually supported.
Signed-off-by: Samuel Holland
---
drivers/gpu/drm/sun4i/sun8i_tcon_top.c | 15
D1 has a TCON TOP, so its quirks are similar to those for the R40 TCONs.
While there are some register changes, the part of the TCON TV supported
by the driver matches the R40 quirks, so that quirks structure can be
reused. D1 has the first supported TCON LCD with a TCON TOP, so the TCON
LCD needs
D1 has a display engine with the usual pair of mixers, albeit with
relatively few layers. In fact, D1 appears to be the first SoC to have
a mixer without any UI layers. Add support for these new variants.
Signed-off-by: Samuel Holland
---
drivers/gpu/drm/sun4i/sun8i_mixer.c | 26
Now that the various blocks in the D1 display engine pipeline are
supported, we can enable the overall engine.
Signed-off-by: Samuel Holland
---
drivers/gpu/drm/sun4i/sun4i_drv.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/sun4i/sun4i_drv.c
This series adds binding and driver support for Display Engine 2.0
variant found in the Allwinner D1.
So far it has only been tested with HDMI. I will be sending the HDMI
support series separately, because the hardware comes with a brand new
custom HDMI PHY, which requires some refactoring to
D1's mixer 1 has no UI layers, only a single VI layer. That means the
mixer can only be used if the primary plane comes from this VI layer.
Add the code to handle this case, setting the mixer's global registers
in the same way as when the primary plane comes from a UI layer.
Signed-off-by: Samuel
Allwinner D1 is a RISC-V SoC which contains a DE 2.0 engine. Let's
remove the dependency on a specific CPU architecture, so the driver can
be built wherever ARCH_SUNXI is selected.
Signed-off-by: Samuel Holland
---
drivers/gpu/drm/sun4i/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1
D1 changes the MMIO address offset for the CSC blocks in the first
mixer. The ccsc field value is used as an index into the ccsc_base
array; allocate the next available value to represent the new variant.
Signed-off-by: Samuel Holland
---
drivers/gpu/drm/sun4i/sun8i_csc.c | 3 ++-
So far, the binding and driver have relied on the fact that the H6
clocks are both a prefix and a subset of the R40 clocks. This allows
them to share the clocks/clock-names items and the clock-output-names
order between the hardware variants.
However, the D1 hardware has TCON TV0 and DSI, but no
Allwinner D1 contains a display engine 2.0. It features two mixers, a
TCON TOP (with DSI and HDMI), one TCON LCD, and one TCON TV.
Signed-off-by: Samuel Holland
---
.../allwinner,sun4i-a10-display-engine.yaml | 1 +
.../display/allwinner,sun4i-a10-tcon.yaml | 2 ++
On 4/9/2022 12:35 AM, Richard Gong wrote:
Active State Power Management (ASPM) feature is enabled since kernel 5.14.
There are some AMD GFX cards (such as WX3200 and RX640) that cannot be
used with Intel AlderLake based systems to enable ASPM. Using these GFX
cards as video/display output,
Added error message when the size of requested framebuffer is more than
the allocated size by vmbus mmio region for framebuffer
Signed-off-by: Saurabh Sengar
---
v2 -> v3 : then -> than (typo fix)
drivers/gpu/drm/hyperv/hyperv_drm_modeset.c | 5 -
1 file changed, 4 insertions(+), 1
It's useful to know the connector's max supported bpc for IGT
testing. Expose it via a debugfs file on the connector "output_bpc".
Example: cat /sys/kernel/debug/dri/0/DP-1/output_bpc
V2:
* Fix typo in comments (Harry)
Cc: Jani Nikula
Cc: Ville Syrjälä
Cc: Harry Wentland
Signed-off-by:
On 11/04/2022 03:56, Dmitry Baryshkov wrote:
On 27/03/2022 10:32, Xiaomeng Tong wrote:
The bug is here:
cstate = to_dpu_crtc_state(drm_crtc->state);
For the drm_for_each_crtc(), just like list_for_each_entry(),
the list iterator 'drm_crtc' will point to a bogus position
containing HEAD if
On 27/03/2022 10:32, Xiaomeng Tong wrote:
The bug is here:
cstate = to_dpu_crtc_state(drm_crtc->state);
For the drm_for_each_crtc(), just like list_for_each_entry(),
the list iterator 'drm_crtc' will point to a bogus position
containing HEAD if the list is empty or no element is found.
On 18/03/2022 03:07, Stephen Boyd wrote:
The member 'msm_dsi->connector' isn't assigned until
msm_dsi_manager_connector_init() returns (see msm_dsi_modeset_init() and
how it assigns the return value). Therefore this pointer is going to be
NULL here. Let's use 'connector' which is what was
On 30/03/2022 21:05, Nathan Chancellor wrote:
When building with CONFIG_PM=y and CONFIG_PM_SLEEP=n (such as ARCH=riscv
allmodconfig), the following warnings/errors occur:
drivers/gpu/drm/msm/adreno/adreno_device.c:679:12: error:
'adreno_system_resume' defined but not used
The check for mandatory DT properties width-mm and height-mm is now
part of of_get_drm_panel_display_mode(), drop the redundant check
from this driver.
Signed-off-by: Marek Vasut
Cc: Christoph Niedermaier
Cc: Daniel Vetter
Cc: Dmitry Osipenko
Cc: Laurent Pinchart
Cc: Noralf Trønnes
Cc: Rob
All users of this function require width-mm/height-mm DT property to be
present per their DT bindings, make width-mm/height-mm check mandatory.
It is generally a good idea to specify panel dimensions, so userspace
can configure e.g. scaling accordingly.
Signed-off-by: Marek Vasut
Cc: Christoph
On 4/8/2022 7:19 PM, Paul Menzel wrote:
Dear Richard,
Thank you for your patch.
Am 08.04.22 um 21:05 schrieb Richard Gong:
Active State Power Management (ASPM) feature is enabled since kernel
5.14.
There are some AMD GFX cards (such as WX3200 and RX640) that cannot be
used with Intel
Hi Nils,
On 4/10/2022 8:54 AM, Nils Wallménius wrote:
Hi Richard, see inline comment.
Den fre 8 apr. 2022 21:05Richard Gong skrev:
Active State Power Management (ASPM) feature is enabled since
kernel 5.14.
There are some AMD GFX cards (such as WX3200 and RX640) that cannot be
Hi Pail.
On 4/8/2022 7:19 PM, Paul Menzel wrote:
Dear Richard,
Thank you for your patch.
Am 08.04.22 um 21:05 schrieb Richard Gong:
Active State Power Management (ASPM) feature is enabled since kernel
5.14.
There are some AMD GFX cards (such as WX3200 and RX640) that cannot be
used with
https://bugzilla.kernel.org/show_bug.cgi?id=211425
barn...@gmx.net changed:
What|Removed |Added
CC||barn...@gmx.net
--- Comment #25 from
On 4/7/22 11:47, Lucas Stach wrote:
Am Donnerstag, dem 07.04.2022 um 00:05 +0200 schrieb Marek Vasut:
On 4/6/22 21:45, Lucas Stach wrote:
Am Freitag, dem 11.03.2022 um 18:05 +0100 schrieb Marek Vasut:
Move mxsfb_get_fb_paddr() out of the way, away from register IO functions.
This is a clean
sparse complains that using memset() on __iomem pointer is wrong:
incorrect type in argument 1 (different address spaces)
Use memset_io() to clear screen instead.
Tested on real i740 cards.
Signed-off-by: Ondrej Zary
---
drivers/video/fbdev/i740fb.c | 2 +-
1 file changed, 1 insertion(+), 1
On Sun, Apr 10, 2022 at 1:52 PM Patrik Jakobsson
wrote:
>
> On Sun, Apr 10, 2022 at 9:40 PM James Hilliard
> wrote:
> >
> > On Sun, Apr 10, 2022 at 1:36 PM Patrik Jakobsson
> > wrote:
> > >
> > > On Sat, Apr 9, 2022 at 6:23 AM James Hilliard
> > > wrote:
> > > >
> > > > Select the efi
On Sun, Apr 10, 2022 at 9:40 PM James Hilliard
wrote:
>
> On Sun, Apr 10, 2022 at 1:36 PM Patrik Jakobsson
> wrote:
> >
> > On Sat, Apr 9, 2022 at 6:23 AM James Hilliard
> > wrote:
> > >
> > > Select the efi framebuffer if efi is enabled.
> > >
> > > This appears to be needed for video output
On Sun, Apr 10, 2022 at 1:36 PM Patrik Jakobsson
wrote:
>
> On Sat, Apr 9, 2022 at 6:23 AM James Hilliard
> wrote:
> >
> > Select the efi framebuffer if efi is enabled.
> >
> > This appears to be needed for video output to function correctly.
> >
> > Signed-off-by: James Hilliard
>
> Hi James,
On Sat, Apr 9, 2022 at 6:23 AM James Hilliard wrote:
>
> Select the efi framebuffer if efi is enabled.
>
> This appears to be needed for video output to function correctly.
>
> Signed-off-by: James Hilliard
Hi James,
EFI_FB is its own driver and not needed by gma500 to drive its
hardware. What
Hi Jagan,
Thank you for the patch.
On Fri, Apr 08, 2022 at 09:51:07PM +0530, Jagan Teki wrote:
> Samsung MIPI DSIM bridge can also be found in i.MX8MM/i.MX8MN SoC.
>
> Add dt-bingings for it.
>
> v1:
> * new patch
>
> Signed-off-by: Jagan Teki
> ---
>
Hi Jagan,
Thank you for the patch.
On Fri, Apr 08, 2022 at 09:51:08PM +0530, Jagan Teki wrote:
> Samsung MIPI DSIM master can also be found in i.MX8MM SoC.
>
> Add compatible and associated driver_data for it.
>
> v1:
> * none
>
> Signed-off-by: Jagan Teki
> ---
>
Hi Kieran,
Thank you for the patch.
On Sat, Apr 09, 2022 at 07:57:06PM +0100, Kieran Bingham wrote:
> When the CMM is enabled, the HDSE offset is further adjusted to
> compensate for consumed pixels.
>
> Explain this further, with an extra comment at the point the offset is
> adjusted.
>
>
Hi Richard, see inline comment.
Den fre 8 apr. 2022 21:05Richard Gong skrev:
> Active State Power Management (ASPM) feature is enabled since kernel 5.14.
> There are some AMD GFX cards (such as WX3200 and RX640) that cannot be
> used with Intel AlderLake based systems to enable ASPM. Using
Am 08.04.22 um 13:22 schrieb Sascha Hauer:
> The driver checks if the pixel clock of the given mode matches an entry
> in the mpll config table. The frequencies in the mpll table are meant as
> a frequency range up to which the entry works, not as a frequency that
> must match the pixel clock. The
Hi Maxime,
Thanks for your comments.
On Fri, Apr 08, 2022 at 09:41:10AM +0200, Maxime Ripard wrote:
> Hi Jose,
>
> On Wed, Apr 06, 2022 at 06:55:14PM +0200, José Expósito wrote:
> > Once EDID is parsed, the monitor HDMI support information is cached in
> > drm_display_info.is_hdmi by
Dne petek, 08. april 2022 ob 12:32:25 CEST je Sandor Yu napisal(a):
> i.MX8MPlus (v2.13a) has verified need the workaround to clear the
> overflow with one iteration.
> Only i.MX6Q(v1.30a) need the workaround with 4 iterations,
> the others versions later than v1.3a have been identified as needing
On Friday 08 April 2022 03:58:10 Zheyu Ma wrote:
> On Fri, Apr 8, 2022 at 3:50 AM Helge Deller wrote:
> >
> > On 4/4/22 10:47, Zheyu Ma wrote:
> > > The userspace program could pass any values to the driver through
> > > ioctl() interface. If the driver doesn't check the value of 'pixclock',
> >
You know the drill, Stefan - what's in your config.txt?
Phil
On Sat, 9 Apr 2022, 20:26 Stefan Wahren, wrote:
> Hi,
>
> today i tested Linux 5.18-rc1 on my Raspberry Pi 400 connected to my
> HDMI display (multi_v7_defconfig + CONFIG_ARM_LPAE, firmware:
> 2021-01-08T14:31:16) and i'm getting
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