Le 23/05/2022 à 12:47, Guillaume Ranquet a écrit :
dpintf is the displayport interface hardware unit. This unit is similar
to dpi and can reuse most of the code.
This patch adds support for mt8195-dpintf to this dpi driver. Main
differences are:
- Some features/functional components are not
On 02/06/2022 00:18, Matthew Brost wrote:
On Wed, Jun 01, 2022 at 05:25:49PM +0300, Lionel Landwerlin wrote:
On 17/05/2022 21:32, Niranjana Vishwanathapura wrote:
+VM_BIND/UNBIND ioctl will immediately start binding/unbinding the mapping in an
+async worker. The binding and unbinding will work
On Wed, Jun 01, 2022 at 04:13:14PM +, Simon Ser wrote:
> To discover support for new DMA-BUF IOCTLs, user-space has no
> choice but to try to perform the IOCTL on an existing DMA-BUF.
Which is correct and how all kernel features work (sorry I missed the
main goal of this patch earlier and
On Wed, Jun 01, 2022 at 11:27:17AM +0200, Daniel Vetter wrote:
On Wed, 1 Jun 2022 at 11:03, Dave Airlie wrote:
On Tue, 24 May 2022 at 05:20, Niranjana Vishwanathapura
wrote:
>
> On Thu, May 19, 2022 at 04:07:30PM -0700, Zanoni, Paulo R wrote:
> >On Tue, 2022-05-17 at 11:32 -0700, Niranjana
The pm_runtime_enable will increase power disable depth.
We need to call pm_runtime_disable() to balance it when needed
use devm_pm_runtime_enable() and handle it automatically/
Fixes: 57692c94dcbe ("drm/v3d: Introduce a new DRM driver for Broadcom V3D
V3.x+")
Signed-off-by: Miaoqian Lin
---
Regards,
Oak
> -Original Message-
> From: dri-devel On Behalf Of
> Niranjana Vishwanathapura
> Sent: May 17, 2022 2:32 PM
> To: intel-...@lists.freedesktop.org; dri-devel@lists.freedesktop.org; Vetter,
> Daniel
> Cc: Brost, Matthew ; Hellstrom, Thomas
> ; ja...@jlekstrand.net;
Hi, Thierry
On 2022/6/1 22:47, Thierry Reding wrote:
> On Wed, Jun 01, 2022 at 09:55:02PM +0800, Miaoqian Lin wrote:
>> Hi, Daniel
>>
>> On 2022/6/1 21:26, Daniel Vetter wrote:
>>> On Wed, Jun 01, 2022 at 04:20:50PM +0400, Miaoqian Lin wrote:
The pm_runtime_enable will increase power disable
On Wed, Jun 1, 2022 at 3:28 PM Keisuke Nishimura
wrote:
>
>
> I found 13 definitions of packed structure that contains:
> > - spinlock_t
> > - atomic_t
> > - dma_addr_t
> > - phys_addr_t
> > - size_t
> > - struct mutex
> > - struct device
>
> - raw_spinlock_t
Ok, so I don't think
Hi Dmitry,
I love your patch! Yet something to improve:
[auto build test ERROR on drm/drm-next]
[also build test ERROR on next-20220601]
[cannot apply to v5.18]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base
Hi Rob
Here is the second pull request for the fixes for 5.19.
This goes on top of the previous pull request.
Mainly it has the foll fixes:
- Fix to add minimum ICC vote in the msm_mdss pm_resume path to address
bootup splats
- Fix to avoid dereferencing without checking in WB encoder
- Fix
On Wed, Jun 1, 2022 at 4:03 AM Peter Robinson wrote:
> Runtime PM doesn't seem to work correctly on this driver. On top of
> that, commit 8b6864e3e138 ("drm/v3d/v3d_drv: Remove unused static
> variable 'v3d_v3d_pm_ops'") hints that it most likely never did as the
> driver's PM ops were not
During device remove care needs to be taken that no work is pending
before it removes the underlying DRM bridge etc, but this can be done on
the specific work rather than waiting for the flush of the system-wide
workqueue.
Fixes: bc6fa8676ebb ("drm/bridge/lontium-lt9611uxc: move HPD notification
On 01/06/2022 02:01, Douglas Anderson wrote:
In commit a670ff578f1f ("drm/msm/dpu: always use mdp device to scale
bandwidth") we fully moved interconnect stuff to the DPU driver. This
had no change for sc7180 but _did_ have an impact for other SoCs. It
made them match the sc7180 scheme.
On 6/1/2022 12:58 PM, Dmitry Baryshkov wrote:
On Wed, 1 Jun 2022 at 20:18, Abhinav Kumar wrote:
On 6/1/2022 3:04 AM, Dmitry Baryshkov wrote:
On Wed, 1 Jun 2022 at 02:01, Douglas Anderson wrote:
In commit a670ff578f1f ("drm/msm/dpu: always use mdp device to scale
bandwidth") we fully
On 5/31/22 17:10, Nathan Chancellor wrote:
> On Mon, May 30, 2022 at 04:02:46PM +0200, Javier Martinez Canillas wrote:
>> The kernel test robot reports a compile warning due the ssd130x_spi_table
>> variable being defined but not used. This happen when ssd130x-spi driver
>> is built-in instead of
On Wed, Jun 1, 2022 at 4:06 PM Ville Syrjälä
wrote:
>
> On Wed, Jun 01, 2022 at 10:21:26AM +0300, Pekka Paalanen wrote:
> > On Tue, 31 May 2022 20:37:31 +0300
> > Ville Syrjälä wrote:
> >
> > > On Wed, May 25, 2022 at 01:36:47PM +0300, Pekka Paalanen wrote:
> > > > On Wed, 25 May 2022 09:23:51
parent_hw pointers are easier to manage and cheaper to use than
repeatedly formatting the parent name and subsequently leaving the clk
framework to perform lookups based on that name.
Signed-off-by: Marijn Suijten
Reviewed-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c | 70
parent_hw pointers are easier to manage and cheaper to use than
repeatedly formatting the parent name and subsequently leaving the clk
framework to perform lookups based on that name.
Signed-off-by: Marijn Suijten
Reviewed-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c |
parent_hw pointers are easier to manage and cheaper to use than
repeatedly formatting the parent name and subsequently leaving the clk
framework to perform lookups based on that name.
Signed-off-by: Marijn Suijten
Reviewed-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c |
parent_hw pointers are easier to manage and cheaper to use than
repeatedly formatting the parent name and subsequently leaving the clk
framework to perform lookups based on that name.
Signed-off-by: Marijn Suijten
---
drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm.c | 50 ++
1
parent_hw pointers are easier to manage and cheaper to use than
repeatedly formatting the parent name and subsequently leaving the clk
framework to perform lookups based on that name.
Signed-off-by: Marijn Suijten
Reviewed-by: Dmitry Baryshkov
---
Now that the last DSI PHY PLL driver (dsi_phy_28nm_8960) has been
converted to use a simple stack-local char-array instead of a
devm_kzalloc heap allocation we can safely call sizeof() on every string
variable (that's now a sized array instead of a pointer) passed into
snprintf instead of
The clock names formatted into the hw_clk's init structure are only used
for the duration of the registration function where they are kstrdup'ed,
making it unnecessary to keep the allocations alive for the duration of
the device (through devm).
Just like the other DSI PHY PLL clock trees, use a
Patch 613cbd1da3c9 ("drm/msm/dsi: use devm_clk_*register to registe DSI
PHY clocks") introduced the devm_ prefix to clk_hw registration calls,
without updating the indentation of the arguments on the following
lines.
Similarly e55b3fc8 ("drm/msm/dsi: drop PLL accessor functions")
moved from
Add the devres and non-devres variant of
clk_hw_register_fixed_factor_parent_hw() for registering a fixed factor
clock with clk_hw parent pointer instead of parent name.
Signed-off-by: Marijn Suijten
---
drivers/clk/clk-fixed-factor.c | 57 --
As stated in [1] I promised to tackle and send this series.
parent_hw pointers are easier to manage and cheaper to use than
repeatedly formatting the parent name and subsequently leaving the clk
framework to perform lookups based on that name.
This series starts out by adding extra constructors
Add the devres variant of clk_hw_register_divider_parent_hw() for
registering a divider clock with clk_hw parent pointer instead of parent
name.
Signed-off-by: Marijn Suijten
---
include/linux/clk-provider.h | 19 +++
1 file changed, 19 insertions(+)
diff --git
Add the devres variant of clk_hw_register_mux_hws() for registering a
mux clock with clk_hw parent pointers instead of parent names.
Signed-off-by: Marijn Suijten
---
include/linux/clk-provider.h | 7 +++
1 file changed, 7 insertions(+)
diff --git a/include/linux/clk-provider.h
On Wed, Jun 01, 2022 at 05:25:49PM +0300, Lionel Landwerlin wrote:
> On 17/05/2022 21:32, Niranjana Vishwanathapura wrote:
> > +VM_BIND/UNBIND ioctl will immediately start binding/unbinding the mapping
> > in an
> > +async worker. The binding and unbinding will work like a special GPU
> >
On Thu, 19 May 2022 15:41:06 +0200, Geert Uytterhoeven wrote:
> Convert the Silicon Image sii902x HDMI bridge Device Tree binding
> documentation to json-schema.
>
> Add missing sil,sii9022-cpi and sil,sii9022-tpi compatible values.
>
> Signed-off-by: Geert Uytterhoeven
> ---
> v3:
> - Add
On Thu, 19 May 2022 13:48:48 +0200, Marek Vasut wrote:
> Add compatible string for i.MX8MP LCDIF variant. This is called LCDIFv3
> and is completely different from the LCDIFv3 found in i.MX23 in that it
> has a completely scrambled register layout compared to all previous LCDIF
> variants. The new
From: Stuart Summers
Our internal teams have identified a few additional engine registers
that are worth inspecting in error state dumps during development &
debug. Let's capture and print them as part of our error dump.
For simplicity we'll just dump these registers on gen11 and beyond.
Most
On 10/05/2022 22:29, Douglas Anderson wrote:
While it works, for the most part, to assume that the panel has
finished probing when devm_of_dp_aux_populate_ep_devices() returns,
it's a bit fragile. This is talked about at length in commit
a1e3667a9835 ("drm/bridge: ti-sn65dsi86: Promote the AUX
On 01/06/2022 21:23, Douglas Anderson wrote:
If we're unable to read the EDID for a display because it's corrupt /
bogus / invalid then we'll add a set of standard modes for the
display. Since we have no true information about the connected
display, these modes are essentially guesses but better
On 12/05/2022 01:58, Douglas Anderson wrote:
The drm_helper_probe_single_connector_modes() is a bit long. Let's
break a chunk off to update and validate modes. This helps avoid one
goto and also will allow us to more easily call the helper a second
time in a future patch without adding looping
On 10/05/2022 22:29, Douglas Anderson wrote:
As talked about in this patch in the kerneldoc of
of_dp_aux_populate_ep_device() and also in the past in commit
a1e3667a9835 ("drm/bridge: ti-sn65dsi86: Promote the AUX channel to
its own sub-dev"), it can be difficult for eDP controller drivers to
On Wed, Jun 01, 2022 at 05:25:49PM +0300, Lionel Landwerlin wrote:
> On 17/05/2022 21:32, Niranjana Vishwanathapura wrote:
> > +VM_BIND/UNBIND ioctl will immediately start binding/unbinding the mapping
> > in an
> > +async worker. The binding and unbinding will work like a special GPU
> >
On 10/05/2022 22:29, Douglas Anderson wrote:
While working on the DP AUX bus code I found a few small things that
should be fixed. Namely the non-devm version of
of_dp_aux_populate_ep_devices() was missing an export. There was also
an extra blank line in a kerneldoc and a kerneldoc that
On Wed, May 18, 2022 at 01:55:38PM +0200, Max Krummenacher wrote:
> From: Max Krummenacher
>
> The property is used to set the enum bus_format and infer the bpc
> for a panel defined by 'panel-dpi'.
> This specifies how the panel is connected to the display interface.
>
> Signed-off-by: Max
On Wed, 1 Jun 2022 at 20:38, Abhinav Kumar wrote:
>
>
>
> On 6/1/2022 2:46 AM, Dmitry Baryshkov wrote:
> > On Wed, 1 Jun 2022 at 01:01, Abhinav Kumar
> > wrote:
> >> On 5/31/2022 5:18 AM, Dmitry Baryshkov wrote:
> >>> Replace magic register writes in msm_mdss_enable() with version that
> >>>
On Wed, 1 Jun 2022 at 20:18, Abhinav Kumar wrote:
> On 6/1/2022 3:04 AM, Dmitry Baryshkov wrote:
> > On Wed, 1 Jun 2022 at 02:01, Douglas Anderson wrote:
> >>
> >> In commit a670ff578f1f ("drm/msm/dpu: always use mdp device to scale
> >> bandwidth") we fully moved interconnect stuff to the DPU
Hi Patrik
Am 01.06.22 um 11:23 schrieb Patrik Jakobsson:
The various chips have slight differences in how they handle and store
ddc i2c buses. This series tries to put the main i2c adapter for ddc
into the drm_connector->ddc pointer. This makes it easier to unify the
code for the different
On Wed, Jun 1, 2022 at 2:23 PM Douglas Anderson wrote:
>
> If we're unable to read the EDID for a display because it's corrupt /
> bogus / invalid then we'll add a set of standard modes for the
> display. Since we have no true information about the connected
> display, these modes are essentially
The EDID of an HDR display defines EOTFs that are supported
by the display and can be set in the HDR metadata infoframe.
Userspace is expected to read the EDID and set an appropriate
HDR_OUTPUT_METADATA.
In drm_parse_hdr_metadata_block the kernel reads the supported
EOTFs from the EDID and stores
On Wed, Jun 01, 2022 at 12:17:47AM -0500, Max Fierke wrote:
> The CWD686 is a 6.86" IPS LCD panel used as the primary
> display in the ClockworkPi DevTerm portable (all cores)
>
> Signed-off-by: Max Fierke
> ---
> .../display/panel/clockworkpi,cwd686.yaml | 60 +++
> 1 file
If we're unable to read the EDID for a display because it's corrupt /
bogus / invalid then we'll add a set of standard modes for the
display. Since we have no true information about the connected
display, these modes are essentially guesses but better than nothing.
At the moment, none of the modes
On 6/1/2022 2:46 AM, Dmitry Baryshkov wrote:
On Wed, 1 Jun 2022 at 01:01, Abhinav Kumar wrote:
On 5/31/2022 5:18 AM, Dmitry Baryshkov wrote:
Replace magic register writes in msm_mdss_enable() with version that
contains less magic and more variable names that can be traced back to
the
On 6/1/2022 3:04 AM, Dmitry Baryshkov wrote:
On Wed, 1 Jun 2022 at 02:01, Douglas Anderson wrote:
In commit a670ff578f1f ("drm/msm/dpu: always use mdp device to scale
bandwidth") we fully moved interconnect stuff to the DPU driver. This
had no change for sc7180 but _did_ have an impact for
On Wed, May 25, 2022 at 09:46:24PM +0200, Javier Martinez Canillas wrote:
> On 3/10/22 14:11, Dominik Kierner wrote:
...
> > # DRM Mode Configuration via Device Tree
> >
> > In the old fbdev driver, the display modes are hard-coded, which means
> > for every new display configuration, a new
Am 01.06.22 um 18:13 schrieb Simon Ser:
To discover support for new DMA-BUF IOCTLs, user-space has no
choice but to try to perform the IOCTL on an existing DMA-BUF.
However, user-space may want to figure out whether or not the
IOCTL is available before it has a DMA-BUF at hand, e.g. at
There is little point in having a separate header just for a single
opaque struct definition. Drop it now and move the struct to the
dpu_hw_util.h header.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h | 1 -
.../drm/msm/disp/dpu1/dpu_encoder_phys_wb.c | 1
Cleanup the fields of struct dpu_hw_blk_reg_map, remove unused fields,
merge base_off with blk_off into blk_addr. This patch series depends on
the patch [1].
[1] https://patchwork.freedesktop.org/patch/488001/?series=104613=1
Dmitry Baryshkov (4):
drm/msm/dpu: drop xin_id from struct
There is little point in keeping a separate MDP address and block offset
in this struct. Merge them to form a new blk_addr field used for all
register access.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c| 3 +--
We (nearly) do not use the length field from struct dpu_hw_blk_reg_map,
so we can drop it safely.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c | 1 -
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c | 1 -
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.c | 1
Drop the unused field xin_id.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h
b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h
index 550b2e2b3e34..e8adb118fa85 100644
To discover support for new DMA-BUF IOCTLs, user-space has no
choice but to try to perform the IOCTL on an existing DMA-BUF.
However, user-space may want to figure out whether or not the
IOCTL is available before it has a DMA-BUF at hand, e.g. at
initialization time in a Wayland compositor.
Add a
From: Kalesh Singh
> Sent: 31 May 2022 23:30
...
> > File paths can contain fun characters like newlines or colons, which
> > could make parsing out filenames in this text file... fun. How would your
> > userspace parsing logic handle "/home/stephen/filename\nsize:\t4096"? The
> > readlink(2) API
Replace superfluous cfg_init functions, which just assign a static
config to the struct dpu_mdss_cfg, with static instances of struct
dpu_mdss_cfg.
Signed-off-by: Dmitry Baryshkov
---
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c| 475 --
Mark struct dpu_mdss_cfg instance as a const pointer. This is mostly a
preparation for the next patch.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c | 6 +++---
drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h | 4 ++--
Rather than detecting VBIF_XINL_QOS_LVL_REMAP_000 based on the
hwversion, push the offset to the hw_catalog.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 2 ++
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 2 ++
Rather than checking hwversion, follow the usual patter and add special
bit to the lm->features to check whether the LM has combined or separate
alpha registers. While we are at it, rename
dpu_hw_lm_setup_blend_config_sdm845() to
dpu_hw_lm_setup_blend_config_combined_alpha().
Signed-off-by:
The driver should not depend on hw revision for detecting features.
Instead it should use features from the hw catalog. Drop the hwversion
field from struct dpu_mdss_cfg and struct dpu_hw_blk_reg_map.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c| 1 -
Replace superfluous cfg_init functions, which just assign a static
config to the struct dpu_mdss_cfg, with static instances of struct
dpu_mdss_cfg.
Dmitry Baryshkov (5):
drm/msm/dpu: use feature bit for LM combined alpha check
drm/msm/dpu: move VBIF_XINL_QOS_LVL_REMAP size to hw_catalog
Although gen11 and gen12 architectures supported the concept of multiple
slices, in practice all the platforms that were actually designed only
had a single slice (i.e., note the parameters to 'intel_sseu_set_info'
that we pass for each platform). We can simplify the code slightly by
dropping the
As with EU masks, it's easier to store subslice/DSS masks internally in
a format that's more natural for the driver to work with, and then only
covert into the u8[] uapi form when the query ioctl is invoked. Since
the hardware design changed significantly with Xe_HP, we'll use a union
to choose
Slice/subslice/EU information should be obtained via the topology
queries provided by the I915_QUERY interface; let's turn off support for
the old GETPARAM lookups on Xe_HP and beyond where we can't return
meaningful values.
The slice mask lookup is meaningless since Xe_HP doesn't support
Storing the EU mask internally in the same format the I915_QUERY
topology queries use makes the final copy_to_user() a bit simpler, but
makes the rest of the driver's SSEU more complicated and harder to
follow. Let's switch to an internal representation that's more natural:
Xe_HP platforms will
Xe_HP has enough fundamental differences from previous platforms that it
makes sense to use a separate SSEU init function to keep things
straightforward and easy to understand. We'll also add a has_xehp_dss
flag to the SSEU structure that will be used by other upcoming changes.
v2:
- Add
This series reworks i915's internal handling of slice/subslice/EU (SSEU)
data to represent platforms like Xe_HP in a more natural manner and to
PVC splits the mask of enabled DSS over two registers. It also changes
the meaning of the EU fuse register such that each bit represents a
single EU rather than a pair of EUs.
Signed-off-by: Matt Roper
Acked-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/gt/intel_gt_regs.h | 1 +
Am 01.06.22 um 16:52 schrieb Sergey Senozhatsky:
On (22/06/01 16:38), Christian König wrote:
Well, you don't.
If you have a dynamic context structure you need to reference count that as
well. In other words every time you create a fence in your context you need
to increment the reference count
Am 01.06.22 um 00:48 schrieb Stephen Brennan:
Kalesh Singh writes:
On Tue, May 31, 2022 at 3:07 PM Stephen Brennan
wrote:
On 5/31/22 14:25, Kalesh Singh wrote:
In order to identify the type of memory a process has pinned through
its open fds, add the file path to fdinfo output. This allows
On (22/06/01 16:38), Christian König wrote:
> > > Well, you don't.
> > >
> > > If you have a dynamic context structure you need to reference count that
> > > as
> > > well. In other words every time you create a fence in your context you
> > > need
> > > to increment the reference count and
On Wed, Jun 01, 2022 at 09:55:02PM +0800, Miaoqian Lin wrote:
> Hi, Daniel
>
> On 2022/6/1 21:26, Daniel Vetter wrote:
> > On Wed, Jun 01, 2022 at 04:20:50PM +0400, Miaoqian Lin wrote:
> >> The pm_runtime_enable will increase power disable depth.
> >> If the probe fails, we should use
On Wed, Jun 01, 2022 at 01:48:56PM +0530, Balasubramani Vivekanandan wrote:
> On 23.05.2022 13:45, Matt Roper wrote:
> > As with EU masks, it's easier to store subslice/DSS masks internally in
> > a format that's more natural for the driver to work with, and then only
> > covert into the u8[] uapi
Am 01.06.22 um 16:27 schrieb Sergey Senozhatsky:
On (22/06/01 14:45), Christian König wrote:
Am 31.05.22 um 04:51 schrieb Sergey Senozhatsky:
On (22/05/30 16:55), Christian König wrote:
Am 30.05.22 um 16:22 schrieb Sergey Senozhatsky:
[SNIP]
So the `lock` should have at least same lifespan
On (22/06/01 14:45), Christian König wrote:
> Am 31.05.22 um 04:51 schrieb Sergey Senozhatsky:
> > On (22/05/30 16:55), Christian König wrote:
> > > Am 30.05.22 um 16:22 schrieb Sergey Senozhatsky:
> > > > [SNIP]
> > > > So the `lock` should have at least same lifespan as the DMA fence
> > > >
On 17/05/2022 21:32, Niranjana Vishwanathapura wrote:
+VM_BIND/UNBIND ioctl will immediately start binding/unbinding the mapping in an
+async worker. The binding and unbinding will work like a special GPU engine.
+The binding and unbinding operations are serialized and will wait on specified
On Wed, Jun 01, 2022 at 10:21:26AM +0300, Pekka Paalanen wrote:
> On Tue, 31 May 2022 20:37:31 +0300
> Ville Syrjälä wrote:
>
> > On Wed, May 25, 2022 at 01:36:47PM +0300, Pekka Paalanen wrote:
> > > On Wed, 25 May 2022 09:23:51 +
> > > Simon Ser wrote:
> > >
> > > > On Wednesday, May
From: Linus Torvalds
[ Upstream commit 47f15561b69e226bfc034e94ff6dbec51a4662af ]
When building the kernel for arm with the "-mabi=apcs-gnu" option, gcc
will force alignment of all structures and unions to a word boundary
(see also STRUCTURE_SIZE_BOUNDARY and the "-mstructure-size-boundary=XX"
From: Linus Torvalds
[ Upstream commit 47f15561b69e226bfc034e94ff6dbec51a4662af ]
When building the kernel for arm with the "-mabi=apcs-gnu" option, gcc
will force alignment of all structures and unions to a word boundary
(see also STRUCTURE_SIZE_BOUNDARY and the "-mstructure-size-boundary=XX"
From: Linus Torvalds
[ Upstream commit 47f15561b69e226bfc034e94ff6dbec51a4662af ]
When building the kernel for arm with the "-mabi=apcs-gnu" option, gcc
will force alignment of all structures and unions to a word boundary
(see also STRUCTURE_SIZE_BOUNDARY and the "-mstructure-size-boundary=XX"
From: Linus Torvalds
[ Upstream commit 47f15561b69e226bfc034e94ff6dbec51a4662af ]
When building the kernel for arm with the "-mabi=apcs-gnu" option, gcc
will force alignment of all structures and unions to a word boundary
(see also STRUCTURE_SIZE_BOUNDARY and the "-mstructure-size-boundary=XX"
From: Linus Torvalds
[ Upstream commit 47f15561b69e226bfc034e94ff6dbec51a4662af ]
When building the kernel for arm with the "-mabi=apcs-gnu" option, gcc
will force alignment of all structures and unions to a word boundary
(see also STRUCTURE_SIZE_BOUNDARY and the "-mstructure-size-boundary=XX"
From: Linus Torvalds
[ Upstream commit 47f15561b69e226bfc034e94ff6dbec51a4662af ]
When building the kernel for arm with the "-mabi=apcs-gnu" option, gcc
will force alignment of all structures and unions to a word boundary
(see also STRUCTURE_SIZE_BOUNDARY and the "-mstructure-size-boundary=XX"
From: Linus Torvalds
[ Upstream commit 47f15561b69e226bfc034e94ff6dbec51a4662af ]
When building the kernel for arm with the "-mabi=apcs-gnu" option, gcc
will force alignment of all structures and unions to a word boundary
(see also STRUCTURE_SIZE_BOUNDARY and the "-mstructure-size-boundary=XX"
Am 31.05.22 um 23:25 schrieb Kalesh Singh:
To be able to account the amount of memory a process is keeping pinned
by open file descriptors add a 'size' field to fdinfo output.
dmabufs fds already expose a 'size' field for this reason, remove this
and make it a common field for all fds. This
Hi, Daniel
On 2022/6/1 21:26, Daniel Vetter wrote:
> On Wed, Jun 01, 2022 at 04:20:50PM +0400, Miaoqian Lin wrote:
>> The pm_runtime_enable will increase power disable depth.
>> If the probe fails, we should use pm_runtime_disable() to balance
>> pm_runtime_enable().
>> Also call disable function
From: Linus Torvalds
[ Upstream commit 47f15561b69e226bfc034e94ff6dbec51a4662af ]
When building the kernel for arm with the "-mabi=apcs-gnu" option, gcc
will force alignment of all structures and unions to a word boundary
(see also STRUCTURE_SIZE_BOUNDARY and the "-mstructure-size-boundary=XX"
Am 01.06.22 um 15:22 schrieb Daniel Vetter:
On Wed, Jun 01, 2022 at 02:45:42PM +0200, Christian König wrote:
Am 31.05.22 um 04:51 schrieb Sergey Senozhatsky:
On (22/05/30 16:55), Christian König wrote:
Am 30.05.22 um 16:22 schrieb Sergey Senozhatsky:
[SNIP]
So the `lock` should have at least
Am 30.05.22 um 17:45 schrieb Sergey Senozhatsky:
On (22/05/30 16:55), Christian König wrote:
If you just want to create a single dma_fence which is also only bound to a
single context you can embed the lock into the fence without much problem.
See how the dma_fence_array does that for
On Wed, Jun 01, 2022 at 12:03:35PM +0200, Thierry Reding wrote:
> Hi Dave, Daniel,
>
> The following changes since commit cb7e1abc2c73633e1eefa168ab2dad6e838899c9:
>
> drm/tegra: gem: Do not try to dereference ERR_PTR() (2022-05-06 15:52:49
> +0200)
>
> are available in the Git repository
On Wed, Jun 01, 2022 at 04:20:50PM +0400, Miaoqian Lin wrote:
> The pm_runtime_enable will increase power disable depth.
> If the probe fails, we should use pm_runtime_disable() to balance
> pm_runtime_enable().
> Also call disable function in remove function.
>
> Fixes: 57692c94dcbe ("drm/v3d:
On Wed, Jun 01, 2022 at 02:45:42PM +0200, Christian König wrote:
> Am 31.05.22 um 04:51 schrieb Sergey Senozhatsky:
> > On (22/05/30 16:55), Christian König wrote:
> > > Am 30.05.22 um 16:22 schrieb Sergey Senozhatsky:
> > > > [SNIP]
> > > > So the `lock` should have at least same lifespan as the
Am 31.05.22 um 04:51 schrieb Sergey Senozhatsky:
On (22/05/30 16:55), Christian König wrote:
Am 30.05.22 um 16:22 schrieb Sergey Senozhatsky:
[SNIP]
So the `lock` should have at least same lifespan as the DMA fence
that borrows it, which is impossible to guarantee in our case.
Nope, that's
On Thu, May 26, 2022 at 09:01:03AM -0700, Doug Anderson wrote:
> Hi,
>
> On Thu, May 26, 2022 at 8:42 AM Daniel Vetter wrote:
> >
> > On Thu, 26 May 2022 at 03:28, Sean Paul wrote:
> > >
> > > On Wed, May 25, 2022 at 9:26 AM Daniel Vetter wrote:
> > > >
> > > > On Mon, May 23, 2022 at
In mipi_dsi_device_alloc(), it calls device_initialize(>dev);
We need to use put_device() instead freeing directly.
Fixes: 068a002 ("drm: Add MIPI DSI bus support")
Signed-off-by: Miaoqian Lin
---
drivers/gpu/drm/drm_mipi_dsi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
On Mon, May 30, 2022 at 08:12:16AM +0200, Christian König wrote:
> Am 25.05.22 um 23:05 schrieb T.J. Mercier:
> > On Wed, May 25, 2022 at 7:38 AM Daniel Vetter wrote:
> > > On Tue, May 17, 2022 at 08:13:24AM +0200, Greg Kroah-Hartman wrote:
> > > > On Mon, May 16, 2022 at 05:08:05PM -0700, T.J.
Acked-by: Nirmoy Das
On 5/25/2022 8:43 PM, Matthew Auld wrote:
Userspace wants to know the size of CPU visible portion of device
local-memory, and on small BAR devices the probed_size is no longer
enough. In Vulkan, for example, it would like to know the size in bytes
for CPU visible
On Tue, May 31, 2022 at 10:58:35AM +0200, Maxime Ripard wrote:
> Hi Daniel,
>
> Thanks for your feedback
>
> On Wed, May 25, 2022 at 07:18:07PM +0200, Daniel Vetter wrote:
> > > > VBLANK Events and Asynchronous Commits
> > > > ==
> > > > When should the VBLANK
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