On Sat, Jun 18, 2022 at 11:18:17PM -0700, Christoph Hellwig wrote:
> > > There is a bunch of code an comments in the iommu type1 code that
> > > suggest we can pin memory that is not page backed.
> >
> > Would you mind explaining the use case for pinning memory that
> > isn't page backed? And do
On 15.06.2022 01:01, Emma Anholt wrote:
> Required for turning on per-process page tables for the GPU.
>
> Signed-off-by: Emma Anholt
> ---
Reviewed-by: Konrad Dybcio
Konrad
>
> drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/io
ppc:allmodconfig builds fail with the following error.
powerpc64-linux-ld:
drivers/gpu/drm/amd/amdgpu/../display/dc/dml/display_mode_lib.o
uses hard float,
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_resource.o
uses soft float
powerpc64-linu
kernel robot reports today:
* riscv64-linux-ld: ttm_bo_vm.c:undefined reference to `vmf_insert_pfn_prot'
https://lore.kernel.org/lkml/202206190651.smtms3ay-...@intel.com/T/#u
* ttm_bo_vm.c:undefined reference to `vmf_insert_pfn_prot'
https://lore.kernel.org/lkml/202206190523.0ar6yqf7-...@in
On Wed, Jun 15, 2022 at 5:35 PM Michel Dänzer
wrote:
>
> On 2022-04-14 18:57, Michel Dänzer wrote:
> > On 2022-04-14 17:04, Masahiro Yamada wrote:
> >> On Thu, Apr 14, 2022 at 10:50 PM Michel Dänzer
> >> wrote:
> >>> On 2022-04-14 15:34, Alex Deucher wrote:
> On Thu, Apr 14, 2022 at 4:44 AM
Hi,
On 6/18/22 23:08, Maya Matuszczyk wrote:
> sob., 18 cze 2022 o 22:57 Hans de Goede napisał(a):
>>
>> Hi Maya,
>>
>> On 6/11/22 12:39, Maccraft123 wrote:
>>> From: Maya Matuszczyk
>>>
>>> The device is identified by "NEXT" in board name, however there are
>>> different versions of it, "Next A
sob., 18 cze 2022 o 22:57 Hans de Goede napisał(a):
>
> Hi Maya,
>
> On 6/11/22 12:39, Maccraft123 wrote:
> > From: Maya Matuszczyk
> >
> > The device is identified by "NEXT" in board name, however there are
> > different versions of it, "Next Advance" and "Next Pro", that have
> > different DMI
Hi Maya,
On 6/11/22 12:39, Maccraft123 wrote:
> From: Maya Matuszczyk
>
> The device is identified by "NEXT" in board name, however there are
> different versions of it, "Next Advance" and "Next Pro", that have
> different DMI board names.
> Due to a production error a batch or two have their bo
Data writes for the ssd130x 4-wire SPI protocol need special handling, due
the Data/Command control (D/C) pin having to be toggled prior to the write.
The regmap API only allowed drivers to provide .reg_{read,write} callbacks
to do per register read/write, but didn't provide a way for drivers to d
Should component_add() fail, we should call analogix_dp_remove() in the
error handling path, as already done in the remove function.
Fixes: 152cce0006ab ("drm/bridge: analogix_dp: Split bind() into probe() and
real bind()")
Signed-off-by: Christophe JAILLET
---
drivers/gpu/drm/rockchip/analogix
From: Rob Clark
Prior to the last commit, this could result in setting the GPU
written fence value back to an older value, if we had missed
updating completed_fence prior to suspend. This was mostly
harmless as the GPU would eventually overwrite it again with
the correct value. But we should ju
From: Rob Clark
I noticed while looking at some traces, that we could miss calls to
msm_update_fence(), as the irq could have raced with retire_submits()
which could have already popped the last submit on a ring out of the
queue of in-flight submits. But walking the list of submits in the
irq ha
On Mon, 13 Jun 2022 19:11:42 +0800
ChiaEn Wu wrote:
> From: ChiaEn Wu
>
> Add Mediatek MT6370 ADC support.
>
> Signed-off-by: ChiaEn Wu
Hi ChiaEn Wu,
A few comments inline, but mostly looks good to me
with the exception of the scales which look far too large.
Thanks,
Jonathan
> ---
> dr
On Mon, 13 Jun 2022 19:11:39 +0800
ChiaEn Wu wrote:
> From: ChiYuan Huang
>
> Add Mediatek MT6370 MFD support.
>
> Signed-off-by: ChiYuan Huang
Hi.
A few trivial things that probably overlap with other reviewer
comments.
> +static int mt6370_check_vendor_info(struct mt6370_info *info)
> +{
On Mon, 13 Jun 2022 19:11:38 +0800
ChiaEn Wu wrote:
> From: ChiaEn Wu
>
> Add ABI documentation for mt6370 non-standard ADC sysfs interfaces.
>
> Signed-off-by: ChiaEn Wu
> ---
> .../ABI/testing/sysfs-bus-iio-adc-mt6370 | 36 +++
> 1 file changed, 36 insertions(+)
> cre
On Sat, 18 Jun 2022 at 17:24, Luca Weiss wrote:
>
> Hi Dmitry,
>
> On Mittwoch, 15. Juni 2022 15:59:32 CEST Dmitry Baryshkov wrote:
> > Enable (optional) core (MDP_CLK) clock that allows accessing HW_REV
> > registers during the platform init.
> >
>
> I believe you also need to update Documentatio
The remove() function calls bochs_hw_fini() but this function is not called
in the error handling of the probe.
This call releases the resources allocated by bochs_hw_init() used in
bochs_load().
Update the probe and bochs_load() to call bochs_hw_fini() if an error
occurs after a successful bochs
Hi Dmitry,
On Mittwoch, 15. Juni 2022 15:59:32 CEST Dmitry Baryshkov wrote:
> Enable (optional) core (MDP_CLK) clock that allows accessing HW_REV
> registers during the platform init.
>
I believe you also need to update Documentation/devicetree/bindings/display/
msm/mdp5.txt with the new clock.
0day-ci/archive/20220618/202206182155.lxxuujpn-...@intel.com/config)
compiler: mips-linux-gcc (GCC) 11.3.0
reproduce (this is a W=1 build):
wget
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O
~/bin/make.cross
chmod +x ~/bin/make.cross
#
https://githu
On Fri, Jun 17, 2022 at 8:20 PM Sierra Guiza, Alejandro (Alex)
wrote:
>
>
> On 6/17/2022 4:40 AM, David Hildenbrand wrote:
> > On 31.05.22 22:00, Alex Sierra wrote:
> >> Device memory that is cache coherent from device and CPU point of view.
> >> This is used on platforms that have an advanced sys
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