In anx7625_parse_dt(), 'pdata->mipi_host_node' will be assigned a
new reference with of_graph_get_remote_node() which will increase
the refcount of the object, correspondingly, we should call
of_node_put() for the old reference stored in the 'pdata->mipi_host_node'.
Fixes: 8bdfc5dae4e3 ("drm/bridg
In tc_probe_bridge_endpoint(), we should call of_node_put() when
breaking out of the for_each_endpoint_of_node() which will automatically
increase and decrease the refcount.
Fixes: 71f7d9c03118 ("drm/bridge: tc358767: Detect bridge mode from connected
endpoints in DT")
Signed-off-by: Liang He
--
On 7/19/2022 11:19 AM, Stephen Boyd wrote:
Quoting Akhil P Oommen (2022-07-18 21:07:05)
On 7/14/2022 11:10 AM, Akhil P Oommen wrote:
On 7/12/2022 4:57 AM, Doug Anderson wrote:
Hi,
On Fri, Jul 8, 2022 at 11:00 PM Akhil P Oommen
wrote:
Update gpu register array with gpucc memory region.
Sign
Hi Caleb,
On Mon, Jul 18, 2022 at 10:30:50PM +0100, Caleb Connolly wrote:
> From: Sumit Semwal
>
> LG SW43408 is 1080x2160, 4-lane MIPI-DSI panel.
A few things to improve to this binding.
Sam
>
> Signed-off-by: Vinod Koul
> Signed-off-by: Sumit Semwal
> [caleb: convert to yaml]
> Sig
Quoting Akhil P Oommen (2022-07-18 21:07:05)
> On 7/14/2022 11:10 AM, Akhil P Oommen wrote:
> > On 7/12/2022 4:57 AM, Doug Anderson wrote:
> >> Hi,
> >>
> >> On Fri, Jul 8, 2022 at 11:00 PM Akhil P Oommen
> >> wrote:
> >>> Update gpu register array with gpucc memory region.
> >>>
> >>> Signed-off-
On 7/14/2022 11:10 AM, Akhil P Oommen wrote:
On 7/12/2022 4:57 AM, Doug Anderson wrote:
Hi,
On Fri, Jul 8, 2022 at 11:00 PM Akhil P Oommen
wrote:
Update gpu register array with gpucc memory region.
Signed-off-by: Akhil P Oommen
---
(no changes since v1)
arch/arm64/boot/dts/qcom/sc7280.
On Thu, 02 Jun 2022 16:55:50 -0700, Matt Roper wrote:
>
> On Thu, Jun 02, 2022 at 04:36:02PM -0700, Dixit, Ashutosh wrote:
> > On Fri, 27 May 2022 16:41:28 -0700, Matt Roper wrote:
> > >
> > > On Thu, May 26, 2022 at 12:00:42PM -0700, Ashutosh Dixit wrote:
> > > > Create a gt/gtN/.defaults director
Create a gt/gtN/.defaults/ directory (similar to
engine//.defaults/) to expose default parameter values for
each gt in sysfs. This allows userspace to restore default parameter values
after they have changed. The empty 'struct gt_defaults' will be populated
by subsequent patches.
v2: Changed 'stru
Add the following sysfs files to gt/gtN/.defaults/:
* rps_min_freq_mhz
* rps_max_freq_mhz
v2: Correct gt/gtN/.defaults/* file names in commit message
v3: Remove rps_boost_freq_mhz since it is not consumed by userspace
Cc: Tvrtko Ursulin
Cc: Andi Shyti
Signed-off-by: Ashutosh Dixit
Reviewed-by:
Create a gt/gtN/.defaults/ directory (similar to
engine//.defaults/) to expose default parameter values for each
gt in sysfs. This allows userspace to restore default parameter values
after they may have changed.
Patch 1: Creates the gt/gtN/.defaults/ directory
Patch 2: Adds per-gt RPS defaults (r
On 7/18/2022 05:36, Tvrtko Ursulin wrote:
On 13/07/2022 00:31, john.c.harri...@intel.com wrote:
From: John Harrison
When the KMD sends a CLIENT_RESET request to GuC (as part of the
suspend sequence), GuC will mark the CTB buffer as 'UNUSED'. If the
KMD then checked the CTB queue, it would see
On 7/18/2022 05:35, Tvrtko Ursulin wrote:
On 13/07/2022 00:31, john.c.harri...@intel.com wrote:
From: Matthew Brost
The GuC needs a copy of a golden context for implementing watchdog
resets (aka media resets). This context is larger on newer platforms.
So adjust the size being allocated/copie
Quoting Dmitry Baryshkov (2022-07-10 01:41:27)
> Follow the schema for the DP controller and declare 5 register regions
> instead of using a single region for all the registers. Note, this
> extends the dts by adding p1 region to the DP node (to be used for DP
> MST).
>
> Signed-off-by: Dmitry Bary
Quoting Dmitry Baryshkov (2022-07-10 01:41:25)
> Follow the schema for the DP controller and declare 5 register regions
> instead of using a single region for all the registers. Note, this
> extends the dts by adding p1 region to the DP node (to be used for DP
> MST).
>
> Signed-off-by: Dmitry Bary
On 7/18/2022 05:26, Tvrtko Ursulin wrote:
On 13/07/2022 00:31, john.c.harri...@intel.com wrote:
From: Matthew Brost
The engine registers really shouldn't be touched during GuC submission
as the GuC owns the registers. Don't call ring_is_idle and tie
Touch being just read and it is somehow h
On 7/18/2022 05:15, Tvrtko Ursulin wrote:
On 13/07/2022 00:31, john.c.harri...@intel.com wrote:
From: Matthew Brost
Remove bogus GEM_BUG_ON which compared kernel context timeline seqno to
seqno in memory on engine PM unpark. If a GT reset occurred these values
might not match as a kernel cont
https://bugzilla.kernel.org/show_bug.cgi?id=216143
--- Comment #9 from Erhard F. (erhar...@mailbox.org) ---
v5.19-rc7 still affected.
--
You may reply to this email to add a comment.
You are receiving this mail because:
You are watching the assignee of the bug.
On 19/07/2022 01:54, Caleb Connolly wrote:
On 18/07/2022 23:13, Dmitry Baryshkov wrote:
Any idea, what is the issue here? Do you have the datasheet for the panel?
As Marijn just mentioned on IRC, the driver right now only calls
drm_dsc_pps_payload_pack() but doesn't actually send it. I haven'
This patch re-introduces support for GuC v69 in parallel to v70. As this
is a quick fix, v69 has been re-introduced as the single "fallback" guc
version in case v70 is not available on disk and only for platforms that
are out of force_probe and require the GuC by default. All v69 specific
code has
On 19/07/2022 00:30, Caleb Connolly wrote:
From: Sumit Semwal
LG SW43408 is 1080x2160, 4-lane MIPI-DSI panel, used in some Pixel3
phones.
Whatever init sequence we have for this panel isn't capable of
initialising it completely, toggling the reset gpio ever causes the
panel to die. Until this
On 18/07/2022 23:13, Dmitry Baryshkov wrote:
> On 19/07/2022 00:30, Caleb Connolly wrote:
>> From: Amit Pundir
>>
>> This adds an initial dts for the Blueline (Pixel 3). Supported
>> functionality includes display, Debug UART, UFS, USB-C (peripheral), WiFi,
>> Bluetooth and modem.
>>
>> Bootloa
On 19/07/2022 00:30, Caleb Connolly wrote:
From: Amit Pundir
This adds an initial dts for the Blueline (Pixel 3). Supported
functionality includes display, Debug UART, UFS, USB-C (peripheral), WiFi,
Bluetooth and modem.
Bootloader compatible board and msm IDs are needed for the kernel to boot
On 7/18/2022 2:19 PM, John Harrison wrote:
On 7/15/2022 15:54, Daniele Ceraolo Spurio wrote:
This patch re-introduces support for GuC v69 in parallel to v70. As this
is a quick fix, v69 has been re-introduced as the single "fallback" guc
version in case v70 is not available on disk. All v69 s
From: Sumit Semwal
LG SW43408 is 1080x2160, 4-lane MIPI-DSI panel.
Signed-off-by: Vinod Koul
Signed-off-by: Sumit Semwal
[caleb: convert to yaml]
Signed-off-by: Caleb Connolly
---
.../bindings/display/panel/lg,43408.yaml | 41 +++
.../display/panel/panel-simple-dsi.yaml
From: Sumit Semwal
LG SW43408 is 1080x2160, 4-lane MIPI-DSI panel, used in some Pixel3
phones.
Whatever init sequence we have for this panel isn't capable of
initialising it completely, toggling the reset gpio ever causes the
panel to die. Until this is resolved we avoid resetting the panel. The
Document the bindings for the Pixel 3
Based on
https://lore.kernel.org/all/20220521164550.91115-7-krzysztof.kozlow...@linaro.org/
Signed-off-by: Caleb Connolly
---
Documentation/devicetree/bindings/arm/qcom.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindi
This series adds an initial DTS and display panel driver
for the Pixel 3. The Pixel 3 display uses DSC (Display
Stream Compression) which has been supported in mainline
for some time now.
Functionality includes:
- Display, GPU, venus video transcoder
- Modem/WiFi/Bluetooth - ModemManager seems t
From: Amit Pundir
This adds an initial dts for the Blueline (Pixel 3). Supported
functionality includes display, Debug UART, UFS, USB-C (peripheral), WiFi,
Bluetooth and modem.
Bootloader compatible board and msm IDs are needed for the kernel to boot
with Pixel3 bootloader, so those are added.
This series adds an initial DTS and display panel driver
for the Pixel 3. The Pixel 3 display uses DSC (Display
Stream Compression) which has been supported in mainline
for some time now.
Functionality includes:
- Display, GPU, venus video transcoder
- Modem/WiFi/Bluetooth - ModemManager seems t
Document the bindings for the Pixel 3
Based on
https://lore.kernel.org/all/20220521164550.91115-7-krzysztof.kozlow...@linaro.org/
Signed-off-by: Caleb Connolly
---
Documentation/devicetree/bindings/arm/qcom.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindi
On 7/15/2022 15:54, Daniele Ceraolo Spurio wrote:
This patch re-introduces support for GuC v69 in parallel to v70. As this
is a quick fix, v69 has been re-introduced as the single "fallback" guc
version in case v70 is not available on disk. All v69 specific code has
been labeled as such for easy
Hi Dave,
a long overdue reply on this series.
On Fri, Mar 04, 2022 at 03:17:55PM +, Dave Stevenson wrote:
> Hi All
>
> Changes from v1:
> - New patch to refactor drm_bridge_chain_post_disable and
> drm_bridge_chain_pre_enable
> to reuse drm_atomic_bridge_chain_post_disable /
> drm_atomic
On Thu, 14 Jul 2022 08:00:32 -0700, Christian König wrote:
>
> Am 14.07.22 um 15:33 schrieb Alex Deucher:
> > On Thu, Jul 14, 2022 at 9:09 AM Christian König
> > wrote:
> >> Hi Mauro,
> >>
> >> well the last time I checked drm-tip was clean.
> >>
> >> The revert is necessary because we had some pr
On Mon, 18 Jul 2022 12:56:29 +0200 David Hildenbrand wrote:
> > /*
> > * Try to move out any movable page before pinning the range.
> > */
> > @@ -1919,7 +1948,8 @@ static long check_and_migrate_movable_pages(unsigned
> > long nr_pages,
> >
On Tue, Jul 12, 2022 at 07:12:14PM +0800, Bo-Chen Chen wrote:
> From: Markus Schneider-Pargmann
>
> This controller is present on several mediatek hardware. Currently
> mt8195 and mt8395 have this controller without a functional difference,
> so only one compatible field is added.
>
> The contro
Applied the series with some minor tweaks to the documentation.
Thanks!
Alex
On Thu, Jul 14, 2022 at 3:18 PM André Almeida wrote:
>
> Add a GFXOFF section at "GPU Power Controls" file, explaining what it is
> and how userspace can interact with it.
>
> Signed-off-by: André Almeida
> ---
> Chan
Applied with a trivial fix for dcn314_resource.c.
Thanks!
Alex
On Sat, Jul 16, 2022 at 3:52 PM Melissa Wen wrote:
>
> Although dcn31_update_soc_for_wm_a() is only called in dml/dcn31/dcn31_fpu by
> dc->res_pool->funcs->update_soc_for_wm_a(dc, context), it's declared in
> dcn31_resource that is
On 18.07.22 19:52, Felix Kuehling wrote:
> On 2022-07-18 06:50, David Hildenbrand wrote:
>> On 15.07.22 17:05, Alex Sierra wrote:
>>> [WHY]
>>> It makes more sense to have these helpers in zone specific header
>>> file, rather than the generic mm.h
>>>
>>> Signed-off-by: Alex Sierra
>> Acked-by: D
On Sun, Jul 17, 2022 at 02:44:39AM +0800, Jason Wang wrote:
> The semicolon after the `}' in line 648 is unneeded.
same here
The line number changes... if you remove the "in line #"
the msg gets better.
With that changed:
Reviewed-by: Rodrigo Vivi
>
> Signed-off-by: Jason Wang
> ---
> driver
On Fri, Jul 15, 2022 at 01:19:53PM +0800, Jason Wang wrote:
> The double `wait' is duplicated in line 974, remove one.
The line number changes... if you remove the "in line #"
the msg gets better.
With that changed:
Reviewed-by: Rodrigo Vivi
>
> Signed-off-by: Jason Wang
> ---
> drivers/gp
On Mon, Jul 18, 2022 at 11:02:03AM +0100, Tvrtko Ursulin wrote:
>
> Hi,
>
> On 15/07/2022 23:54, Daniele Ceraolo Spurio wrote:
> > This patch re-introduces support for GuC v69 in parallel to v70. As this
> > is a quick fix, v69 has been re-introduced as the single "fallback" guc
> > version in ca
Hi Dmitry,
On Wed, Jun 08, 2022 at 02:00:57PM +0300, Dmitry Baryshkov wrote:
> On 04/03/2022 18:17, Dave Stevenson wrote:
> > drm_bridge_chain_pre_enable is a subset of
> > drm_atomic_bridge_chain_pre_enable, and drm_bridge_chain_post_disable
> > is a subset of drm_atomic_bridge_chain_post_disable
Hi Dave,
On Mon, Jul 18, 2022 at 11:27:37AM +0100, Dave Stevenson wrote:
> Hi Sam
>
> On Sun, 17 Jul 2022 at 18:58, Sam Ravnborg wrote:
> >
> > Add todo in the hope someone will help updating the bridge drivers.
> >
> > v2:
> > - Updated descriptions in todo.rst
> >
> > Signed-off-by: Sam Ravn
On Sun, 10 Jul 2022 12:00:39 +0300, Dmitry Baryshkov wrote:
> Add gcc-bus clock required for the SDM845 DPU device tree node. This
> change was made in the commit 111c52854102 ("arm64: dts: qcom: sdm845:
> move bus clock to mdp node for sdm845 target"), but was not reflected in
> the schema.
>
> S
On Sun, 10 Jul 2022 12:00:38 +0300, Dmitry Baryshkov wrote:
> Move schema for qcom,msm8998-mdss from dpu-msm8998.yaml to mdss.yaml so
> that the dpu file describes only the DPU schema.
>
> Signed-off-by: Dmitry Baryshkov
> ---
> .../bindings/display/msm/dpu-msm8998.yaml | 142 +--
On Sun, 10 Jul 2022 12:00:37 +0300, Dmitry Baryshkov wrote:
> Move schema for qcom,qcm2290-mdss from dpu-qcm2290.yaml to mdss.yaml so
> that the dpu file describes only the DPU schema.
>
> Signed-off-by: Dmitry Baryshkov
> ---
> .../bindings/display/msm/dpu-qcm2290.yaml | 140 +--
On Sun, 10 Jul 2022 12:00:36 +0300, Dmitry Baryshkov wrote:
> Move schema for qcom,sc7280-mdss from dpu-sc7280.yaml to mdss.yaml so
> that the dpu file describes only the DPU schema.
>
> Signed-off-by: Dmitry Baryshkov
> ---
> .../bindings/display/msm/dpu-sc7280.yaml | 148 +
On Sun, 10 Jul 2022 12:00:35 +0300, Dmitry Baryshkov wrote:
> Move schema for qcom,sc7180-mdss from dpu-sc7180.yaml to mdss.yaml so
> that the dpu file describes only the DPU schema.
>
> Signed-off-by: Dmitry Baryshkov
> ---
> .../bindings/display/msm/dpu-sc7180.yaml | 149 +
On Sun, 10 Jul 2022 12:00:34 +0300, Dmitry Baryshkov wrote:
> Move schema for qcom,sdm845-mdss from dpu-sdm845.yaml to mdss.yaml so
> that the dpu file describes only the DPU schema.
>
> Signed-off-by: Dmitry Baryshkov
> ---
> .../bindings/display/msm/dpu-sdm845.yaml | 135 ---
>
On 2022-07-18 06:50, David Hildenbrand wrote:
On 15.07.22 17:05, Alex Sierra wrote:
[WHY]
It makes more sense to have these helpers in zone specific header
file, rather than the generic mm.h
Signed-off-by: Alex Sierra
Acked-by: David Hildenbrand
Thank you! I don't think I have the authorit
On Sun, Jul 10, 2022 at 12:00:40PM +0300, Dmitry Baryshkov wrote:
> Move properties common to all DPU DT nodes to the dpu-common.yaml.
>
> Note, this removes description of individual DPU port@ nodes. However
> such definitions add no additional value. The reg values do not
> correspond to hardwar
Each Panfrost job has its own job slot and MMU address space set of
registers, which are selected with a job-specific index.
Turn the shift and stride used for selection of the right register set base
into a define rather than using magic numbers.
Signed-off-by: Adrián Larumbe
---
drivers/gpu/d
In the event of a job timeout, debug dump information will be written into
/sys/class/devcoredump.
Inspired by etnaviv's similar feature.
Signed-off-by: Adrián Larumbe
---
drivers/gpu/drm/panfrost/Kconfig | 1 +
drivers/gpu/drm/panfrost/Makefile| 3 +-
drivers/gpu/drm/panfro
This is v5 for a previous patch series being discussed at:
https://lore.kernel.org/dri-devel/20220622143616.1265405-1-adrian.laru...@collabora.com/T/#t
Mesa MR under review can be found at:
https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14034
Changes with respect to v4 of the same pat
On 7/18/2022 4:26 AM, Tvrtko Ursulin wrote:
On 09/07/2022 00:48, Daniele Ceraolo Spurio wrote:
The current HuC status getparam return values are a bit confusing in
regards to what happens in some scenarios. In particular, most of the
error cases cause the ioctl to return an error, but a coup
On 7/18/2022 3:02 AM, Tvrtko Ursulin wrote:
Hi,
On 15/07/2022 23:54, Daniele Ceraolo Spurio wrote:
This patch re-introduces support for GuC v69 in parallel to v70. As this
is a quick fix, v69 has been re-introduced as the single "fallback" guc
version in case v70 is not available on disk. A
Hi Steven, once again thanks for the feedback. I was off for some time and then
busy with other stuff, but I can finally work on a new revision for the patch
On 23.06.2022 13:23, Steven Price wrote:
> On 22/06/2022 15:36, Adrián Larumbe wrote:
> > In the event of a job timeout, debug dump informat
On Mon, 18 Jul 2022 14:45:22 +0100
Tvrtko Ursulin wrote:
> On 14/07/2022 13:06, Mauro Carvalho Chehab wrote:
> > From: Chris Wilson
> >
> > Skip all further TLB invalidations once the device is wedged and
> > had been reset, as, on such cases, it can no longer process instructions
> > on the GP
On Mon, 18 Jul 2022 14:39:17 +0100
Tvrtko Ursulin wrote:
> On 14/07/2022 13:06, Mauro Carvalho Chehab wrote:
> > From: Chris Wilson
> >
> > Don't flush TLBs when the buffer is only used in the GGTT under full
> > control of the kernel, as there's no risk of concurrent access
> > and stale acces
From: Mauro Carvalho Chehab
> Sent: 18 July 2022 15:54
>
> On Mon, 18 Jul 2022 14:16:10 +0100
> Tvrtko Ursulin wrote:
>
> > On 14/07/2022 13:06, Mauro Carvalho Chehab wrote:
> > > From: Chris Wilson
> > >
> > > Check if the device is powered down prior to any engine activity,
> > > as, on such
On 18/07/2022 15:53, Mauro Carvalho Chehab wrote:
On Mon, 18 Jul 2022 14:16:10 +0100
Tvrtko Ursulin wrote:
On 14/07/2022 13:06, Mauro Carvalho Chehab wrote:
From: Chris Wilson
Check if the device is powered down prior to any engine activity,
as, on such cases, all the TLBs were already in
On Mon, 18 Jul 2022 at 15:35, Liang He wrote:
>
>
> At 2022-07-18 19:56:09, "Liang He" wrote:
> >
> >At 2022-07-18 19:54:18, "Robert Foss" wrote:
> >>Hey Liang,
> >>
> >>
> >>On Thu, 7 Jul 2022 at 03:25, Liang He wrote:
> >>>
> >>> There are two refcount bugs in this funcion:
> >>>
> >>> BUG-1:
On Mon, 18 Jul 2022 14:16:10 +0100
Tvrtko Ursulin wrote:
> On 14/07/2022 13:06, Mauro Carvalho Chehab wrote:
> > From: Chris Wilson
> >
> > Check if the device is powered down prior to any engine activity,
> > as, on such cases, all the TLBs were already invalidated, so an
> > explicit TLB inva
Am 15.07.22 um 07:20 schrieb Jason Wang:
The double `have' is duplicated in line 696, remove one.
The subject line is rather confusing since this isn't related to DMA-buf
at all.
Please change that to "drm/radeon:", apart from that the patch looks
good to me.
Christian.
Signed-off-by:
Il 18/07/22 07:22, Allen-KH Cheng ha scritto:
DPI is part of the display / multimedia block in MediaTek SoCs
and is managed using power controller in some platforms. We add
the power-domains property to the binding documentation.
Signed-off-by: Allen-KH Cheng
For the contents of this commit:
Andy Shevchenko 於 2022年7月18日 週一 晚上7:39寫道：
>
> On Mon, Jul 18, 2022 at 10:08 AM ChiYuan Huang wrote:
> > On Fri, Jul 15, 2022 at 03:10:42PM +0200, Andy Shevchenko wrote:
> > > On Fri, Jul 15, 2022 at 1:28 PM ChiaEn Wu wrote:
>
> ...
>
> > > > This commit add support for the Type-C & Power Deliver
* Andrew Morton [220716 21:03]:
> On Thu, 14 Jul 2022 09:56:19 +0800 kernel test robot wrote:
>
> > lib/maple_tree.c:1522:52: warning: Parameter 'gaps' can be declared with
> > const [constParameter]
> > lib/maple_tree.c:1871:21: warning: Array index 'split' is used before
> > limits check. [a
On 14/07/2022 13:06, Mauro Carvalho Chehab wrote:
From: Chris Wilson
Invalidate TLB in patch, in order to reduce performance regressions.
"in batches"?
Currently, every caller performs a full barrier around a TLB
invalidation, ignoring all other invalidations that may have already
removed
On 14/07/2022 13:06, Mauro Carvalho Chehab wrote:
From: Chris Wilson
Skip all further TLB invalidations once the device is wedged and
had been reset, as, on such cases, it can no longer process instructions
on the GPU and the user no longer has access to the TLB's in each engine.
That helps
On 14/07/2022 13:06, Mauro Carvalho Chehab wrote:
From: Chris Wilson
Don't flush TLBs when the buffer is only used in the GGTT under full
control of the kernel, as there's no risk of concurrent access
and stale access from prefetch.
We only need to invalidate the TLB if they are accessible b
At 2022-07-18 19:56:09, "Liang He" wrote:
>
>At 2022-07-18 19:54:18, "Robert Foss" wrote:
>>Hey Liang,
>>
>>
>>On Thu, 7 Jul 2022 at 03:25, Liang He wrote:
>>>
>>> There are two refcount bugs in this funcion:
>>>
>>> BUG-1: 'pdata->mipi_host_node' will be assigned a new reference with
>>> of_gr
On 14/07/2022 13:06, Mauro Carvalho Chehab wrote:
From: Chris Wilson
Ensure that the TLB of the OA unit is also invalidated
on gen12 HW, as just invalidating the TLB of an engine is not
enough.
Cc: sta...@vger.kernel.org
Fixes: 7938d61591d3 ("drm/i915: Flush TLBs before releasing backing sto
On 14/07/2022 13:06, Mauro Carvalho Chehab wrote:
Add a kernel-doc markup to document this new macro.
Signed-off-by: Mauro Carvalho Chehab
---
To avoid mailbombing on a large number of people, only mailing lists were C/C
on the cover.
See [PATCH v2 00/21] at:
https://lore.kernel.org/all/co
On 14/07/2022 13:06, Mauro Carvalho Chehab wrote:
From: Chris Wilson
Check if the device is powered down prior to any engine activity,
as, on such cases, all the TLBs were already invalidated, so an
explicit TLB invalidation is not needed, thus reducing the
performance regression impact due t
On 13/07/2022 00:31, john.c.harri...@intel.com wrote:
From: John Harrison
When the KMD sends a CLIENT_RESET request to GuC (as part of the
suspend sequence), GuC will mark the CTB buffer as 'UNUSED'. If the
KMD then checked the CTB queue, it would see a non-zero status value
and report the bu
On 13/07/2022 00:31, john.c.harri...@intel.com wrote:
From: Matthew Brost
The GuC needs a copy of a golden context for implementing watchdog
resets (aka media resets). This context is larger on newer platforms.
So adjust the size being allocated/copied accordingly.
What were the consequence
On 13/07/2022 00:31, john.c.harri...@intel.com wrote:
From: Matthew Brost
The engine registers really shouldn't be touched during GuC submission
as the GuC owns the registers. Don't call ring_is_idle and tie
Touch being just read and it is somehow harmful?
intel_engine_is_idle strictly to
On 7/18/22 12:50, Thomas Zimmermann wrote:
[...]
>>> To be honest, I still don't like this rename. Especially in the case of
>>> via, which has a KMS driver coming up. It will now have an include
>>> statement that crosses several levels in the directory hierarchy. And
>>
>> That could be avoided
On 13/07/2022 00:31, john.c.harri...@intel.com wrote:
From: Matthew Brost
Remove bogus GEM_BUG_ON which compared kernel context timeline seqno to
seqno in memory on engine PM unpark. If a GT reset occurred these values
might not match as a kernel context could be skipped. This bug was
hidden
Can you use the norma commitl title prefix "drm/bridge: tc358767: "
On Thu, 7 Jul 2022 at 04:45, Liang He wrote:
>
> In tc_probe_bridge_endpoint(), we should call of_node_put() when
> breaking out of the for_each_endpoint_of_node() which will automatically
> increase and decrease the refcount.
>
At 2022-07-18 19:55:16, "Robert Foss" wrote:
>On Mon, 18 Jul 2022 at 13:54, Robert Foss wrote:
>>
>> Hey Liang,
>>
>>
>> On Thu, 7 Jul 2022 at 03:25, Liang He wrote:
>> >
>> > There are two refcount bugs in this funcion:
>> >
>> > BUG-1: 'pdata->mipi_host_node' will be assigned a new reference
At 2022-07-18 19:54:18, "Robert Foss" wrote:
>Hey Liang,
>
>
>On Thu, 7 Jul 2022 at 03:25, Liang He wrote:
>>
>> There are two refcount bugs in this funcion:
>>
>> BUG-1: 'pdata->mipi_host_node' will be assigned a new reference with
>> of_graph_get_remote_node() which will increase the refcount
On Mon, 18 Jul 2022 at 13:54, Robert Foss wrote:
>
> Hey Liang,
>
>
> On Thu, 7 Jul 2022 at 03:25, Liang He wrote:
> >
> > There are two refcount bugs in this funcion:
> >
> > BUG-1: 'pdata->mipi_host_node' will be assigned a new reference with
> > of_graph_get_remote_node() which will increase t
Hey Liang,
On Thu, 7 Jul 2022 at 03:25, Liang He wrote:
>
> There are two refcount bugs in this funcion:
>
> BUG-1: 'pdata->mipi_host_node' will be assigned a new reference with
> of_graph_get_remote_node() which will increase the refcount of the
> object, correspondingly, we should call of_node
Applied series to drm-misc-next.
On Mon, Jul 18, 2022 at 10:08 AM ChiYuan Huang wrote:
> On Fri, Jul 15, 2022 at 03:10:42PM +0200, Andy Shevchenko wrote:
> > On Fri, Jul 15, 2022 at 1:28 PM ChiaEn Wu wrote:
...
> > > This commit add support for the Type-C & Power Delivery controller in
> >
> > This commit add -> Add
> >
> Uppe
On Fri, 15 Jul 2022 15:16:05 -0700
Joe Perches wrote:
> On Fri, 2022-07-15 at 17:35 -0400, Rodrigo Vivi wrote:
> > On Wed, Jul 13, 2022 at 09:12:12AM +0100, Mauro Carvalho Chehab wrote:
> > > This file is licensed with MIT license. Change its license text
> > > to use SPDX.
> > >
> > > Signe
Hi,
On 12/07/2022 06:00, Christoph Hellwig wrote:
On Mon, Jul 11, 2022 at 04:31:49PM -0400, Rodrigo Vivi wrote:
On Mon, Jul 11, 2022 at 10:26:14AM +0200, Christoph Hellwig wrote:
Hi i915 and nouveau maintainers,
any chance I could get some help to remove the remaining direct
driver calls in
Applied to drm-misc-next
On 09/07/2022 00:48, Daniele Ceraolo Spurio wrote:
The current HuC status getparam return values are a bit confusing in
regards to what happens in some scenarios. In particular, most of the
error cases cause the ioctl to return an error, but a couple of them,
INIT_FAIL and LOAD_FAIL, are not ex
On Mon, Jul 18, 2022 at 4:27 PM AngeloGioacchino Del Regno
wrote:
>
> >>
> >> Hello ChiaEn,
> >>
> >> I propose to move this one to drivers/leds (or drivers/pwm) and, instead of
> >> registering a backlight device, register a PWM device.
> >>
> >> This way you will be able to reuse the generic
On 15.07.22 17:05, Alex Sierra wrote:
> From: Alistair Popple
>
> Currently any attempts to pin a device coherent page will fail. This is
> because device coherent pages need to be managed by a device driver, and
> pinning them would prevent a driver from migrating them off the device.
>
> Howev
On 01/07/2022 23:50, Niranjana Vishwanathapura wrote:
Bind and unbind the mappings upon VM_BIND and VM_UNBIND calls.
Signed-off-by: Niranjana Vishwanathapura
Signed-off-by: Prathap Kumar Valsan
---
drivers/gpu/drm/i915/Makefile | 1 +
drivers/gpu/drm/i915/gem/i915_gem_cr
On 15.07.22 17:05, Alex Sierra wrote:
> With DEVICE_COHERENT, we'll soon have vm_normal_pages() return
> device-managed anonymous pages that are not LRU pages. Although they
> behave like normal pages for purposes of mapping in CPU page, and for
> COW. They do not support LRU lists, NUMA migration
Hi Javier
Am 18.07.22 um 11:46 schrieb Javier Martinez Canillas:
Hello Thomas,
On 7/18/22 08:56, Thomas Zimmermann wrote:
Hi
Am 16.07.22 um 20:17 schrieb Sam Ravnborg:
While discussing the way forward for the via driver
Javier came up with the proposal to move all DRI1 drivers
to their own f
On 15.07.22 17:05, Alex Sierra wrote:
> [WHY]
> It makes more sense to have these helpers in zone specific header
> file, rather than the generic mm.h
>
> Signed-off-by: Alex Sierra
Acked-by: David Hildenbrand
--
Thanks,
David / dhildenb
Hi Sam
On Sun, 17 Jul 2022 at 18:58, Sam Ravnborg wrote:
>
> Add todo in the hope someone will help updating the bridge drivers.
>
> v2:
> - Updated descriptions in todo.rst
>
> Signed-off-by: Sam Ravnborg
> Acked-by: Maxime Ripard
> Cc: Laurent Pinchart
> Cc: Maarten Lankhorst
> Cc: Maxime
Hi,
On 15/07/2022 23:54, Daniele Ceraolo Spurio wrote:
This patch re-introduces support for GuC v69 in parallel to v70. As this
is a quick fix, v69 has been re-introduced as the single "fallback" guc
version in case v70 is not available on disk. All v69 specific code has
been labeled as such f
Hi Thomas,
I love your patch! Perhaps something to improve:
[auto build test WARNING on ebea934e2651857c9b56cc80bf99460ee18a3592]
url:
https://github.com/intel-lab-lkp/linux/commits/Thomas-Zimmermann/fbdev-Maintain-device-ownership-with-aperture-helpers/20220718-152559
base
Hello Thomas,
On 7/18/22 08:56, Thomas Zimmermann wrote:
> Hi
>
> Am 16.07.22 um 20:17 schrieb Sam Ravnborg:
>> While discussing the way forward for the via driver
>> Javier came up with the proposal to move all DRI1 drivers
>> to their own folder.
>>
>> The idea is to move the old DRI1 drivers s
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