On 12/2/2022 4:27 AM, Bjorn Andersson wrote:
> On Wed, Oct 05, 2022 at 02:36:58PM +0530, Akhil P Oommen wrote:
> @Ulf, Akhil has a power-domain for a piece of hardware which may be
> voted active by multiple different subsystems (co-processors/execution
> contexts) in the system.
>
> As such, durin
On 02/12/2022 00:17, Kuogee Hsieh wrote:
Add DP both data-lanes and link-frequencies property to dp_out endpoint and
support
functions to DP driver.
Kuogee Hsieh (5):
arm64: dts: qcom: add data-lanes and link-freuencies into dp_out
endpoint
dt-bindings: msm/dp: add data-lanes and lin
On 02/12/2022 00:17, Kuogee Hsieh wrote:
Add DP both data-lanes and link-frequencies property to dp_out endpoint and
support
functions to DP driver.
Kuogee Hsieh (5):
arm64: dts: qcom: add data-lanes and link-freuencies into dp_out
endpoint
dt-bindings: msm/dp: add data-lanes and lin
Hi Linus,
Things do seem to have finally settled down, just 4 i915 and one
amdgpu this week. Probably won't have much for next week if you do
push rc8 out.
Dave.
drm-fixes-2022-12-02:
drm fixes for 6.1-rc8
i915:
- Fix dram info readout
- Remove non-existent pipes from bigjoiner pipe mask
- Fix
Acked-by: Bas Nieuwenhuizen
On Thu, Dec 1, 2022 at 8:47 PM Jason Ekstrand wrote:
>
> Acked-by: Jason Ekstrand
>
> On Thu, Dec 1, 2022 at 4:22 AM Daniel Vetter wrote:
>>
>> On Thu, 1 Dec 2022 at 11:07, Daniel Vetter wrote:
>> >
>> > On Wed, Nov 23, 2022 at 08:24:37PM +0100, Daniel Vetter wrote
Starting with MTL, there will be two GT-tiles, a render and media
tile. PXP as a service for supporting workloads with protected
contexts and protected buffers can be subscribed by process
workloads on any tile. However, depending on the platform,
only one of the tiles is used for control events pe
There was a long-standing bug from a typo that created 2 ARGB1555 and
ABGR1555 pixel format entries. Weston 10 has a sanity check that alerted
me to this issue.
According to the Supported Pixel Data formats table we have the later
entries should have been for Alpha-X instead.
Signed-off-by: Rando
i just realized nothing external to PXP is calling HAS_PXP so I'll probably
drop this macro and create a helper for
pxp_debugfs (the only caller).
...alan
On Thu, 2022-12-01 at 23:55 +, Teres Alexis, Alan Previn wrote:
>
> On Tue, 2022-11-29 at 18:02 -0800, Teres Alexis, Alan Previn wrote:
>
On Thu, 01 Dec 2022 17:02:45 +0100, Otto Pflüger wrote:
> Add documentation for the new io-supply property, which specifies the
> regulator for the I/O voltage supply on platforms where the panel
> panel power and I/O supplies are separate.
>
> Signed-off-by: Otto Pflüger
> ---
> .../bindings/
On Tue, 2022-11-29 at 18:02 -0800, Teres Alexis, Alan Previn wrote:
Alan: [snip]
> + newpxp->ctrl_gt = pxp_get_ctrl_gt(newpxp->i915);
> +
> + if (!newpxp->ctrl_gt)
> + return -ENODEV;
>
> /*
>* If HuC is loaded by GSC but PXP is disabled, we can skip the init o
On Tue, 29 Nov 2022 11:29:10 -0600, Chris Morgan wrote:
> From: Chris Morgan
>
> Add documentation for the Samsung AMS495QA01 panel.
>
> Signed-off-by: Chris Morgan
> Signed-off-by: Maya Matuszczyk
> ---
> .../display/panel/samsung,ams495qa01.yaml | 57 +++
> 1 file chan
Currently softpin suffers from assorted race conditions exposed by newer
versions of mesa 22.2.y and 22.3.y . Those races are difficult to fix in
older kernel versions due to massive amount of backports necessary to do
so. Disable softpin by default until Linux 6.1.y is out, which contains
the nece
On Mon, Nov 28, 2022 at 04:23:16PM +0100, Luca Ceresoli wrote:
> VIP is the parallel video capture component within the video input
> subsystem of Tegra20 (and other Tegra chips, apparently).
>
> Signed-off-by: Luca Ceresoli
>
> ---
>
> Changed in v2 (suggested by Krzysztof Kozlowski):
> - remo
On Mon, Nov 28, 2022 at 04:23:17PM +0100, Luca Ceresoli wrote:
> The Tegra20 VI peripheral can receive parallel input from the VIP parallel
> input module. Add it to the allowed properties and augment the existing
> nvidia,tegra20-vi example to show a 'vip' property.
>
> Reviewed-by: Krzysztof Koz
On Mon, Nov 28, 2022 at 03:36:15PM +0800, Sandor Yu wrote:
> Add bindings for Cadence HDP-TX DisplayPort PHY.
>
> Signed-off-by: Sandor Yu
> ---
> .../bindings/phy/cdns,hdptx-dp-phy.yaml | 68 +++
> 1 file changed, 68 insertions(+)
> create mode 100644
> Documentation/dev
On Wed, 30 Nov 2022 16:22:50 -0800 Dan Williams
wrote:
> I think since there is no urgent need for this series to move forward in
> v6.2 I can take the time to kill the need for pfn_to_pgmap_offset() and
> circle back for this in v6.3.
I'll drop v3 of "Fix the DAX-gup mistake" and "mm/memremap:
On Mon, Nov 28, 2022 at 03:36:13PM +0800, Sandor Yu wrote:
> Add bindings for i.MX8MQ MHDP HDMI.
>
> Signed-off-by: Sandor Yu
> ---
> .../display/bridge/cdns,mhdp-imx8mq-hdmi.yaml | 102 ++
> 1 file changed, 102 insertions(+)
> create mode 100644
> Documentation/devicetree/bind
On Mon, Nov 28, 2022 at 03:36:10PM +0800, Sandor Yu wrote:
> Add bindings for i.MX8MQ MHDP DisplayPort.
>
> Signed-off-by: Sandor Yu
> ---
> .../display/bridge/cdns,mhdp-imx8mq-dp.yaml | 102 ++
> 1 file changed, 102 insertions(+)
> create mode 100644
> Documentation/devicetr
On Wed, Oct 05, 2022 at 02:36:58PM +0530, Akhil P Oommen wrote:
>
@Ulf, Akhil has a power-domain for a piece of hardware which may be
voted active by multiple different subsystems (co-processors/execution
contexts) in the system.
As such, during the powering down sequence we don't wait for the
p
On 12/1/2022 2:40 PM, Teres Alexis, Alan Previn wrote:
Few nits - most of which are repeats from existing review comments.
I did have 1 feedback. Functionally, code logic is correct.
To speed things up, I'll provide a conditional R-b if you address the feedback
below + fix the the BIT3->to-B
On 12/1/22 09:53, Zack Rusin wrote:
> From: Zack Rusin
>
> When SEV is enabled gmr's and mob's are explicitly disabled because
> the encrypted system memory can not be used by the hypervisor.
>
> The driver was disabling GMR's but the presentation code, which depends
> on GMR's, wasn't honoring
Few nits - most of which are repeats from existing review comments.
I did have 1 feedback. Functionally, code logic is correct.
To speed things up, I'll provide a conditional R-b if you address the feedback
below + fix the the BIT3->to-BIT4 uncore-
flags fix. Others are nits in my book:
(conditi
By default, HBR2 (5.4G) is the max link link be supported. This patch add
the capability to support max link rate at HBR3 (8.1G).
Changes in v2:
-- add max link rate from dtsi
Changes in v3:
-- parser max_data_lanes and max_dp_link_rate from dp_out endpoint
Changes in v4:
-- delete unnecessary p
Add capability to parser and retrieve max DP link supported rate from
link-frequencies property of dp_out endpoint.
Changes in v6:
-- second patch after split parser patch into two patches
Changes in v7:
-- without checking cnt against DP_MAX_NUM_DP_LANES to retrieve link rate
Signed-off-by: Kuo
The TGL/RKL/DG1/ADL performance tuning guide suggests programming a
literal value of 0x2FC0100F for this register. The register's hardware
default value is 0x2FC0108F, so this translates to just clearing one
bit.
Take this opportunity to also clean up the register definition and
re-write its exis
Add DP both data-lanes and link-frequencies property to dp_out endpoint and
support
functions to DP driver.
Kuogee Hsieh (5):
arm64: dts: qcom: add data-lanes and link-freuencies into dp_out
endpoint
dt-bindings: msm/dp: add data-lanes and link-frequencies property
drm/msm/dp: parser da
On Thu, Dec 1, 2022 at 10:06 PM Rob Clark wrote:
>
> On Thu, Dec 1, 2022 at 12:08 PM Joel Fernandes wrote:
> >
> > On Sat, Nov 12, 2022 at 6:44 PM Rob Clark wrote:
> > >
> > > On Fri, Nov 11, 2022 at 1:08 PM Joel Fernandes
> > > wrote:
> > > >
> > > >
> > > >
> > > > > On Nov 11, 2022, at 2:50
On Thu, Dec 1, 2022 at 12:08 PM Joel Fernandes wrote:
>
> On Sat, Nov 12, 2022 at 6:44 PM Rob Clark wrote:
> >
> > On Fri, Nov 11, 2022 at 1:08 PM Joel Fernandes
> > wrote:
> > >
> > >
> > >
> > > > On Nov 11, 2022, at 2:50 PM, Joel Fernandes (Google)
> > > > wrote:
> > > >
> > > > During ke
Hi
I was given a link to https://patchwork.freedesktop.org/series/111494/
but can't seem to find it on the mailing list, so I'll reply here.
On Thu, 2022-08-25 at 08:46 +0200, Maarten Lankhorst wrote:
> Frontbuffer tracking in gem is used in old drivers, but nowadays everyone
> calls dirtyfb expl
I only have one minor nits below. Rodrigo already captured other minor issues.
Functionally, all LGTM so
Reviewed-by: Alan Previn
On Mon, 2022-11-21 at 15:16 -0800, Ceraolo Spurio, Daniele wrote:
> GSC FW is loaded by submitting a dedicated command via the GSC engine.
> The memory area used for
On Sun, Nov 27, 2022 at 08:14:32PM +0100, Otto Pflüger wrote:
> The power-supply property is only mentioned in the description and not
> listed in the properties section of the binding. Add it there.
That's because it is described in panel-common.yaml already.
But I guess it is somewhat useful to
On 2022-12-01 10:38, Peter Maucher wrote:
GART and GTT are two abbreviations that should be mentioned in the
glossary.
Signed-off-by: Peter Maucher
---
Documentation/gpu/amdgpu/amdgpu-glossary.rst | 6 ++
1 file changed, 6 insertions(+)
diff --git a/Documentation/gpu/amdgpu/amdgpu-gloss
On Thu, Dec 01, 2022 at 02:56:30PM +0530, Balasubramani Vivekanandan wrote:
> On 30.11.2022 07:58, Matt Roper wrote:
> > PPAT setup involves a series of multicast writes. This can be optimized
> > slightly be acquiring forcewake and the steering lock just once for the
> > entire sequence.
> >
> >
On 12/1/2022 9:49 AM, Dmitry Baryshkov wrote:
On 01/12/2022 19:32, Kuogee Hsieh wrote:
On 11/30/2022 4:21 PM, Dmitry Baryshkov wrote:
On 01/12/2022 02:07, Dmitry Baryshkov wrote:
On 01/12/2022 01:51, Kuogee Hsieh wrote:
Move data-lanes property from mdss_dp node to dp_out endpoint. Also
ad
Den 01.12.2022 15.16, skrev Konstantin Ryabitsev:
> On Thu, Dec 01, 2022 at 02:34:41PM +0100, Javier Martinez Canillas wrote:
Konstantin,
Can you add a rule in b4 to exclude sta...@vger.kernel.org
(sta...@kernel.org as well?) from getting the whole patchset?
>>>
>>> sta...@ke
During kexec on ARM device, we notice that device_shutdown() only calls
pm_runtime_force_suspend() while shutting down the GPU. This means the GPU
kthread is still running and further, there maybe active submits.
This causes all kinds of issues during a kexec reboot:
Warning from shutdown path:
From: Chris Wilson
Introduce the concept of padding the i915_vma with guard pages before
and after. The major consequence is that all ordinary uses of i915_vma
must use i915_vma_offset/i915_vma_size and not i915_vma.node.start/size
directly, as the drm_mm_node will include the guard pages that su
Hi Dave, Daniel,
Just one last fix for 6.1.
The following changes since commit b7b275e60bcd5f89771e865a8239325f86d9927d:
Linux 6.1-rc7 (2022-11-27 13:31:48 -0800)
are available in the Git repository at:
https://gitlab.freedesktop.org/agd5f/linux.git
tags/amd-drm-fixes-6.1-2022-12-01
for
On Sat, Nov 12, 2022 at 6:44 PM Rob Clark wrote:
>
> On Fri, Nov 11, 2022 at 1:08 PM Joel Fernandes wrote:
> >
> >
> >
> > > On Nov 11, 2022, at 2:50 PM, Joel Fernandes (Google)
> > > wrote:
> > >
> > > During kexec on ARM device, we notice that device_shutdown() only calls
> > > pm_runtime_fo
On Thu, Dec 1, 2022 at 7:33 PM Rob Clark wrote:
>
> On Thu, Dec 1, 2022 at 10:42 AM Joel Fernandes wrote:
> >
> > On Sat, Nov 12, 2022 at 6:35 PM Rob Clark wrote:
> > >
> > > On Fri, Nov 11, 2022 at 1:28 PM Akhil P Oommen
> > > wrote:
> > > >
> > > > On 11/12/2022 1:19 AM, Joel Fernandes (Goog
On 30/11/2022 22:09, Adam Skladowski wrote:
Follow other YAMLs and replace mdss name into display-subystem.
Signed-off-by: Adam Skladowski
Reviewed-by: Dmitry Baryshkov
We will pick this into msm-fixes during the next cycle.
---
.../devicetree/bindings/display/msm/qcom,qcm2290-mdss.yaml
Acked-by: Jason Ekstrand
On Thu, Dec 1, 2022 at 4:22 AM Daniel Vetter wrote:
> On Thu, 1 Dec 2022 at 11:07, Daniel Vetter wrote:
> >
> > On Wed, Nov 23, 2022 at 08:24:37PM +0100, Daniel Vetter wrote:
> > > It's a bit a FAQ, and we really can't claim to be the authoritative
> > > source for all
On Wed, 30 Nov 2022 21:09:40 +0100, Adam Skladowski wrote:
> Document compatible for tsens on Qualcomm SM6115 platform
> according to downstream dts it ship v2.4 of IP
>
> Signed-off-by: Adam Skladowski
> Acked-by: Krzysztof Kozlowski
> ---
> Documentation/devicetree/bindings/thermal/qcom-tsens
On Thu, Dec 1, 2022 at 10:42 AM Joel Fernandes wrote:
>
> On Sat, Nov 12, 2022 at 6:35 PM Rob Clark wrote:
> >
> > On Fri, Nov 11, 2022 at 1:28 PM Akhil P Oommen
> > wrote:
> > >
> > > On 11/12/2022 1:19 AM, Joel Fernandes (Google) wrote:
> > > > Even though the GPU is shut down, during kexec r
On Wed, 2022-11-30 at 17:42 +, Vivi, Rodrigo wrote:
> On Wed, 2022-11-30 at 09:32 -0800, Matt Roper wrote:
> > On Tue, Nov 29, 2022 at 06:02:45PM -0800, Alan Previn wrote:
> > > Starting with MTL, there will be two GT-tiles, a render and media
> > > tile. PXP as a service for supporting workl
From: Martin Krastev
LGTM!
Reviewed-by: Martin Krastev
Regards,
Martin
On 1.12.22 г. 19:53 ч., Zack Rusin wrote:
From: Zack Rusin
When SEV is enabled gmr's and mob's are explicitly disabled because
the encrypted system memory can not be used by the hypervisor.
The driver was disabli
On Thu, Dec 01, 2022 at 07:27:31AM -0800, Niranjana Vishwanathapura wrote:
On Thu, Dec 01, 2022 at 10:49:15AM +, Matthew Auld wrote:
On 29/11/2022 07:26, Niranjana Vishwanathapura wrote:
Support dump capture of persistent mappings upon user request.
Signed-off-by: Brian Welty
Signed-off-b
On Sat, Nov 12, 2022 at 6:35 PM Rob Clark wrote:
>
> On Fri, Nov 11, 2022 at 1:28 PM Akhil P Oommen
> wrote:
> >
> > On 11/12/2022 1:19 AM, Joel Fernandes (Google) wrote:
> > > Even though the GPU is shut down, during kexec reboot we can have
> > > userspace
> > > still running. This is especia
Am Donnerstag, dem 01.12.2022 um 11:30 +0100 schrieb Tomeu Vizoso:
> We will use these for differentiating between GPUs and NPUs, as the
> downstream driver does.
>
Thanks, patches 5-7 applied to my etnaviv/next branch.
Regards,
Lucas
> Signed-off-by: Tomeu Vizoso
> ---
> drivers/gpu/drm/etnav
tree/branch:
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master
branch HEAD: 2934ceb4e967b9233d0f97732e47175574a11406 Add linux-next specific
files for 20221201
Error/Warning reports:
https://lore.kernel.org/oe-kbuild-all/202211041320.coq8eelj-...@intel.com
https
From: Zack Rusin
When SEV is enabled gmr's and mob's are explicitly disabled because
the encrypted system memory can not be used by the hypervisor.
The driver was disabling GMR's but the presentation code, which depends
on GMR's, wasn't honoring it which lead to black screen on hosts
with SEV en
On 01/12/2022 19:32, Kuogee Hsieh wrote:
On 11/30/2022 4:21 PM, Dmitry Baryshkov wrote:
On 01/12/2022 02:07, Dmitry Baryshkov wrote:
On 01/12/2022 01:51, Kuogee Hsieh wrote:
Move data-lanes property from mdss_dp node to dp_out endpoint. Also
add link-frequencies property into dp_out endpoint
This simplifies the driver code a bit, as XArray already provides
internal locking. IDRs are implemented using XArrays anyways, so
this drops one level of unneeded abstraction.
Signed-off-by: Lucas Stach
---
drivers/gpu/drm/etnaviv/etnaviv_drv.h| 1 +
drivers/gpu/drm/etnaviv/etnaviv_gem
The fence lock currently protects two distinct things. It protects the fence
IDR from concurrent inserts and removes and also keeps drm_sched_job_arm and
drm_sched_entity_push_job in one atomic section to guarantee the fence seqno
monotonicity. Split the lock into those two functions.
Signed-off-b
Update the state HI header from the rnndb commit
5bf18f7d9a97 ("rnndb: expand MMU exception bitfields").
Signed-off-by: Lucas Stach
---
drivers/gpu/drm/etnaviv/state_hi.xml.h | 86 +-
1 file changed, 70 insertions(+), 16 deletions(-)
diff --git a/drivers/gpu/drm/etnaviv/
From: Christian Gmeiner
The MMU tells us the fault status. While the raw register value is
already printed, it's a bit more user friendly to translate the
fault reasons into human readable format.
Signed-off-by: Christian Gmeiner
Signed-off-by: Lucas Stach
---
drivers/gpu/drm/etnaviv/etnaviv_
On 01/12/2022 19:34, Kuogee Hsieh wrote:
On 11/30/2022 4:07 PM, Dmitry Baryshkov wrote:
On 01/12/2022 01:51, Kuogee Hsieh wrote:
Move data-lanes property from mdss_dp node to dp_out endpoint. Also
add link-frequencies property into dp_out endpoint as well. The last
frequency specified at link-
On 11/30/2022 4:07 PM, Dmitry Baryshkov wrote:
On 01/12/2022 01:51, Kuogee Hsieh wrote:
Move data-lanes property from mdss_dp node to dp_out endpoint. Also
add link-frequencies property into dp_out endpoint as well. The last
frequency specified at link-frequencies will be the max link rate
sup
On 11/30/2022 4:21 PM, Dmitry Baryshkov wrote:
On 01/12/2022 02:07, Dmitry Baryshkov wrote:
On 01/12/2022 01:51, Kuogee Hsieh wrote:
Move data-lanes property from mdss_dp node to dp_out endpoint. Also
add link-frequencies property into dp_out endpoint as well. The last
frequency specified at
Reviewed-by: Luben Tuikov
Regards,
Luben
On 2022-11-30 21:24, ye.xingc...@zte.com.cn wrote:
> From: ye xingchen
>
> Replace the open-code with sysfs_emit() to simplify the code.
>
> Signed-off-by: ye xingchen
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 2 +-
> 1 file changed, 1 insert
Hi Dave and Daniel,
Here goes our next-fixes targeting 6.2-rc1.
Please notice that DG2 DMC had a minor bump version in order
to fix the remaining issues related to PCI warns at DC state
transition. I didn't request the team to provide the fallback
to the previous version because we are moving thi
On Mon, Nov 28, 2022 at 09:19:37AM +0100, Maxime Ripard wrote:
> The mode name in struct drm_cmdline_mode can hold 32 characters at most,
> which can easily get overrun. Switch to strscpy() to prevent such a
> thing.
>
> Reported-by: coverity-bot
> Addresses-Coverity-ID: 1527354 ("Security best p
Applied patches 1 and 3. Patch 2 is not exactly correct, I'll send
out an improved version of patch 2.
Thanks!
Alex
On Thu, Dec 1, 2022 at 10:38 AM Peter Maucher wrote:
>
> Explain difference between gttsize and gartsize
> module parameters, and amend related documentation.
> Also, amdgpu does
On 11/18/22 16:51, Hamza Mahfooz wrote:
Currently, userspace doesn't have a way to communicate selective updates
to displays. So, enable support for FB_DAMAGE_CLIPS for DCN ASICs newer
than DCN301, convert DRM damage clips to dc dirty rectangles and fill
them into dirty_rects in fill_dc_dirty_
Add documentation for the new io-supply property, which specifies the
regulator for the I/O voltage supply on platforms where the panel
panel power and I/O supplies are separate.
Signed-off-by: Otto Pflüger
---
.../bindings/display/panel/panel-mipi-dbi-spi.yaml| 8 +++-
1 file change
To support platforms with a separate I/O voltage supply, set the new
io_regulator property along with the regulator property of the DBI
device. Read the I/O supply from a new "io-supply" device tree
property.
Signed-off-by: Otto Pflüger
---
drivers/gpu/drm/tiny/panel-mipi-dbi.c | 5 +
1 file
The MIPI DBI specification defines separate vdd (panel power) and
vddi (I/O voltage) supplies. Displays that require different voltages
for the different supplies do exist, so the supplies cannot be
combined into one as they are now. Add a new io_regulator property to
the mipi_dbi_dev struct which
As stated in
Documentation/devicetree/bindings/display/panel/panel-mipi-dbi-spi.yml,
the MIPI DBI specification defines two power supplies, one for powering
the panel and one for the I/O voltage. The panel-mipi-dbi driver
currently only supports specifying a single "power-supply" in the
device tre
Hi,
On Wed, Nov 30, 2022 at 7:22 AM Uwe Kleine-König
wrote:
>
> .get_state() might fail in some cases. To make it possible that a driver
> signals such a failure change the prototype of .get_state() to return an
> error code.
>
> This patch was created using coccinelle and the following semantic
The amdgpu kernel module has supported RDNA for a while,
mention that in the module description.
Signed-off-by: Peter Maucher
---
Documentation/gpu/amdgpu/index.rst | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/gpu/amdgpu/index.rst
b/Documentation/gpu/amdgpu/
GART and GTT are two abbreviations that should be mentioned in the
glossary.
Signed-off-by: Peter Maucher
---
Documentation/gpu/amdgpu/amdgpu-glossary.rst | 6 ++
1 file changed, 6 insertions(+)
diff --git a/Documentation/gpu/amdgpu/amdgpu-glossary.rst
b/Documentation/gpu/amdgpu/amdgpu-glo
Document difference between amdgpu.gartsize and amdgpu.gttsize
module parameters, as initially explained by Alex Deucher here:
https://lists.freedesktop.org/archives/dri-devel/2022-October/375358.html
Signed-off-by: Peter Maucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 11 ++-
1 fi
Explain difference between gttsize and gartsize
module parameters, and amend related documentation.
Also, amdgpu does support RDNA GPUs.
Peter Maucher (3):
drm/amdgpu: improve GART and GTT documentation
drm/amdgpu: add GART and GTT to glossary
drm/amdgpu: mention RDNA support in docu
Docu
Hi,
On Wed, Nov 30, 2022 at 7:22 AM Uwe Kleine-König
wrote:
>
> .get_state() can return an error indication. Make use of it to propagate
> failing hardware accesses.
>
> Signed-off-by: Uwe Kleine-König
> ---
> drivers/gpu/drm/bridge/ti-sn65dsi86.c | 8
> 1 file changed, 4 insertions(+)
On Thu, Dec 01, 2022 at 10:49:15AM +, Matthew Auld wrote:
On 29/11/2022 07:26, Niranjana Vishwanathapura wrote:
Support dump capture of persistent mappings upon user request.
Signed-off-by: Brian Welty
Signed-off-by: Niranjana Vishwanathapura
---
.../drm/i915/gem/i915_gem_vm_bind_object.
On Thu, Dec 01, 2022 at 03:06:04PM +, Jiaxin Yu (俞家鑫) wrote:
> On Tue, 2022-11-29 at 17:22 +, Mark Brown wrote:
> > static const struct snd_kcontrol_new
> > mt8186_mt6366_rt1019_rt5682s_controls[] = {
> > SOC_DAPM_PIN_SWITCH("Speakers"),
> > SOC_DAPM_PIN_SWITCH("Headpho
We'll need a function that looks up an encoder by its vc4_encoder_type.
Such a function is already present in the CRTC code, so let's make it
public so that we can reuse it in the unit tests.
Reviewed-by: Javier Martinez Canillas
Reviewed-by: Maíra Canal
Signed-off-by: Maxime Ripard
---
driver
Now that we have VC4-specific tests in place, let's document them
properly.
Signed-off-by: Maxime Ripard
---
Documentation/gpu/vc4.rst | 16
1 file changed, 16 insertions(+)
diff --git a/Documentation/gpu/vc4.rst b/Documentation/gpu/vc4.rst
index 5df1d98b9544..a2375f1584e6 1006
The current helper to allocate a DRM device doesn't allow for any
subclassing by drivers, which is going to be troublesome as we work on
getting some kunit testing on atomic modesetting code.
Let's use a similar pattern to the other allocation helpers by providing
the structure size and offset as
The HVS to PixelValve muxing code is fairly error prone and has a bunch
of arbitrary constraints due to the hardware setup.
Let's create a test suite that makes sure that the possible combinations
work and the invalid ones don't.
Reviewed-by: Javier Martinez Canillas
Signed-off-by: Maxime Ripard
Accessing a register when running under kunit is a bad idea since our
device is completely mocked.
Fail the current test if we ever access any of our hardware registers.
Reviewed-by: Javier Martinez Canillas
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_crtc.c | 13 +++-
Some tests will need to provide their own drm_driver instead of relying
on the dumb one in the helpers, so let's create a helper that allows to
do so.
Reviewed-by: Javier Martinez Canillas
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/tests/drm_kunit_helpers.c | 15 +++--
include/drm/drm
We'll need to initialize the HVS structure without a backing device to
create a mock we'll use for testing.
Split the structure initialization part into a separate function.
Reviewed-by: Javier Martinez Canillas
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_drv.h | 1 +
drivers/gpu
In order to test the current atomic_check hooks we need to have a DRM
device that has roughly the same capabilities and layout that the actual
hardware. We'll also need a bunch of functions to create arbitrary
atomic states.
Let's create some helpers to create a device that behaves like the real
o
The current vc4_crtc_init() helper assumes that we will be using
hardware planes and calls vc4_plane_init().
While it's a reasonable assumption, we'll want to mock the plane and
thus provide our own. Let's create a helper that will take the plane as
an argument.
Reviewed-by: Javier Martinez Canil
DRM-managed actions are supposed to be ran whenever the device is
released. Let's introduce a basic unit test to make sure it happens.
Reviewed-by: Javier Martinez Canillas
Reviewed-by: Maíra Canal
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/tests/Makefile | 1 +
drivers/gpu/dr
In order to introduce unit tests for the HVS state computation, we'll
need access to the vc4_hvs_state struct definition and its associated
helpers.
Let's move them in our driver header.
Reviewed-by: Javier Martinez Canillas
Reviewed-by: Maíra Canal
Signed-off-by: Maxime Ripard
---
drivers/gp
The device managed resources are ran if the device has bus, which is not
the case of a root_device.
Let's use a platform_device instead.
Reviewed-by: Javier Martinez Canillas
Reviewed-by: Maíra Canal
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/tests/drm_kunit_helpers.c | 16 +
The device name isn't really useful, we can just define it instead of
exposing it in the API.
Reviewed-by: Maíra Canal
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/tests/drm_client_modeset_test.c | 3 +--
drivers/gpu/drm/tests/drm_kunit_helpers.c | 7 ---
drivers/gpu/drm/tests/drm
We'll need in some tests to control when the device needs to be added
and removed, so let's split the device creation from the DRM device
creation function.
Reviewed-by: Maíra Canal
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/tests/drm_client_modeset_test.c | 14 ++-
drivers/gpu/drm/te
The device managed resources are freed when the device is detached, so
it has to be bound in the first place.
Let's create a fake driver that we will bind to our fake device to
benefit from the device managed cleanups in our tests.
Reviewed-by: Maíra Canal
Signed-off-by: Maxime Ripard
---
driv
The name doesn't really fit the conventions for the other helpers in
DRM/KMS, so let's rename it to make it obvious that we allocate a new
DRM device.
Reviewed-by: Maíra Canal
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/tests/drm_client_modeset_test.c | 3 ++-
drivers/gpu/drm/tests/drm_kun
drm_kunit_device_init() among other things will allocate a device and
wrap around root_device_register. This function is exported with
EXPORT_SYMBOL_GPL, so we can't really change the license.
Fixes: 199557fab925 ("drm/tests: helpers: Add missing export")
Suggested-by: Javier Martinez Canillas
Si
Driver-specific tests will need access to the helpers without pulling
every DRM framework test. Let's create an intermediate Kconfig options
for the helpers.
Suggested-by: Maíra Canal
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/Kconfig| 7 +++
drivers/gpu/drm/Makefile | 2
Commit 44a3928324e9 ("drm/tests: Add Kunit Helpers") introduced the
drm_kunit_device_init() function but didn't document it properly. Add
that documentation.
Reviewed-by: Maíra Canal
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/tests/drm_kunit_helpers.c | 17 +
1 file change
Hi,
This series introduce Kunit tests to the vc4 KMS driver, but unlike what we
have been doing so far in KMS, it actually tests the atomic modesetting code.
In order to do so, I've had to improve a fair bit on the Kunit helpers already
found in the tree in order to register a full blown and some
We'll need to use those helpers from drivers too, so let's move it to a
more visible location.
Reviewed-by: Javier Martinez Canillas
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/tests/drm_client_modeset_test.c| 3 +--
drivers/gpu/drm/tests/drm_kunit_helpers.c |
On Thu, Dec 01, 2022 at 10:10:14AM +, Matthew Auld wrote:
On 29/11/2022 23:26, Niranjana Vishwanathapura wrote:
On Wed, Nov 23, 2022 at 11:42:58AM +, Matthew Auld wrote:
On 16/11/2022 00:37, Niranjana Vishwanathapura wrote:
On Tue, Nov 15, 2022 at 03:15:03PM -0800, Niranjana
Vishwanath
On 01/12/2022 14:44, Andi Shyti wrote:
From: Chris Wilson
Introduce the concept of padding the i915_vma with guard pages before
and after. The major consequence is that all ordinary uses of i915_vma
must use i915_vma_offset/i915_vma_size and not i915_vma.node.start/size
directly, as the drm_m
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