Partially restore the handling of the GPU load history. Accumulate the
busy_time and and total_time measured in active state during the polling
period. This results in slightly smoother picture of the GPU frequencies
(measured on the a530/msm8996, using kmscube in different resolutions).
A call to
No functional modification involved.
drivers/gpu/drm/gma500/cdv_device.c:218 cdv_errata() warn: inconsistent
indenting.
Reported-by: Abaci Robot
Link: https://bugzilla.openanolis.cn/show_bug.cgi?id=4126
Signed-off-by: Jiapeng Chong
---
drivers/gpu/drm/gma500/cdv_device.c | 27
On 21.02.2023 03:08, Rob Herring wrote:
> On Fri, Feb 17, 2023 at 12:29:07PM +0100, Konrad Dybcio wrote:
>> Add bindings for the 2000x1200px IPS panel found on Lenovo Tab P11/
>> XiaoXin Pad devices.
>>
>> Signed-off-by: Konrad Dybcio
>> ---
>> .../display/panel/lenovo,nt36523w-boe-j606.yaml
On Fri, Feb 17, 2023 at 12:29:07PM +0100, Konrad Dybcio wrote:
> Add bindings for the 2000x1200px IPS panel found on Lenovo Tab P11/
> XiaoXin Pad devices.
>
> Signed-off-by: Konrad Dybcio
> ---
> .../display/panel/lenovo,nt36523w-boe-j606.yaml| 60
> ++
> 1 file changed
On Mon, 20 Feb 2023 at 21:27, Karol Herbst wrote:
>
> On Mon, Feb 20, 2023 at 11:51 AM Chris Clayton
> wrote:
> >
> >
> >
> > On 20/02/2023 05:35, Ben Skeggs wrote:
> > > On Sun, 19 Feb 2023 at 04:55, Chris Clayton
> > > wrote:
> > >>
> > >>
> > >>
> > >> On 18/02/2023 15:19, Chris Clayton wro
From: Michael Williamson
If the I2C bus is connected on the TFP410, then use the register
status bit to determine connection state. This is needed, in particular,
for polling the state when the Hot Plug detect is not connected to
a controlling CPU via GPIO/IRQ lane.
Signed-off-by: Michael Willi
From: Michael Williamson
The logic to configure polling (vs async/irq notification) of hot-plug
events was not correct. If the connected bridge requires polling,
then inform the upstream bridge we also require polling.
Signed-off-by: Michael Williamson
Signed-off-by: Jonathan Cormier
---
dri
From: Michael Williamson
The TFP410 driver does not support I2C. As such, the device remains in
Power Down if the I2C is enabled by the bootstrap pins.
Add basic support for the I2C interface, and provide support to take
the device out of power down when enabled. Also read the bootstrap mode
p
The TFP410 driver does not support I2C. As such, the device remains in
Power Down if the I2C is enabled by the bootstrap pins.
Add basic support for the I2C interface, and provide support to take
the device out of power down when enabled. Also read the bootstrap mode
pins via the CTL_1_MODE regi
On Mon, Feb 20, 2023 at 06:06:03PM +0100, Danilo Krummrich wrote:
> On 2/20/23 16:10, Matthew Wilcox wrote:
> > This is why we like people to use the spinlock embedded in the tree.
> > There's nothing for the user to care about. If the access really is
> > serialised, acquiring/releasing the uncon
From: Rob Clark
v2: rebase
Signed-off-by: Rob Clark
---
drivers/gpu/drm/i915/i915_request.c | 20
1 file changed, 20 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_request.c
b/drivers/gpu/drm/i915/i915_request.c
index 7503dcb9043b..44491e7e214c 100644
--- a/drivers
From: Rob Clark
Will be used in the next commit to set a deadline on fences that an
atomic update is waiting on.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/drm_vblank.c | 32
include/drm/drm_vblank.h | 1 +
2 files changed, 33 insertions(+)
diff --git a
From: Rob Clark
Track the nearest deadline on a fence timeline and set a timer to expire
shortly before to trigger boost if the fence has not yet been signaled.
v2: rebase
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/msm_fence.c | 74 +
drivers/gpu/drm/msm/
From: Rob Clark
Add a new flag to let userspace provide a deadline as a hint for syncobj
and timeline waits. This gives a hint to the driver signaling the
backing fences about how soon userspace needs it to compete work, so it
can addjust GPU frequency accordingly. An immediate deadline can be
From: Rob Clark
Allow userspace to use the EPOLLPRI/POLLPRI flag to indicate an urgent
wait (as opposed to a "housekeeping" wait to know when to cleanup after
some work has completed). Usermode components of GPU driver stacks
often poll() on fence fd's to know when it is safe to do things like
f
From: Rob Clark
Add a way for various userspace waits to signal urgency.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/msm_drv.c | 12
drivers/gpu/drm/msm/msm_gem.c | 5 +
include/uapi/drm/msm_drm.h| 14 --
3 files changed, 25 insertions(+), 6 deletions(-)
As the finished fence is the one that is exposed to userspace, and
therefore the one that other operations, like atomic update, would
block on, we need to propagate the deadline from from the finished
fence to the actual hw fence.
v2: Split into drm_sched_fence_set_parent() (ckoenig)
v3: Ensure a
From: Rob Clark
This consists of simply storing the most recent deadline, and adding an
ioctl to retrieve the deadline. This can be used in conjunction with
the SET_DEADLINE ioctl on a fence fd for testing. Ie. create various
sw_sync fences, merge them into a fence-array, set deadline on the
fe
From: Rob Clark
Add a way to set a deadline on remaining resv fences according to the
requested usage.
Signed-off-by: Rob Clark
Reviewed-by: Christian König
---
drivers/dma-buf/dma-resv.c | 22 ++
include/linux/dma-resv.h | 2 ++
2 files changed, 24 insertions(+)
diff
From: Rob Clark
For an atomic commit updating a single CRTC (ie. a pageflip) calculate
the next vblank time, and inform the fence(s) of that deadline.
v2: Comment typo fix (danvet)
Signed-off-by: Rob Clark
Reviewed-by: Daniel Vetter
Signed-off-by: Rob Clark
---
drivers/gpu/drm/drm_atomic_he
From: Rob Clark
The initial purpose is for igt tests, but this would also be useful for
compositors that wait until close to vblank deadline to make decisions
about which frame to show.
The igt tests can be found at:
https://gitlab.freedesktop.org/robclark/igt-gpu-tools/-/commits/fence-deadline
From: Rob Clark
Propagate the deadline to all the fences in the array.
Signed-off-by: Rob Clark
Reviewed-by: Christian König
---
drivers/dma-buf/dma-fence-array.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/drivers/dma-buf/dma-fence-array.c
b/drivers/dma-buf/dma-fence-ar
From: Rob Clark
Propagate the deadline to all the fences in the chain.
Signed-off-by: Rob Clark
Reviewed-by: Christian König for this one.
---
drivers/dma-buf/dma-fence-chain.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/drivers/dma-buf/dma-fence-chain.c
b/drivers/dma-
From: Rob Clark
Add a way to hint to the fence signaler of an upcoming deadline, such as
vblank, which the fence waiter would prefer not to miss. This is to aid
the fence signaler in making power management decisions, like boosting
frequency as the deadline approaches and awareness of missing de
From: Rob Clark
This series adds a deadline hint to fences, so realtime deadlines
such as vblank can be communicated to the fence signaller for power/
frequency management decisions.
This is partially inspired by a trick i915 does, but implemented
via dma-fence for a couple of reasons:
1) To co
On 2/20/23 16:10, Matthew Wilcox wrote:
On Mon, Feb 20, 2023 at 03:00:59PM +0100, Danilo Krummrich wrote:
On 2/17/23 20:38, Matthew Wilcox wrote:
On Fri, Feb 17, 2023 at 02:44:10PM +0100, Danilo Krummrich wrote:
Generic components making use of the maple tree (such as the
DRM GPUVA Manager) de
On Sun, Feb 19, 2023 at 5:04 PM Randy Dunlap wrote:
>
> DRM_MSM no longer needs DEVFREQ_GOV_SIMPLE_ONDEMAND (since dbd7a2a941b8
> in linux-next: PM / devfreq: Fix build issues with devfreq disabled),
> so remove that select from the DRM_MSM Kconfig file.
>
> Fixes: 6563f60f14cb ("drm/msm/gpu: Add
On Mon, Feb 20, 2023 at 8:51 AM Tvrtko Ursulin
wrote:
>
>
> On 20/02/2023 16:44, Tvrtko Ursulin wrote:
> >
> > On 20/02/2023 15:52, Rob Clark wrote:
> >> On Mon, Feb 20, 2023 at 3:33 AM Tvrtko Ursulin
> >> wrote:
> >>>
> >>>
> >>> On 17/02/2023 20:45, Rodrigo Vivi wrote:
> >
> > [snip]
> >
> >>>
On Mon, Feb 20, 2023 at 8:44 AM Tvrtko Ursulin
wrote:
>
>
> On 20/02/2023 15:52, Rob Clark wrote:
> > On Mon, Feb 20, 2023 at 3:33 AM Tvrtko Ursulin
> > wrote:
> >>
> >>
> >> On 17/02/2023 20:45, Rodrigo Vivi wrote:
>
> [snip]
>
> >> Yeah I agree. And as not all media use cases are the same, as a
On 20/02/2023 16:44, Tvrtko Ursulin wrote:
On 20/02/2023 15:52, Rob Clark wrote:
On Mon, Feb 20, 2023 at 3:33 AM Tvrtko Ursulin
wrote:
On 17/02/2023 20:45, Rodrigo Vivi wrote:
[snip]
Yeah I agree. And as not all media use cases are the same, as are not
all compute contexts someone som
From: suijingfeng
Loongson display controller IP has been integrated in both Loongson
North Bridge chipset(ls7a1000 and ls7a2000) and Loongson SoCs(ls2k1000
and ls2k2000 etc), it even been included in Loongson BMC products.
The display controller is a PCI device, it has two display pipe.
For the
On 20/02/2023 15:52, Rob Clark wrote:
On Mon, Feb 20, 2023 at 3:33 AM Tvrtko Ursulin
wrote:
On 17/02/2023 20:45, Rodrigo Vivi wrote:
[snip]
Yeah I agree. And as not all media use cases are the same, as are not
all compute contexts someone somewhere will need to run a series of
workloads
From: suijingfeng
Loongson display controller IP has been integrated in both Loongson
North Bridge chipset(ls7a1000 and ls7a2000) and Loongson SoCs(ls2k1000
and ls2k2000 etc), it even been included in Loongson BMC products.
The display controller is a PCI device, it has two display pipe.
For the
On Mon, Feb 20, 2023 at 1:05 AM Pekka Paalanen wrote:
>
> On Sat, 18 Feb 2023 13:15:52 -0800
> Rob Clark wrote:
>
> > From: Rob Clark
> >
> > Add a new flag to let userspace provide a deadline as a hint for syncobj
> > and timeline waits. This gives a hint to the driver signaling the
> > backin
On Thu, Feb 20, 2023 at 17:55 Stanislaw Gruszka
wrote:
> On Fri, Feb 17, 2023 at 11:34:39AM +, Tomer Tayar wrote:
> >
> > > Ok, just place replace compose_device_in_use_info() with snprintf().
> > > I don't think you need custom implementation of snprintf().
> >
> > compose_device_in_use_inf
On Mon, Feb 20, 2023 at 12:53 AM Pekka Paalanen wrote:
>
> On Sat, 18 Feb 2023 13:15:49 -0800
> Rob Clark wrote:
>
> > From: Rob Clark
> >
> > Allow userspace to use the EPOLLPRI/POLLPRI flag to indicate an urgent
> > wait (as opposed to a "housekeeping" wait to know when to cleanup after
> > so
On Mon, 20 Feb 2023 at 15:57, Simon Ser wrote:
>
> On Monday, February 20th, 2023 at 16:49, Dave Stevenson
> wrote:
>
> > > + * User-space sets &drm_prime_handle.fd with a DMA-BUF file descriptor to
> > > + * import, and gets back a GEM handle in &drm_prime_handle.handle.
> > > + * &drm_prime_ha
On Mon, Feb 20, 2023 at 12:27 AM Christian König
wrote:
>
> Am 18.02.23 um 22:15 schrieb Rob Clark:
> > From: Rob Clark
> >
> > The initial purpose is for igt tests, but this would also be useful for
> > compositors that wait until close to vblank deadline to make decisions
> > about which frame
On Monday, February 20th, 2023 at 16:49, Dave Stevenson
wrote:
> > + * User-space sets &drm_prime_handle.fd with a DMA-BUF file descriptor to
> > + * import, and gets back a GEM handle in &drm_prime_handle.handle.
> > + * &drm_prime_handle.flags is unused.
>
> Is it worth explicitly stating tha
On 20/02/2023 15:45, Rob Clark wrote:
On Mon, Feb 20, 2023 at 4:22 AM Tvrtko Ursulin
wrote:
On 17/02/2023 17:00, Rob Clark wrote:
On Fri, Feb 17, 2023 at 8:03 AM Tvrtko Ursulin
wrote:
[snip]
adapted from your patches.. I think the basic idea of deadlines
(which includes "I want it NO
On Mon, Feb 20, 2023 at 1:08 AM Pekka Paalanen wrote:
>
> On Sat, 18 Feb 2023 13:15:53 -0800
> Rob Clark wrote:
>
> > From: Rob Clark
> >
> > Will be used in the next commit to set a deadline on fences that an
> > atomic update is waiting on.
> >
> > Signed-off-by: Rob Clark
> > ---
> > driver
On Fri, Feb 17, 2023 at 11:34:39AM +, Tomer Tayar wrote:
>
> > Ok, just place replace compose_device_in_use_info() with snprintf().
> > I don't think you need custom implementation of snprintf().
>
> compose_device_in_use_info() was added to handle in a single place the
> snprintf() return
On Mon, Feb 20, 2023 at 3:33 AM Tvrtko Ursulin
wrote:
>
>
> On 17/02/2023 20:45, Rodrigo Vivi wrote:
> > On Fri, Feb 17, 2023 at 09:00:49AM -0800, Rob Clark wrote:
> >> On Fri, Feb 17, 2023 at 8:03 AM Tvrtko Ursulin
> >> wrote:
> >>>
> >>>
> >>> On 17/02/2023 14:55, Rob Clark wrote:
> On Fri
Hi Simon
On Thu, 16 Feb 2023 at 13:09, Simon Ser wrote:
>
> Signed-off-by: Simon Ser
> Cc: Daniel Vetter
> Cc: Pekka Paalanen
> Cc: Daniel Stone
> ---
> include/uapi/drm/drm.h | 17 +
> 1 file changed, 17 insertions(+)
>
> diff --git a/include/uapi/drm/drm.h b/include/uapi/dr
On 18/02/2023 21:15, Rob Clark wrote:
From: Rob Clark
Signed-off-by: Rob Clark
---
This should probably be re-written by someone who knows the i915
request/timeline stuff better, to deal with non-immediate deadlines.
But as-is I think this should be enough to handle the case where
we want s
On Mon, Feb 20, 2023 at 4:22 AM Tvrtko Ursulin
wrote:
>
>
> On 17/02/2023 17:00, Rob Clark wrote:
> > On Fri, Feb 17, 2023 at 8:03 AM Tvrtko Ursulin
> > wrote:
>
> [snip]
>
> >>> adapted from your patches.. I think the basic idea of deadlines
> >>> (which includes "I want it NOW" ;-)) isn't cont
On 2/16/23 23:44, Jani Nikula wrote:
> Mostly this is prep work and plumbing for easier use of displayid
> structure version and primary use case for parsing the displayid blocks,
> but it can be nicely used for figuring out non-desktop too.
>
> Completely untested. :)
>
> BR,
> Jani.
>
> Cc: Ia
On Mon, Feb 20, 2023 at 03:22:03PM +0100, Thomas Zimmermann wrote:
> Hi
>
> Am 16.02.23 um 12:33 schrieb Gerd Hoffmann:
> > On Wed, Feb 15, 2023 at 05:15:17PM +0100, Thomas Zimmermann wrote:
> > > Set the VGA bit for unblanking with macro constants instead of magic
> > > values. No functional chan
On Sun, Feb 12, 2023 at 10:44:28PM +0200, Oded Gabbay wrote:
> From: Ofir Bitton
>
> Currently we support scenarios where a timestamp registration request
> of a certain offset is received during the interrupt handling of the
> same offset. In this case we give a grace period of up to 100us for
>
On Mon, Feb 20, 2023 at 5:19 AM Tvrtko Ursulin
wrote:
>
>
> On 18/02/2023 19:56, Rob Clark wrote:
> > On Thu, Feb 16, 2023 at 2:59 AM Tvrtko Ursulin
> > wrote:
> >>
> >> From: Tvrtko Ursulin
> >>
> >> Use the previously added dma-fence tracking of explicit waiters.
> >>
> >> Signed-off-by: Tvrtk
Hi Hans
On Sat, 18 Feb 2023 at 11:33, Hans Verkuil wrote:
>
> Hi Maxime, Dave,
>
> On 26/01/2023 14:46, Maxime Ripard wrote:
> > From: Dave Stevenson
> >
> > Copy Intel's "Broadcast RGB" property semantics to add manual override
> > of the HDMI pixel range for monitors that don't abide by the co
On Mon, Feb 20, 2023 at 03:00:59PM +0100, Danilo Krummrich wrote:
> On 2/17/23 20:38, Matthew Wilcox wrote:
> > On Fri, Feb 17, 2023 at 02:44:10PM +0100, Danilo Krummrich wrote:
> > > Generic components making use of the maple tree (such as the
> > > DRM GPUVA Manager) delegate the responsibility o
On 2/17/23 20:38, Matthew Wilcox wrote:
On Fri, Feb 17, 2023 at 02:44:10PM +0100, Danilo Krummrich wrote:
Generic components making use of the maple tree (such as the
DRM GPUVA Manager) delegate the responsibility of ensuring mutual
exclusion to their users.
While such components could inherit
On 2/17/23 19:34, Liam R. Howlett wrote:
* Danilo Krummrich [230217 08:44]:
Split up the MA_STATE() macro such that components using the maple tree
can easily inherit from struct ma_state and build custom tree walk
macros to hide their internals from users.
Example:
struct sample_iter {
On 2/17/23 20:45, Matthew Wilcox wrote:
On Fri, Feb 17, 2023 at 02:44:09PM +0100, Danilo Krummrich wrote:
\#define SAMPLE_ITER(name, __mgr) \
struct sample_iter name = { \
.mas = __MA_STATE(&(__mgr)->mt, 0, 0),
This is usually called MA_STATE_INIT()
Yep, that's better
Hi
Am 16.02.23 um 12:33 schrieb Gerd Hoffmann:
On Wed, Feb 15, 2023 at 05:15:17PM +0100, Thomas Zimmermann wrote:
Set the VGA bit for unblanking with macro constants instead of magic
values. No functional changes.
blank/unblank should work simliar to bochs (see commit 250e743915d4),
that is m
This mail never made it to dri-devel.
Am 17.02.23 um 14:26 schrieb Javier Martinez Canillas:
Thomas Zimmermann writes:
The primary plane has the atomic_disable helper set, so atomic_update
won't be called if the plane gets disabled. Remove the respective branch
from the helper.
Signed-off-by
From: Ville Syrjälä
commit bb2ff6c27bc9e1da4d3ec5e7b1d6b9df1092cb5a upstream.
CONFIG_DRM_USE_DYNAMIC_DEBUG breaks debug prints for (at least modular)
drm drivers. The debug prints can be reinstated by manually frobbing
/sys/module/drm/parameters/debug after the fact, but at that point the
damage
On 18/02/2023 19:54, Rob Clark wrote:
On Thu, Feb 16, 2023 at 3:00 AM Tvrtko Ursulin
wrote:
From: Tvrtko Ursulin
Track how many callers are explicity waiting on a fence to signal and
allow querying that via new dma_fence_wait_count() API.
This provides infrastructure on top of which gener
On 18/02/2023 19:56, Rob Clark wrote:
On Thu, Feb 16, 2023 at 2:59 AM Tvrtko Ursulin
wrote:
From: Tvrtko Ursulin
Use the previously added dma-fence tracking of explicit waiters.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/drm_syncobj.c | 6 +++---
1 file changed, 3 insertions(+)
On 17.02.2023 13:46, Arnd Bergmann wrote:
> From: Arnd Bergmann
>
> With gcc-7 and earlier, there are lots of warnings like
>
> In file included from :0:0:
> In function '__guc_context_policy_add_priority.isra.66',
> inlined from '__guc_context_set_prio.isra.67' at
> drivers/gpu/drm/i915
On Mon, 2023-02-20 at 11:16 +0100, Alexander Stein wrote:
> Hi Liu,
Hi Alexander,
>
> Am Montag, 20. Februar 2023, 09:55:19 CET schrieb Alexander Stein:
> > Hi Liu,
> >
> > Am Freitag, 17. Februar 2023, 09:59:14 CET schrieb Liu Ying:
> > > On Fri, 2023-02-17 at 09:18 +0100, Alexander Stein wrot
Hi
Am 17.02.23 um 20:47 schrieb Daniel Vetter:
Some vague evidences suggests this can go wrong. Try to prevent it by
holding the right mutex and clearing ->deferred_setup to make sure we
later on don't accidentally try to re-register the fbdev when the
driver thought it had it all cleaned up alr
On Mon, Feb 06, 2023 at 08:58:30PM +0100, Luca Weiss wrote:
> PMI8950 contains WLED of version 4. Add support for it to the driver.
>
> Signed-off-by: Luca Weiss
Reviewed-by: Daniel Thompson
> ---
> While adding dt-bindings and dts in a previous series I forgot to add the
> compatible to the d
On 17/02/2023 17:00, Rob Clark wrote:
On Fri, Feb 17, 2023 at 8:03 AM Tvrtko Ursulin
wrote:
[snip]
adapted from your patches.. I think the basic idea of deadlines
(which includes "I want it NOW" ;-)) isn't controversial, but the
original idea got caught up in some bikeshed (what about com
On 17/02/2023 09.18, Alexander Stein wrote:
> Hi Liu,
>
> Am Freitag, 17. Februar 2023, 07:54:01 CET schrieb Liu Ying:
>> Hi,
>>
>> This patch set aims to add i.MX93 LCDIF display controller support
>> in the existing LCDIF DRM driver. The LCDIF embedded in i.MX93 SoC
>> is essentially the same t
Add a driver for panels using the Novatek NT36523 display driver IC.
Signed-off-by: Jianhua Lu
---
Changes in v2:
- Refactor and clean up source code
MAINTAINERS | 7 +
drivers/gpu/drm/panel/Kconfig | 10 +
drivers/gpu/drm/panel/Makefile
Novatek NT36523 is a display driver IC used to drive DSI panels.
Signed-off-by: Jianhua Lu
---
Changes in v2:
- Drop unnecessary description
- dsi0 -> dsi
- Correct indentation
.../display/panel/novatek,nt36523.yaml| 95 +++
1 file changed, 95 insertions(+)
create
On 17/02/2023 20:45, Rodrigo Vivi wrote:
On Fri, Feb 17, 2023 at 09:00:49AM -0800, Rob Clark wrote:
On Fri, Feb 17, 2023 at 8:03 AM Tvrtko Ursulin
wrote:
On 17/02/2023 14:55, Rob Clark wrote:
On Fri, Feb 17, 2023 at 4:56 AM Tvrtko Ursulin
wrote:
On 16/02/2023 18:19, Rodrigo Vivi wrote
On Mon, Feb 20, 2023 at 11:51 AM Chris Clayton wrote:
>
>
>
> On 20/02/2023 05:35, Ben Skeggs wrote:
> > On Sun, 19 Feb 2023 at 04:55, Chris Clayton
> > wrote:
> >>
> >>
> >>
> >> On 18/02/2023 15:19, Chris Clayton wrote:
> >>>
> >>>
> >>> On 18/02/2023 12:25, Karol Herbst wrote:
> On Sat,
On 20/02/2023 05:35, Ben Skeggs wrote:
> On Sun, 19 Feb 2023 at 04:55, Chris Clayton wrote:
>>
>>
>>
>> On 18/02/2023 15:19, Chris Clayton wrote:
>>>
>>>
>>> On 18/02/2023 12:25, Karol Herbst wrote:
On Sat, Feb 18, 2023 at 1:22 PM Chris Clayton
wrote:
>
>
>
> On 15/0
On Mon, 20 Feb 2023 at 11:59, Konrad Dybcio wrote:
> On 18.02.2023 17:47, Dmitry Baryshkov wrote:
> > On 18/02/2023 13:04, Konrad Dybcio wrote:
> >> On 17.02.2023 22:07, Dmitry Baryshkov wrote:
> >>> On 14/02/2023 19:31, Konrad Dybcio wrote:
> Currently we only utilize the OPP table connected
On 20.02.2023 11:31, Krzysztof Kozlowski wrote:
> On 20/02/2023 11:24, Konrad Dybcio wrote:
>>
>>
>> On 18.02.2023 15:49, Krzysztof Kozlowski wrote:
>>> On 18/02/2023 12:23, Konrad Dybcio wrote:
On 18.02.2023 11:14, Krzysztof Kozlowski wrote:
> On 17/02/2023 22:13, Bryan O'Don
On 20/02/2023 11:24, Konrad Dybcio wrote:
>
>
> On 18.02.2023 15:49, Krzysztof Kozlowski wrote:
>> On 18/02/2023 12:23, Konrad Dybcio wrote:
>>>
>>>
>>> On 18.02.2023 11:14, Krzysztof Kozlowski wrote:
On 17/02/2023 22:13, Bryan O'Donoghue wrote:
> On 17/02/2023 12:24, Krzysztof Kozlowski
Hi Ondřej,
hi all,
Ondřej Jirman writes:
> On Sun, Feb 19, 2023 at 12:45:53PM +0100, Frank Oltmanns wrote:
>> Fix the XBD599 panel’s slight visual stutter by correcting the pixel
>> clock speed so that the panel’s 60Hz vertical refresh rate is met.
>>
>> Set the clock speed using the underlying f
On 18.02.2023 15:49, Krzysztof Kozlowski wrote:
> On 18/02/2023 12:23, Konrad Dybcio wrote:
>>
>>
>> On 18.02.2023 11:14, Krzysztof Kozlowski wrote:
>>> On 17/02/2023 22:13, Bryan O'Donoghue wrote:
On 17/02/2023 12:24, Krzysztof Kozlowski wrote:
> First, it would be nice to know what wa
On 20/02/2023 10:01, Christian König wrote:
Am 20.02.23 um 10:55 schrieb Tvrtko Ursulin:
Hi,
On 14/02/2023 13:59, Christian König wrote:
Am 14.02.23 um 13:50 schrieb Tvrtko Ursulin:
From: Tvrtko Ursulin
Currently drm_gem_handle_create_tail exposes the handle to userspace
before the buffe
Hi Liu,
Am Montag, 20. Februar 2023, 09:55:19 CET schrieb Alexander Stein:
> Hi Liu,
>
> Am Freitag, 17. Februar 2023, 09:59:14 CET schrieb Liu Ying:
> > On Fri, 2023-02-17 at 09:18 +0100, Alexander Stein wrote:
> > > Hi Liu,
> >
> > Hi Alexander,
> >
> > > Am Freitag, 17. Februar 2023, 07:54:0
On 20.02.2023 10:59, Konrad Dybcio wrote:
>
>
> On 18.02.2023 17:47, Dmitry Baryshkov wrote:
>> On 18/02/2023 13:04, Konrad Dybcio wrote:
>>>
>>>
>>> On 17.02.2023 22:07, Dmitry Baryshkov wrote:
On 14/02/2023 19:31, Konrad Dybcio wrote:
> Currently we only utilize the OPP table connec
Am 20.02.23 um 10:55 schrieb Tvrtko Ursulin:
Hi,
On 14/02/2023 13:59, Christian König wrote:
Am 14.02.23 um 13:50 schrieb Tvrtko Ursulin:
From: Tvrtko Ursulin
Currently drm_gem_handle_create_tail exposes the handle to userspace
before the buffer object constructions is complete. This allowi
On 18.02.2023 17:47, Dmitry Baryshkov wrote:
> On 18/02/2023 13:04, Konrad Dybcio wrote:
>>
>>
>> On 17.02.2023 22:07, Dmitry Baryshkov wrote:
>>> On 14/02/2023 19:31, Konrad Dybcio wrote:
Currently we only utilize the OPP table connected to the GPU for
getting (available) frequencies.
Hi,
On 14/02/2023 13:59, Christian König wrote:
Am 14.02.23 um 13:50 schrieb Tvrtko Ursulin:
From: Tvrtko Ursulin
Currently drm_gem_handle_create_tail exposes the handle to userspace
before the buffer object constructions is complete. This allowing
of working against a partially constructed
From: Dafna Hirschfeld
We later use cpucp packet for soft reset which might fail
so we should be able propagate the failure case.
Signed-off-by: Dafna Hirschfeld
Reviewed-by: Oded Gabbay
Signed-off-by: Oded Gabbay
---
drivers/accel/habanalabs/common/habanalabs.h | 2 +-
drivers/accel/habanal
From: Tomer Tayar
'irq_handler' in gaudi2_enable_msix(), is just assigned with a function
name and then used when calling request_threaded_irq().
Remove the variable and use the function name directly as an argument.
Signed-off-by: Tomer Tayar
Reviewed-by: Oded Gabbay
Signed-off-by: Oded Gabba
From: Tomer Tayar
Remove leading zeroes when printing the idle mask to make it clearer.
Signed-off-by: Tomer Tayar
Reviewed-by: Oded Gabbay
Signed-off-by: Oded Gabbay
---
drivers/accel/habanalabs/common/device.c | 23 +++
1 file changed, 11 insertions(+), 12 deletions(-)
From: Sagiv Ozeri
Make the comments align with the order of the fields in the structure
Signed-off-by: Sagiv Ozeri
Reviewed-by: Oded Gabbay
Signed-off-by: Oded Gabbay
---
drivers/accel/habanalabs/common/habanalabs.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/dr
On Sat, 18 Feb 2023 13:15:53 -0800
Rob Clark wrote:
> From: Rob Clark
>
> Will be used in the next commit to set a deadline on fences that an
> atomic update is waiting on.
>
> Signed-off-by: Rob Clark
> ---
> drivers/gpu/drm/drm_vblank.c | 32
> include/drm/
On Sat, 18 Feb 2023 13:15:52 -0800
Rob Clark wrote:
> From: Rob Clark
>
> Add a new flag to let userspace provide a deadline as a hint for syncobj
> and timeline waits. This gives a hint to the driver signaling the
> backing fences about how soon userspace needs it to compete work, so it
> can
I think I accidentally used HTML mode for the previous email. Sorry about that.
On Mon, Feb 20, 2023 at 4:41 PM Pin-yen Lin wrote:
>
> Hi Andi,
>
> Thanks for the review.
>
> On Wed, Feb 8, 2023 at 5:25 AM Andi Shyti wrote:
>>
>> Hi Pin-yen,
>>
>> [...]
>>
>> > +static int drm_dp_register_mode_s
Hi Liu,
Am Freitag, 17. Februar 2023, 09:59:14 CET schrieb Liu Ying:
> On Fri, 2023-02-17 at 09:18 +0100, Alexander Stein wrote:
> > Hi Liu,
>
> Hi Alexander,
>
> > Am Freitag, 17. Februar 2023, 07:54:01 CET schrieb Liu Ying:
> > > Hi,
> > >
> > > This patch set aims to add i.MX93 LCDIF display
On Sat, 18 Feb 2023 13:15:49 -0800
Rob Clark wrote:
> From: Rob Clark
>
> Allow userspace to use the EPOLLPRI/POLLPRI flag to indicate an urgent
> wait (as opposed to a "housekeeping" wait to know when to cleanup after
> some work has completed). Usermode components of GPU driver stacks
> ofte
On Sat, 18 Feb 2023 13:15:48 -0800
Rob Clark wrote:
> From: Rob Clark
>
> The initial purpose is for igt tests, but this would also be useful for
> compositors that wait until close to vblank deadline to make decisions
> about which frame to show.
>
> The igt tests can be found at:
>
> https:
Hi Andi,
Thanks for the review.
On Wed, Feb 8, 2023 at 5:25 AM Andi Shyti
wrote:
> Hi Pin-yen,
>
> [...]
>
> > +static int drm_dp_register_mode_switch(struct device *dev,
> > +struct fwnode_handle *fwnode,
> > +struct drm_d
On 16/02/2023 01:10, john.c.harri...@intel.com wrote:
From: John Harrison
Instruction from hardware arch is that stolen memory and BAR mappings
are unsafe for use as ring buffers. There can be issues with cache
aliasing due to the CPU access going to memory via the BAR. So, don't
do it.
v2:
On Fri, 17 Feb 2023 16:22:04 +
Simon Ser wrote:
> v2: mention caps, note that the IOCTLs might fail, document that
> user-space needs a data structure to keep track of the
> handles (Daniel V.)
>
> Signed-off-by: Simon Ser
> Cc: Daniel Vetter
> Cc: Pekka Paalanen
> Cc: Daniel Stone
> ---
Am 18.02.23 um 22:15 schrieb Rob Clark:
From: Rob Clark
Allow userspace to use the EPOLLPRI/POLLPRI flag to indicate an urgent
wait (as opposed to a "housekeeping" wait to know when to cleanup after
some work has completed). Usermode components of GPU driver stacks
often poll() on fence fd's t
Am 18.02.23 um 22:15 schrieb Rob Clark:
From: Rob Clark
This consists of simply storing the most recent deadline, and adding an
ioctl to retrieve the deadline. This can be used in conjunction with
the SET_DEADLINE ioctl on a fence fd for testing. Ie. create various
sw_sync fences, merge them
Am 18.02.23 um 22:15 schrieb Rob Clark:
From: Rob Clark
The initial purpose is for igt tests, but this would also be useful for
compositors that wait until close to vblank deadline to make decisions
about which frame to show.
The igt tests can be found at:
https://gitlab.freedesktop.org/robcl
Am 18.02.23 um 22:15 schrieb Rob Clark:
From: Rob Clark
Add a way to set a deadline on remaining resv fences according to the
requested usage.
Signed-off-by: Rob Clark
---
drivers/dma-buf/dma-resv.c | 19 +++
include/linux/dma-resv.h | 2 ++
2 files changed, 21 insertio
Acked-by: Christian König for the whole series.
Am 17.02.23 um 19:14 schrieb Arthur Grillo:
Hi,
This series resolve some of the warnings that appear when compiling AMDGPU
with W=1.
Each patch is focused in a specific warning.
This is my First Patch for the GSoC Project Idea about increasing
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