On 23/02/2023 04:19, Sui jingfeng wrote:
> Hi,
>
> On 2023/2/23 02:32, Krzysztof Kozlowski wrote:
>> On 22/02/2023 17:55, suijingfeng wrote:
>>> The display controller is a pci device, it's pci vendor id is
>>> 0x0014, it's pci device id is 0x7a06.
>>>
>>> Signed-off-by: suijingfeng
>>> ---
>>>
Am 22.02.23 um 17:40 schrieb Danilo Krummrich:
On 2/22/23 16:14, Christian König wrote:
Am 22.02.23 um 16:07 schrieb Danilo Krummrich:
On 2/22/23 11:25, Christian König wrote:
Am 17.02.23 um 14:44 schrieb Danilo Krummrich:
+/**
+ * DOC: Overview
+ *
+ * The DRM GPU VA Manager,
On Wed, 2023-02-22 at 15:13 -0500, Rodrigo Vivi wrote:
> On Wed, Feb 22, 2023 at 03:17:55PM +0100, Werner Sembach wrote:
> > On these Barebones PSR 2 is recognized as supported but is very
> > buggy:
> > - Upper third of screen does sometimes not updated, resulting in
> > disappearing cursors or
On 2023.02.02 12:50:18 +, Colin Ian King wrote:
> There is a spelling mistake in a literal string. Fix it.
>
> Signed-off-by: Colin Ian King
> ---
> drivers/gpu/drm/i915/gvt/firmware.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git
On 2023.02.06 15:23:55 -0500, Rodrigo Vivi wrote:
> On Thu, Feb 02, 2023 at 03:13:09PM +0100, Greg Kroah-Hartman wrote:
> > When calling debugfs_lookup() the result must have dput() called on it,
> > otherwise the memory will leak over time. To make things simpler, just
> > call
On Thu, Feb 23, 2023 at 02:52:52AM +, Dylan Le wrote:
>
> This patch was initially written for the Linux Kernel Bug Fixing Mentorship
> program. The patch adds a temporarily stubbed section on Acceleration Nodes
> to resolve a documentation warning.
>
> This resolves the warning:
>
Hi,
On 2023/2/23 02:32, Krzysztof Kozlowski wrote:
On 22/02/2023 17:55, suijingfeng wrote:
The display controller is a pci device, it's pci vendor id is
0x0014, it's pci device id is 0x7a06.
Signed-off-by: suijingfeng
---
.../boot/dts/loongson/loongson64-2k1000.dtsi | 21
On Wed, Feb 22, 2023 at 5:13 PM AngeloGioacchino Del Regno
wrote:
>
> Il 22/02/23 09:37, Chen-Yu Tsai ha scritto:
> > On Tue, Feb 21, 2023 at 11:37 PM AngeloGioacchino Del Regno
> > wrote:
> >>
> >> Get GPU support on MT8186 by adding its compatible.
> >>
> >> Signed-off-by: AngeloGioacchino Del
On Thu, 23 Feb 2023 at 03:47, Konrad Dybcio wrote:
>
> Add the dev_pm_opp_of_find_icc_paths() call to let the OPP framework
> handle bus voting as part of power level setting.
>
> Signed-off-by: Konrad Dybcio
Reviewed-by: Dmitry Baryshkov
--
With best wishes
Dmitry
On Thu, 23 Feb 2023 at 03:47, Konrad Dybcio wrote:
>
> Implement gpu_busy based on the downstream msm-3.4 code [1]. This
> allows us to use devfreq on this old old old hardware!
>
> [1]
>
On Thu, 23 Feb 2023 at 03:47, Konrad Dybcio wrote:
>
> Some older GPUs (namely a2xx with no opp tables at all and a320 with
> downstream-remnants gpu pwrlevels) used not to have OPP tables. They
> both however had just one frequency defined, making it extremely easy
> to construct such an OPP
On 2022/11/16 22:06, Ville Syrjälä wrote:
> On Wed, Nov 16, 2022 at 12:08:27PM +0200, Jani Nikula wrote:
>> On Sun, 06 Nov 2022, Tetsuo Handa wrote:
>>> Like commit c4f135d643823a86 ("workqueue: Wrap flush_workqueue() using a
>>> macro") says, flush_scheduled_work() is dangerous and will be
Add the dev_pm_opp_of_find_icc_paths() call to let the OPP framework
handle bus voting as part of power level setting.
Signed-off-by: Konrad Dybcio
---
drivers/gpu/drm/msm/adreno/adreno_device.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/msm/adreno/adreno_device.c
Implement gpu_busy based on the downstream msm-3.4 code [1]. This
allows us to use devfreq on this old old old hardware!
[1]
https://github.com/LineageOS/android_kernel_sony_apq8064/blob/lineage-16.0/drivers/gpu/msm/adreno_a2xx.c#L1975
Signed-off-by: Konrad Dybcio
---
Add support for gpu_busy on a4xx, which is required for devfreq
support.
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Konrad Dybcio
---
drivers/gpu/drm/msm/adreno/a4xx_gpu.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/drivers/gpu/drm/msm/adreno/a4xx_gpu.c
Some older GPUs (namely a2xx with no opp tables at all and a320 with
downstream-remnants gpu pwrlevels) used not to have OPP tables. They
both however had just one frequency defined, making it extremely easy
to construct such an OPP table from within the driver if need be.
Do so and switch all
Add support for gpu_busy on a3xx, which is required for devfreq
support.
Tested-by: Dmitry Baryshkov #ifc6410
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Konrad Dybcio
---
drivers/gpu/drm/msm/adreno/a3xx_gpu.c | 11 +++
1 file changed, 11 insertions(+)
diff --git
v1 -> v2:
- Move a2xx #defines to XML
- Use dev_pm_opp_find_freq_floor in the common path in [2/6]
- Clarify a comment in [2/6]
- Move voting from a5xx to Adreno-wide [6/6]
- Pick up tags
v1:
https://lore.kernel.org/linux-arm-msm/20230222-konrad-longbois-next-v1-0-010214257...@linaro.
This is a partial merge of [1], subject to be dropped if a header
update is executed.
[1] https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21480/
Signed-off-by: Konrad Dybcio
---
drivers/gpu/drm/msm/adreno/a2xx.xml.h | 6 ++
1 file changed, 6 insertions(+)
diff --git
On 2/22/2023 1:01 PM, Alan Previn wrote:
The Driver-FLR flow may inadvertently exit early before the full
completion of the re-init of the internal HW state if we only poll
GU_DEBUG Bit31 (polling for it to toggle from 0 -> 1). Instead
we need a two-step completion wait-for-completion flow
Use the overflow-protected struct_size() helper macro to compute the
allocation size of the vop2 data structure.
Signed-off-by: Jacob Keller
Cc: Sandy Huang
Cc: Heiko Stübner
Cc: David Airlie
---
I found this while developing a coccinelle script to detect potential places
where struct_size()
On 23.02.2023 00:16, Dmitry Baryshkov wrote:
> On 23/02/2023 00:40, Konrad Dybcio wrote:
>>
>>
>> On 22.02.2023 23:38, Dmitry Baryshkov wrote:
>>> On 22/02/2023 23:47, Konrad Dybcio wrote:
Some older GPUs (namely a2xx with no opp tables at all and a320 with
downstream-remnants gpu
The DORCR register controls the routing of clocks and data between DU
channels within a group. For groups that contain a single channel,
there's no routing option to control, and some fields of the register
are then reserved. On Gen2 those reserved fields are documented as
required to be set to 0,
The DORCR fields were documented in the R-Car H1 datasheet with 1-based
named, and then got renamed to 0-based in Gen2. The 0-based names are
used for Gen3 and Gen4, making H1 an outlier. Rename the field macros to
make them 0-based, in order to increase readability of the code when
comparing it
Hello,
Following the "[PATCH 0/2] drm: rcar-du: Avoid writing reserved register
fields" series ([1]), this series addresses more invalid register
writes in the R-Car DU driver. Patch 1/2 first renames some register
field macros to increase readability, and patch 2/2 fixes the invalid
writes.
The
On Tue, 2023-02-14 at 13:38 -0800, Teres Alexis, Alan Previn wrote:
> Add helper functions into a new file for heci-packet-submission.
> The helpers will handle generating the MTL GSC-CS Memory-Header
> and submission of the Heci-Cmd-Packet instructions to the engine.
>
> NOTE1: These common
The DORCR register controls the routing of clocks and data between DU
channels within a group. For groups that contain a single channel,
there's no routing option to control, and some fields of the register
are then reserved. On Gen2 those reserved fields are documented as
required to be set to 0,
On Wed, Feb 22, 2023 at 3:14 PM Rob Clark wrote:
>
> On Thu, Feb 16, 2023 at 3:12 AM Daniel Vetter wrote:
> >
> > The stuff never really worked, and leads to lots of fun because it
> > out-of-order frees atomic states. Which upsets KASAN, among other
> > things.
> >
> > For async updates we now
On 23/02/2023 00:40, Konrad Dybcio wrote:
On 22.02.2023 23:38, Dmitry Baryshkov wrote:
On 22/02/2023 23:47, Konrad Dybcio wrote:
Some older GPUs (namely a2xx with no opp tables at all and a320 with
downstream-remnants gpu pwrlevels) used not to have OPP tables. They
both however had just one
On Thu, Feb 16, 2023 at 3:12 AM Daniel Vetter wrote:
>
> The stuff never really worked, and leads to lots of fun because it
> out-of-order frees atomic states. Which upsets KASAN, among other
> things.
>
> For async updates we now have a more solid solution with the
> ->atomic_async_check and
On 22.02.2023 23:38, Dmitry Baryshkov wrote:
> On 22/02/2023 23:47, Konrad Dybcio wrote:
>> Some older GPUs (namely a2xx with no opp tables at all and a320 with
>> downstream-remnants gpu pwrlevels) used not to have OPP tables. They
>> both however had just one frequency defined, making it
On 22/02/2023 23:47, Konrad Dybcio wrote:
Some older GPUs (namely a2xx with no opp tables at all and a320 with
downstream-remnants gpu pwrlevels) used not to have OPP tables. They
both however had just one frequency defined, making it extremely easy
to construct such an OPP table from within the
On 22/02/2023 23:47, Konrad Dybcio wrote:
Implement gpu_busy based on the downstream msm-3.4 code [1]. This
allows us to use devfreq on this old old old hardware!
[1]
https://github.com/LineageOS/android_kernel_sony_apq8064/blob/lineage-16.0/drivers/gpu/msm/adreno_a2xx.c#L1975
Signed-off-by:
On 22/02/2023 23:47, Konrad Dybcio wrote:
Add support for gpu_busy on a4xx, which is required for devfreq
support.
Signed-off-by: Konrad Dybcio
---
drivers/gpu/drm/msm/adreno/a4xx_gpu.c | 11 +++
1 file changed, 11 insertions(+)
Reviewed-by: Dmitry Baryshkov
--
With best wishes
On 23/02/2023 00:14, Konrad Dybcio wrote:
On 22.02.2023 23:12, Dmitry Baryshkov wrote:
On 22/02/2023 23:47, Konrad Dybcio wrote:
Add the dev_pm_opp_of_find_icc_paths() call to let the OPP framework
handle bus voting as part of power level setting.
This can probably go to the generic code
On 22.02.2023 23:12, Dmitry Baryshkov wrote:
> On 22/02/2023 23:47, Konrad Dybcio wrote:
>> Add the dev_pm_opp_of_find_icc_paths() call to let the OPP framework
>> handle bus voting as part of power level setting.
>
> This can probably go to the generic code path rather than sticking it into
On 22/02/2023 23:47, Konrad Dybcio wrote:
Add the dev_pm_opp_of_find_icc_paths() call to let the OPP framework
handle bus voting as part of power level setting.
This can probably go to the generic code path rather than sticking it
into a5xx only.
Signed-off-by: Konrad Dybcio
---
On 22/02/2023 23:47, Konrad Dybcio wrote:
Add support for gpu_busy on a3xx, which is required for devfreq
support.
Signed-off-by: Konrad Dybcio
Tested-by: Dmitry Baryshkov #ifc6410
Reviewed-by: Dmitry Baryshkov
--
With best wishes
Dmitry
Add support for gpu_busy on a3xx, which is required for devfreq
support.
Signed-off-by: Konrad Dybcio
---
drivers/gpu/drm/msm/adreno/a3xx_gpu.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/drivers/gpu/drm/msm/adreno/a3xx_gpu.c
b/drivers/gpu/drm/msm/adreno/a3xx_gpu.c
index
Add the dev_pm_opp_of_find_icc_paths() call to let the OPP framework
handle bus voting as part of power level setting.
Signed-off-by: Konrad Dybcio
---
drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
Implement gpu_busy based on the downstream msm-3.4 code [1]. This
allows us to use devfreq on this old old old hardware!
[1]
https://github.com/LineageOS/android_kernel_sony_apq8064/blob/lineage-16.0/drivers/gpu/msm/adreno_a2xx.c#L1975
Signed-off-by: Konrad Dybcio
---
Add support for gpu_busy on a4xx, which is required for devfreq
support.
Signed-off-by: Konrad Dybcio
---
drivers/gpu/drm/msm/adreno/a4xx_gpu.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/drivers/gpu/drm/msm/adreno/a4xx_gpu.c
b/drivers/gpu/drm/msm/adreno/a4xx_gpu.c
index
Some older GPUs (namely a2xx with no opp tables at all and a320 with
downstream-remnants gpu pwrlevels) used not to have OPP tables. They
both however had just one frequency defined, making it extremely easy
to construct such an OPP table from within the driver if need be.
Do so and switch all
changed, 99 insertions(+), 55 deletions(-)
---
base-commit: f4ed0868966d96203fee6f2782508746ded2ce3f
change-id: 20230222-konrad-longbois-next-86d1a69532c2
Best regards,
--
Konrad Dybcio
The Driver-FLR flow may inadvertently exit early before the full
completion of the re-init of the internal HW state if we only poll
GU_DEBUG Bit31 (polling for it to toggle from 0 -> 1). Instead
we need a two-step completion wait-for-completion flow that also
involves GU_CNTL. See the patch and
On Wed, Feb 22, 2023 at 03:17:55PM +0100, Werner Sembach wrote:
> On these Barebones PSR 2 is recognized as supported but is very buggy:
> - Upper third of screen does sometimes not updated, resulting in
> disappearing cursors or ghosts of already closed Windows saying behind.
> - Approximately 40
On Tue, Feb 21, 2023 at 2:16 AM Johan Hovold wrote:
>
> Since commit 4b18299b3365 ("drm/msm/adreno: Defer enabling runpm until
> hw_init()") runtime PM is no longer enabled at adreno_gpu_init(), which
> means that there are no longer any bind() error paths for which
> adreno_gpu_cleanup() is
On Wed, Feb 22, 2023 at 9:33 AM Tvrtko Ursulin
wrote:
>
>
> On 22/02/2023 17:16, Rob Clark wrote:
> > On Wed, Feb 22, 2023 at 9:05 AM Tvrtko Ursulin
> > wrote:
> >>
> >>
> >> On 22/02/2023 15:28, Christian König wrote:
> >>> Am 22.02.23 um 11:23 schrieb Tvrtko Ursulin:
>
> On
On Tue, Feb 14, 2023 at 01:19:51PM +0200, Ville Syrjälä wrote:
> On Tue, Feb 14, 2023 at 12:01:49PM +0100, Jonas Ådahl wrote:
> > On Tue, Feb 14, 2023 at 12:28:44PM +0200, Ville Syrjälä wrote:
> > > On Tue, Feb 14, 2023 at 10:54:27AM +0100, Jonas Ådahl wrote:
> > > > On Tue, Feb 14, 2023 at
On 22/02/2023 17:55, suijingfeng wrote:
> The display controller is a pci device, it's pci vendor id is
> 0x0014, it's pci device id is 0x7a06.
>
> Signed-off-by: suijingfeng
> ---
> .../boot/dts/loongson/loongson64-2k1000.dtsi | 21 +++
> 1 file changed, 21 insertions(+)
>
>
On 22/02/2023 17:55, suijingfeng wrote:
> This patch add a trival DT usages for loongson display controller found
> in LS2k1000 SoC.
Trivial yet so many things to improve... if you only started from recent
kernel tree (since you Cced wrong address, I doubt you did) and bindings
you would avoid
On Wed, Feb 22, 2023 at 05:09:40PM +0100, Thomas Zimmermann wrote:
> Hi
>
> Am 22.02.23 um 16:56 schrieb Tom Rix:
> > building with clang and W=1 reports
> > drivers/gpu/drm/msm/msm_fbdev.c:144:6: error: variable 'helper' is used
> >uninitialized whenever 'if' condition is true
> >
On 2/21/23 19:20, Liam R. Howlett wrote:
* Danilo Krummrich [230217 08:45]:
Add infrastructure to keep track of GPU virtual address (VA) mappings
with a decicated VA space manager implementation.
New UAPIs, motivated by Vulkan sparse memory bindings graphics drivers
start implementing, allow
Alan Coopersmith (2):
Update URLs to reflect gitlab migration
gitlab CI: enable gitlab's builtin static analysis
Kai-Heng Feng (1):
Initialize present extension for GPU screen
Lukasz Spintzyk (3):
Use randr_crtc_covering_drawable used in modesetting
Prefer crtc of
On Fri, Feb 17, 2023 at 5:25 PM Dmitry Baryshkov
wrote:
>
> The variable ring is not used by msm_parse_deps() and
> msm_ioctl_gem_submit() and thus can be dropped.
>
> Signed-off-by: Dmitry Baryshkov
> ---
> drivers/gpu/drm/msm/msm_gem_submit.c | 10 +++---
>
On 22/02/2023 17:16, Rob Clark wrote:
On Wed, Feb 22, 2023 at 9:05 AM Tvrtko Ursulin
wrote:
On 22/02/2023 15:28, Christian König wrote:
Am 22.02.23 um 11:23 schrieb Tvrtko Ursulin:
On 18/02/2023 21:15, Rob Clark wrote:
From: Rob Clark
Add a way to hint to the fence signaler of an
Hi Marek.
On Tue, Feb 21, 2023 at 09:04:07PM +0100, Marek Vasut wrote:
> The VS signal change is synchronized to HS signal change, start the
> info graphics with that event, instead of having that event occur in
> the middle of it.
>
> Scope trace of DPI bus with HS/VS active HIGH looks as
On 2/22/23 17:32, Matthew Wilcox wrote:
On Wed, Feb 22, 2023 at 05:11:34PM +0100, Danilo Krummrich wrote:
On 2/21/23 19:31, Matthew Wilcox wrote:
on tue, feb 21, 2023 at 03:37:49pm +0100, danilo krummrich wrote:
It feels a bit weird that I, as a user of the API, would need to lock certain
(or
On Wed, Feb 22, 2023 at 9:05 AM Tvrtko Ursulin
wrote:
>
>
> On 22/02/2023 15:28, Christian König wrote:
> > Am 22.02.23 um 11:23 schrieb Tvrtko Ursulin:
> >>
> >> On 18/02/2023 21:15, Rob Clark wrote:
> >>> From: Rob Clark
> >>>
> >>> Add a way to hint to the fence signaler of an upcoming
On 17.02.2023 11:15, Jeffrey Hugo wrote:
On 2/16/2023 7:13 AM, Jacek Lawrynowicz wrote:
Hi,
On 06.02.2023 16:41, Jeffrey Hugo wrote:
Add the QAIC driver uapi file and core driver file that binds to the PCIe
device. The core driver file also creates the accel device and manages
all the
Since commit 8b41fc4454e ("kbuild: create modules.builtin without
Makefile.modbuiltin or tristate.conf"), MODULE_LICENSE declarations
are used to identify modules. As a consequence, uses of the macro
in non-modules will cause modprobe to misidentify their containing
object file as a module when it
Since commit 8b41fc4454e ("kbuild: create modules.builtin without
Makefile.modbuiltin or tristate.conf"), MODULE_LICENSE declarations
are used to identify modules. As a consequence, uses of the macro
in non-modules will cause modprobe to misidentify their containing
object file as a module when it
Since commit 8b41fc4454e ("kbuild: create modules.builtin without
Makefile.modbuiltin or tristate.conf"), MODULE_LICENSE declarations
are used to identify modules. As a consequence, uses of the macro
in non-modules will cause modprobe to misidentify their containing
object file as a module when it
On Thu, 9 Feb 2023 12:11:19 +0200, Tomi Valkeinen wrote:
> Hi Daniel, Dave,
>
> Could you pick this fix to drm-next? The offending commit is there, it was
> merged via Laurent's "[GIT PULL FOR v6.3] R-Car DU fixes and improvements".
>
> I can also push this to drm-misc-fixes, but the offending
In the kfd_wait_on_events() function, the kfd_event_waiter structure is
allocated by alloc_event_waiters(), but the event field of the waiter
structure is not initialized; When copy_from_user() fails in the
kfd_wait_on_events() function, it will enter exception handling to
release the previously
It seems that commit bc3c5e0809ae ("drm/i915/sseu: Don't try to store EU
mask internally in UAPI format") exposed a potential out-of-bounds
access, reported by UBSAN as following on a laptop with a gen 11 i915
card:
UBSAN: array-index-out-of-bounds in drivers/gpu/drm/i915/gt/intel_sseu.c:65:27
Since commit 8b41fc4454e ("kbuild: create modules.builtin without
Makefile.modbuiltin or tristate.conf"), MODULE_LICENSE declarations
are used to identify modules. As a consequence, uses of the macro
in non-modules will cause modprobe to misidentify their containing
object file as a module when it
From: Qu Huang
In the kfd_wait_on_events() function, the kfd_event_waiter structure is
allocated by alloc_event_waiters(), but the event field of the waiter
structure is not initialized; When copy_from_user() fails in the
kfd_wait_on_events() function, it will enter exception handling to
release
On 2023/2/22 3:17, Christophe JAILLET wrote:
> Le 21/02/2023 à 17:26, Felix Kuehling a écrit :
>>
>> On 2023-02-21 06:35, qu.huang-fxuvxftifdnyg1zeobx...@public.gmane.org wrote:
>>> From: Qu Huang
>>>
>>> In the kfd_wait_on_events() function, the kfd_event_waiter structure is
>>> allocated by
Since commit 8b41fc4454e ("kbuild: create modules.builtin without
Makefile.modbuiltin or tristate.conf"), MODULE_LICENSE declarations
are used to identify modules. As a consequence, uses of the macro
in non-modules will cause modprobe to misidentify their containing
object file as a module when it
On 22/02/2023 15:28, Christian König wrote:
Am 22.02.23 um 11:23 schrieb Tvrtko Ursulin:
On 18/02/2023 21:15, Rob Clark wrote:
From: Rob Clark
Add a way to hint to the fence signaler of an upcoming deadline, such as
vblank, which the fence waiter would prefer not to miss. This is to aid
On Wed, Jan 18, 2023 at 04:35:22PM +0100, Andrzej Hajda wrote:
> Andrzej Hajda (7):
> arch: rename all internal names __xchg to __arch_xchg
> linux/include: add non-atomic version of xchg
> arch/*/uprobes: simplify arch_uretprobe_hijack_return_addr
> llist: simplify __llist_del_all
>
This patch add a trival DT usages for loongson display controller found
in LS2k1000 SoC.
Signed-off-by: suijingfeng
---
.../loongson/loongson,display-controller.yaml | 58 +++
1 file changed, 58 insertions(+)
create mode 100644
The display controller is a pci device, it's pci vendor id is
0x0014, it's pci device id is 0x7a06.
Signed-off-by: suijingfeng
---
.../boot/dts/loongson/loongson64-2k1000.dtsi | 21 +++
1 file changed, 21 insertions(+)
diff --git
On 2/22/23 16:14, Christian König wrote:
Am 22.02.23 um 16:07 schrieb Danilo Krummrich:
On 2/22/23 11:25, Christian König wrote:
Am 17.02.23 um 14:44 schrieb Danilo Krummrich:
+/**
+ * DOC: Overview
+ *
+ * The DRM GPU VA Manager, represented by struct drm_gpuva_manager
keeps track
+ *
On Wed, Feb 22, 2023 at 05:11:34PM +0100, Danilo Krummrich wrote:
> On 2/21/23 19:31, Matthew Wilcox wrote:
> > on tue, feb 21, 2023 at 03:37:49pm +0100, danilo krummrich wrote:
> > > It feels a bit weird that I, as a user of the API, would need to lock
> > > certain
> > > (or all?) mas_*()
On 2/21/23 19:31, Matthew Wilcox wrote:
On Tue, Feb 21, 2023 at 03:37:49PM +0100, Danilo Krummrich wrote:
On Mon, Feb 20, 2023 at 08:33:35PM +, Matthew Wilcox wrote:
On Mon, Feb 20, 2023 at 06:06:03PM +0100, Danilo Krummrich wrote:
On 2/20/23 16:10, Matthew Wilcox wrote:
This is why we
Hi
Am 22.02.23 um 16:56 schrieb Tom Rix:
building with clang and W=1 reports
drivers/gpu/drm/msm/msm_fbdev.c:144:6: error: variable 'helper' is used
uninitialized whenever 'if' condition is true
[-Werror,-Wsometimes-uninitialized]
if (!fbdev)
^~
helper is only initialized
Commit 45d9c8dde4cd ("drm/vgem: use shmem helpers") introduced shmem
helpers to vgem and with that, removed all uses of the struct
drm_vgem_gem_object. So, as the struct is no longer used, delete it.
Signed-off-by: Maíra Canal
---
drivers/gpu/drm/vgem/vgem_drv.h | 11 ---
1 file
On 2/22/23 15:20, Christian König wrote:
Am 22.02.23 um 14:54 schrieb Thomas Hellström:
Hi,
On 2/22/23 12:39, Christian König wrote:
Hi Thomas,
Am 22.02.23 um 12:00 schrieb Thomas Hellström:
Hi, Christian,
So I resurrected Maarten's previous patch series around this (the
amdgpu
building with clang and W=1 reports
drivers/gpu/drm/msm/msm_fbdev.c:144:6: error: variable 'helper' is used
uninitialized whenever 'if' condition is true
[-Werror,-Wsometimes-uninitialized]
if (!fbdev)
^~
helper is only initialized after fbdev succeeds, so is in a garbage state at
On Wed, Feb 22, 2023 at 07:44:42AM -0800, Rob Clark wrote:
> On Wed, Feb 22, 2023 at 1:57 AM Pekka Paalanen wrote:
> >
> > On Tue, 21 Feb 2023 09:50:20 -0800
> > Rob Clark wrote:
> >
> > > On Tue, Feb 21, 2023 at 5:01 AM Ville Syrjälä
> > > wrote:
> > > >
> > > > On Tue, Feb 21, 2023 at
On Wed, Feb 22, 2023 at 2:27 AM Tvrtko Ursulin
wrote:
>
>
> On 18/02/2023 21:15, Rob Clark wrote:
> > From: Rob Clark
> >
> > Propagate the deadline to all the fences in the chain.
> >
> > Signed-off-by: Rob Clark
> > Reviewed-by: Christian König for this one.
> > ---
> >
On Wed, Feb 22, 2023 at 2:46 AM Luben Tuikov wrote:
>
> On 2023-02-18 16:15, Rob Clark wrote:
> > From: Rob Clark
> >
> > For an atomic commit updating a single CRTC (ie. a pageflip) calculate
> > the next vblank time, and inform the fence(s) of that deadline.
> >
> > v2: Comment typo fix
On Wed, Feb 22, 2023 at 2:37 AM Luben Tuikov wrote:
>
> On 2023-02-18 16:15, Rob Clark wrote:
> > From: Rob Clark
> >
> > Will be used in the next commit to set a deadline on fences that an
> > atomic update is waiting on.
> >
> > Signed-off-by: Rob Clark
> > ---
> >
On Wed, Feb 22, 2023 at 1:57 AM Pekka Paalanen wrote:
>
> On Tue, 21 Feb 2023 09:50:20 -0800
> Rob Clark wrote:
>
> > On Tue, Feb 21, 2023 at 5:01 AM Ville Syrjälä
> > wrote:
> > >
> > > On Tue, Feb 21, 2023 at 10:45:51AM +0200, Pekka Paalanen wrote:
> > > > On Mon, 20 Feb 2023 07:55:41 -0800
>
Am 22.02.23 um 15:17 schrieb Werner Sembach:
On these Barebones PSR 2 is recognized as supported but is very buggy:
- Upper third of screen does sometimes not updated, resulting in
disappearing cursors or ghosts of already closed Windows saying behind.
- Approximately 40 px from the bottom
On Wed, Feb 22, 2023 at 1:49 AM Pekka Paalanen wrote:
>
> On Tue, 21 Feb 2023 09:53:56 -0800
> Rob Clark wrote:
>
> > On Tue, Feb 21, 2023 at 8:48 AM Luben Tuikov wrote:
> > >
> > > On 2023-02-20 11:14, Rob Clark wrote:
> > > > On Mon, Feb 20, 2023 at 12:53 AM Pekka Paalanen
> > > > wrote:
>
On Wed, Feb 22, 2023 at 6:06 AM Rodrigo Vivi wrote:
>
> On Wed, Feb 22, 2023 at 12:09:04PM +0200, Pekka Paalanen wrote:
> > On Tue, 21 Feb 2023 09:25:18 -0800
> > Rob Clark wrote:
> >
> > > On Tue, Feb 21, 2023 at 12:53 AM Pekka Paalanen
> > > wrote:
> > > >
> > > > On Mon, 20 Feb 2023
Am 22.02.23 um 11:23 schrieb Tvrtko Ursulin:
On 18/02/2023 21:15, Rob Clark wrote:
From: Rob Clark
Add a way to hint to the fence signaler of an upcoming deadline, such as
vblank, which the fence waiter would prefer not to miss. This is to aid
the fence signaler in making power management
Hi Tomi,
Le mercredi 21 décembre 2022 à 11:24 +0200, Tomi Valkeinen a écrit :
> Add Y210, Y212 and Y216 formats.
>
> Signed-off-by: Tomi Valkeinen
> ---
> .../media/v4l/pixfmt-packed-yuv.rst | 49 ++-
> drivers/media/v4l2-core/v4l2-ioctl.c | 3 ++
>
On Sun, 12 Feb 2023, Uwe Kleine-König wrote:
> Hello Lee,
>
> On Mon, Jan 30, 2023 at 09:42:01AM +, Lee Jones wrote:
> > On Fri, 27 Jan 2023, Uwe Kleine-König wrote:
> >
> > > The probe function doesn't make use of the i2c_device_id * parameter so
> > > it can be trivially converted.
> > >
Am 22.02.23 um 16:07 schrieb Danilo Krummrich:
On 2/22/23 11:25, Christian König wrote:
Am 17.02.23 um 14:44 schrieb Danilo Krummrich:
+/**
+ * DOC: Overview
+ *
+ * The DRM GPU VA Manager, represented by struct drm_gpuva_manager
keeps track
+ * of a GPU's virtual address (VA) space and
On 2/22/23 11:25, Christian König wrote:
Am 17.02.23 um 14:44 schrieb Danilo Krummrich:
+/**
+ * DOC: Overview
+ *
+ * The DRM GPU VA Manager, represented by struct drm_gpuva_manager
keeps track
+ * of a GPU's virtual address (VA) space and manages the
corresponding virtual
+ * mappings
On these Barebones PSR 2 is recognized as supported but is very buggy:
- Upper third of screen does sometimes not updated, resulting in
disappearing cursors or ghosts of already closed Windows saying behind.
- Approximately 40 px from the bottom edge a 3 pixel wide strip of randomly
colored pixels
On these Barebones PSR 2 is recognized as supported but is very buggy:
- Upper third of screen does sometimes not updated, resulting in
disappearing cursors or ghosts of already closed Windows saying behind.
- Approximately 40 px from the bottom edge a 3 pixel wide strip of randomly
colored pixels
This adds the possibility to disable PSR 2 explicitly using the intel
quirk table for devices where PSR 2 is borked, but PSR 1 works fine.
Signed-off-by: Werner Sembach
Cc:
---
drivers/gpu/drm/i915/display/intel_psr.c| 4 +++-
drivers/gpu/drm/i915/display/intel_quirks.c | 6 ++
Am 22.02.23 um 14:54 schrieb Thomas Hellström:
Hi,
On 2/22/23 12:39, Christian König wrote:
Hi Thomas,
Am 22.02.23 um 12:00 schrieb Thomas Hellström:
Hi, Christian,
So I resurrected Maarten's previous patch series around this (the
amdgpu suballocator) slightly modified the code to match
On Wed, Feb 22, 2023 at 04:53:41PM +0800, Pin-yen Lin wrote:
> On Tue, Feb 21, 2023 at 7:48 PM Andy Shevchenko
> > On Tue, Feb 21, 2023 at 05:50:47PM +0800, Pin-yen Lin wrote:
...
> > > #include
> > > #include
> > > +#include
> >
> > I don't see users of this.
> > But a few forward
On Wed, Feb 22, 2023 at 12:09:04PM +0200, Pekka Paalanen wrote:
> On Tue, 21 Feb 2023 09:25:18 -0800
> Rob Clark wrote:
>
> > On Tue, Feb 21, 2023 at 12:53 AM Pekka Paalanen wrote:
> > >
> > > On Mon, 20 Feb 2023 12:18:56 -0800
> > > Rob Clark wrote:
> > >
> > > > From: Rob Clark
> > > >
>
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