On 14/03/2023 16:28, Konrad Dybcio wrote:
> The "GMU Wrapper" is Qualcomm's name for "let's treat the GPU blocks
> we'd normally assign to the GMU as if they were a part of the GMU, even
> though they are not". It's a (good) software representation of the GMU_CX
> and GMU_GX register spaces within
On 14/03/2023 13:13, Konrad Dybcio wrote:
> The point of the previous cleanup was to disallow "qcom,mdss-dsi-ctrl"
> alone. This however didn't quite work out and the property became
> undocumented instead of deprecated. Fix that.
>
> Fixes: 0c0f65c6dd44 ("dt-bindings: msm: dsi-controller-main: Ad
On 16/03/2023 07:19, Nancy Lin (林欣螢) wrote:
> On Wed, 2023-03-15 at 08:16 +0100, Krzysztof Kozlowski wrote:
>> On 15/03/2023 04:45, Nancy Lin (林欣螢) wrote:
>>
>> Trim the replies and remove unneeded context. You want to get the
>> attention of other people, not force them to read entire email.
>>
>>
On Tue, 14 Mar 2023 02:35:07 -0700, Jani Nikula wrote:
>
Hi Jani,
Thanks for the review. I have posted v3, comments inline below.
> On Mon, 13 Mar 2023, Ashutosh Dixit wrote:
> > On dGfx, the PL1 power limit being enabled and set to a low value results
> > in a low GPU operating freq. It also n
On dGfx, the PL1 power limit being enabled and set to a low value results
in a low GPU operating freq. It also negates the freq raise operation which
is done before GuC firmware load. As a result GuC firmware load can time
out. Such timeouts were seen in the GL #8062 bug below (where the PL1 power
On Mon, 27 Feb 2023 13:36:40 -0800, Kuogee Hsieh wrote:
> At sc7280, pingpong block is used to management the dither effects
> to reduce distortion at panel. Currently pingpong-0 base offset is
> wrongly set at 0x59000. This mistake will not cause system to crash.
> However it will make dither no
On Thu, 23 Feb 2023 12:57:08 +0300, Dmitry Baryshkov wrote:
> The rewritten dpu_hw_ctl_setup_blendstage() can lightly smash the stack
> when setting the SSPP_NONE pipe. However it was unnoticed until the
> kernel was tested under AOSP (with some kind of stack protection/check).
>
> This fixes th
On Sun, 12 Feb 2023 01:12:09 +0200, Dmitry Baryshkov wrote:
> This huge series attempts to restructure the DPU HW catalog into a
> manageable and reviewable data set. In order to ease review and testing
> I merged all the necessary fixes into this series. Also I cherry-picked
> & slightly fixed K
On Mon, 13 Feb 2023 03:11:41 -0800, Kalyan Thota wrote:
> Clear DSPP reservations from the global state during
> rm release
>
>
Applied, thanks!
[1/4] drm/msm/dpu: clear DSPP reservations in rm release
https://gitlab.freedesktop.org/drm/msm/-/commit/5ec498ba8655
Best regards,
--
Abhin
On Wed, 2023-03-15 at 17:14 +0100, Thomas Zimmermann wrote:
> Remove the flag prefer_shadow_fbdev from struct drm_mode_config.
> Drivers set this flag to enable shadow buffering in the generic
> fbdev emulation. Such shadow buffering is now mandatory, so the
> flag is unused.
>
> Signed-off-by: Th
On 2/27/2023 1:24 PM, Abhinav Kumar wrote:
On 2/27/2023 11:25 AM, Dmitry Baryshkov wrote:
27 февраля 2023 г. 19:59:35 GMT+02:00, Abhinav Kumar
пишет:
On 2/27/2023 4:45 AM, Dmitry Baryshkov wrote:
On Mon, 27 Feb 2023 at 01:49, Abhinav Kumar
wrote:
On 2/26/2023 5:09 AM, Dmitry Barys
On Wed, 15 Mar 2023 02:43:30 -0700, Tvrtko Ursulin wrote:
>
> On 10/03/2023 00:59, Ashutosh Dixit wrote:
> > Expose intel_rps_read_actual_frequency_fw to read the actual freq without
> > taking forcewake for use by PMU. The code is refactored to use a common set
> > of functions across sysfs and PM
Expose intel_rps_read_actual_frequency_fw to read the actual freq without
taking forcewake for use by PMU. The code is refactored to use a common set
of functions across sysfs and PMU. Using common functions with sysfs in PMU
solves the issues of missing support for MTL and missing support for olde
On Thu, 02 Mar 2023 22:03:03 +0530, Vinod Polimera wrote:
> Changes in v2:
> - Use dp bridge to set psr entry/exit instead of dpu_enocder.
> - Don't modify whitespaces.
> - Set self refresh aware from atomic_check.
> - Set self refresh aware only if psr is supported.
> - Provide a stub
On Tue, Mar 7, 2023 at 4:12 PM Harry Wentland wrote:
>
> We want compositors to be able to set the output
> colorspace on DP and HDMI outputs, based on the
> caps reported from the receiver via EDID.
About that... The documentation says that user space has to check the
EDID for what the sink actu
On Sun, 12 Feb 2023 01:12:11 +0200, Dmitry Baryshkov wrote:
> QCM2290 doesn't seem to support reg-dma, UBWC and CSC. Drop
> corresponding features being incorrectly enabled for qcm2290.
>
>
Applied, thanks!
[02/50] drm/msm/dpu: disable features unsupported by QCM2290
(no commit info)
On Sun, 12 Feb 2023 01:12:10 +0200, Dmitry Baryshkov wrote:
> The SC8280XP also has a black hole at the top of MDP_TOP region. Set
> corresponding bit to disable access to that region.
>
>
Applied, thanks!
[01/50] drm/msm/dpu: set DPU_MDP_PERIPH_0_REMOVED for sc8280xp
(no commit info)
On Wed, 15 Mar 2023 20:21:33 -0400
Steven Rostedt wrote:
> On Wed, 15 Mar 2023 16:20:11 -0400
> Steven Rostedt wrote:
>
> > On Wed, 15 Mar 2023 20:51:49 +0100
> > Christian König wrote:
> >
> > > Steven please try the attached patch.
> >
> > I applied it, but as it's not always reprodu
On Wed, 15 Mar 2023 16:20:11 -0400
Steven Rostedt wrote:
> On Wed, 15 Mar 2023 20:51:49 +0100
> Christian König wrote:
>
> > Steven please try the attached patch.
>
> I applied it, but as it's not always reproducible, I'll have to give it
> several runs before I give you my "tested-by" tag.
On Wed, 15 Mar 2023 02:50:17 -0700, Tvrtko Ursulin wrote:
>
> On 10/03/2023 00:59, Ashutosh Dixit wrote:
> > The fallback to requested freq does not work for SLPC because SLPC does not
> > use 'struct intel_rps'. Also for SLPC requested freq can only be obtained
> > from a hw register after acquiri
On Wed, 15 Mar 2023, Jan Beulich wrote:
> On 15.03.2023 01:52, Stefano Stabellini wrote:
> > On Mon, 13 Mar 2023, Jan Beulich wrote:
> >> On 12.03.2023 13:01, Huang Rui wrote:
> >>> Xen PVH is the paravirtualized mode and takes advantage of hardware
> >>> virtualization support when possible. It wi
Hi Dave, Daniel,
Fixes for 6.3.
The following changes since commit eeac8ede17557680855031c6f305ece2378af326:
Linux 6.3-rc2 (2023-03-12 16:36:44 -0700)
are available in the Git repository at:
https://gitlab.freedesktop.org/agd5f/linux.git
tags/amd-drm-fixes-6.3-2023-03-15
for you to fetch
On Thu, Mar 16, 2023 at 07:18:11AM +1000, Dave Airlie wrote:
> MODULE_FIRMWARE_GROUP("g1")
> MODULE_FIRMWARE("fwv1.bin")
> MODULE_FIRMWARE("fwv2.bin")
> MODULE_FIRMWARE_GROUP_END("g2")
The way module namespaces were implemented could be used to leverage
something like this, just that you'd use it
On 02/22, Maíra Canal wrote:
> Commit 45d9c8dde4cd ("drm/vgem: use shmem helpers") introduced shmem
> helpers to vgem and with that, removed all uses of the struct
> drm_vgem_gem_object. So, as the struct is no longer used, delete it.
>
Thanks,
Reviewed-by: Melissa Wen
> Signed-off-by: Maíra Ca
On 3/14/2023 11:26 AM, Jeffrey Hugo wrote:
On 3/14/2023 4:29 AM, Jacek Lawrynowicz wrote:
Hi,
On 06.03.2023 22:33, Jeffrey Hugo wrote:
Add the control path component that talks to the management processor
(QSM)
to load workloads onto the AIC100 device. This implements the KMD
portion
of the
Hi Paul,
I love your patch! Yet something to improve:
[auto build test ERROR on usb/usb-testing]
[also build test ERROR on usb/usb-next usb/usb-linus linus/master v6.3-rc2
next-20230315]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we
Hi,
On Tue, Mar 14, 2023 at 8:28 PM Pin-yen Lin wrote:
>
> Hi Doug,
>
> On Wed, Mar 15, 2023 at 5:31 AM Doug Anderson wrote:
> >
> > Hi,
> >
> > On Tue, Mar 14, 2023 at 4:00 AM Pin-yen Lin wrote:
> > >
> > > Skip the drm_bridge_chain_pre_enable call when the bridge is already
> > > pre_enabled.
On 3/10/2023 5:01 PM, John Harrison wrote:
On 3/3/2023 11:20, Ceraolo Spurio, Daniele wrote:
On 2/17/2023 3:47 PM, john.c.harri...@intel.com wrote:
From: John Harrison
A failure to load the GuC is occasionally observed where the GuC log
actually showed that the GuC had loaded just fine. Th
Hi Dave,
As discussed, an early msm-next pull req for v6.4 with PSR and related
core helper bits.
The following changes since commit dbd7a2a941b8cbf9e5f79a777ed9fe0090eebb61:
PM / devfreq: Fix build issues with devfreq disabled (2023-01-30
07:37:40 -0800)
are available in the Git repository a
On Thu, 16 Mar 2023 at 06:56, Alex Deucher wrote:
>
> On Wed, Mar 15, 2023 at 4:35 PM Dave Airlie wrote:
> >
> > Hey moduly/firmware people,
> >
> > We are facing a problem in the future of NVIDIA providing giant
> > firmwares for their devices that are version locked with unstable
> > APIs. Even
From: suijingfeng
Loongson display controller IP has been integrated in both Loongson
North Bridge chipset(ls7a1000 and ls7a2000) and Loongson SoCs(ls2k1000
and ls2k2000 etc), it even has been included in Loongson BMC products.
This display controller is a PCI device, it has two display pipe. Fo
From: suijingfeng
This patch add myself as maintainer to fix following warning when run
./scripts/checkpatch.pl
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
Signed-off-by: suijingfeng
Signed-off-by: Sui Jingfeng <15330273...@189.cn>
---
MAINTAINERS | 8
Loongson display controller IP has been integrated in both Loongson
North Bridge chipset(ls7a1000 and ls7a2000) and Loongson SoCs(ls2k1000
and ls2k2000 etc), it even has been included in Loongson BMC products.
This display controller is a PCI device, it has two display pipe. For
the DC in LS7A1000
On Wed, Mar 15, 2023 at 4:35 PM Dave Airlie wrote:
>
> Hey moduly/firmware people,
>
> We are facing a problem in the future of NVIDIA providing giant
> firmwares for their devices that are version locked with unstable
> APIs. Even if they weren't version locked we'd likely have to support
> multi
On Wed, Mar 15, 2023 at 1:35 PM Dave Airlie wrote:
>
> Hey moduly/firmware people,
>
> We are facing a problem in the future of NVIDIA providing giant
> firmwares for their devices that are version locked with unstable
> APIs. Even if they weren't version locked we'd likely have to support
> multi
Hey moduly/firmware people,
We are facing a problem in the future of NVIDIA providing giant
firmwares for their devices that are version locked with unstable
APIs. Even if they weren't version locked we'd likely have to support
multiple major versions over time.
Now this becomes a problem because
On Wed, 15 Mar 2023 20:51:49 +0100
Christian König wrote:
> Steven please try the attached patch.
I applied it, but as it's not always reproducible, I'll have to give it
several runs before I give you my "tested-by" tag.
-- Steve
Am 15.03.23 um 20:15 schrieb Matthew Auld:
On Wed, 15 Mar 2023 at 18:41, Christian König
wrote:
Am 08.03.23 um 13:43 schrieb Steven Rostedt:
On Wed, 8 Mar 2023 07:17:38 +0100
Christian König wrote:
What test case/environment do you run to trigger this?
I'm running a 32bit x86 qemu instan
On Wed, 15 Mar 2023 at 18:41, Christian König
wrote:
>
> Am 08.03.23 um 13:43 schrieb Steven Rostedt:
> > On Wed, 8 Mar 2023 07:17:38 +0100
> > Christian König wrote:
> >
> >> What test case/environment do you run to trigger this?
> > I'm running a 32bit x86 qemu instance. Attached is the config.
On Wed, 15 Mar 2023 18:44:56 +0100 Matthieu Baerts
wrote:
> +Closes: https://example.com/issues/1234
I (and a few others) have been using "Addresses:" on occasion. I think
"Addresses:" is a bit more general. And more humble - "I tried to fix
it", not "there, I fixed it".
But whatever
Am 08.03.23 um 13:43 schrieb Steven Rostedt:
On Wed, 8 Mar 2023 07:17:38 +0100
Christian König wrote:
What test case/environment do you run to trigger this?
I'm running a 32bit x86 qemu instance. Attached is the config.
The libvirt xml file is here: https://rostedt.org/vm-images/tracetest-32
Am 15.03.23 um 18:31 schrieb Steven Rostedt:
On Wed, 15 Mar 2023 11:57:12 -0400
Steven Rostedt wrote:
So I'm looking at the backtraces.
The WARN_ON triggered:
[ 21.481449] mpls_gso: MPLS GSO support
[ 21.488795] IPI shorthand broadcast: enabled
[ 21.488873] [ cut here ]
Am 15.03.23 um 18:54 schrieb Steven Rostedt:
On Wed, 15 Mar 2023 11:57:12 -0400
Steven Rostedt wrote:
The WARN_ON triggered:
[ 21.481449] mpls_gso: MPLS GSO support
[ 21.488795] IPI shorthand broadcast: enabled
[ 21.488873] [ cut here ]
[ 21.490101] ---
Matthieu Baerts writes:
> +In the same category as linking web pages, a special tag is also used to
> close
> +issues but only when the mentioned ticketing system can do this operation
> +automatically::
> +
> +Closes: https://example.com/issues/1234
> +
> +Please use this 'Closes:' tag
On Wed, Mar 15, 2023 at 06:44:56PM +0100, Matthieu Baerts wrote:
> Note that thanks to this "Closes" tag, the mentioned bug trackers can
> also locate where a patch has been applied in different branches and
> repositories. If only the "Link" tag is used, the tracking can also be
> done but the tic
From: Fei Yang
On MTL, objects allocated through i915_gem_object_create_internal() are
mapped as uncached in GPU by default because HAS_LLC is false. However
in the live_hwsp_read selftest these watcher objects are mapped as WB
on CPU side. The conseqence is that the updates done by the GPU are n
On Wed, 15 Mar 2023 11:57:12 -0400
Steven Rostedt wrote:
> The WARN_ON triggered:
>
> [ 21.481449] mpls_gso: MPLS GSO support
> [ 21.488795] IPI shorthand broadcast: enabled
> [ 21.488873] [ cut here ]
> [ 21.490101] [ cut here ]
>
> [ 2
On Wed, 15 Mar 2023 11:57:12 -0400
Steven Rostedt wrote:
So I'm looking at the backtraces.
> The WARN_ON triggered:
>
> [ 21.481449] mpls_gso: MPLS GSO support
> [ 21.488795] IPI shorthand broadcast: enabled
> [ 21.488873] [ cut here ]
> [ 21.490101]
Hi,
On 15/03/2023 16:59, Alexandre Mergnat wrote:
Hi Neil,
Le jeu. 9 mars 2023 à 15:51, Neil Armstrong
a écrit :
+
+#include
Is this include needed ?
Seems not, I remove it.
+ struct gpio_desc *enable_gpio;
+ struct gpio_desc *reset_gpio;
+ struct gpio_desc *dcdc_en_gpio;
On Wed, Mar 15, 2023 at 6:53 AM Jonas Ådahl wrote:
>
> On Fri, Mar 10, 2023 at 09:38:18AM -0800, Rob Clark wrote:
> > On Fri, Mar 10, 2023 at 7:45 AM Jonas Ådahl wrote:
> > >
> > > On Wed, Mar 08, 2023 at 07:52:52AM -0800, Rob Clark wrote:
> > > > From: Rob Clark
> > > >
> > > > Add a way to hin
Remove all codepaths that implement fbdev output directly on GEM
buffers. Always allocate a shadow buffer in system memory and set
up deferred I/O for mmap.
The fbdev code that operated directly on GEM buffers was used by
drivers based on GEM DMA helpers. Those drivers have been migrated
to use fb
Rename symbols to match the style of other fbdev-emulation source
code. No functional changes.
Signed-off-by: Thomas Zimmermann
---
drivers/gpu/drm/drm_fbdev_generic.c | 66 ++---
1 file changed, 33 insertions(+), 33 deletions(-)
diff --git a/drivers/gpu/drm/drm_fbdev_ge
Clean up fbdev and client state if the probe function fails. It
used to leak allocated resources. Also reorder the individual steps
to simplify cleanup.
Signed-off-by: Thomas Zimmermann
---
drivers/gpu/drm/drm_fbdev_generic.c | 46 -
1 file changed, 32 insertions(+),
Consolidate all handling of CONFIG_DRM_FBDEV_LEAK_PHYS_SMEM by
making the module parameter optional in drm_fb_helper.c.
Without the config option, modules can set smem_start in struct
fb_info for internal usage, but not export if to userspace. The
address can only be exported by enabling the optio
Export the fb_info release code as drm_fb_helper_release_info(). Will
help with cleaning up failed fbdev probing.
Signed-off-by: Thomas Zimmermann
---
drivers/gpu/drm/drm_fb_helper.c | 33 -
include/drm/drm_fb_helper.h | 5 +
2 files changed, 29 insertion
Remove the flag prefer_shadow_fbdev from struct drm_mode_config.
Drivers set this flag to enable shadow buffering in the generic
fbdev emulation. Such shadow buffering is now mandatory, so the
flag is unused.
Signed-off-by: Thomas Zimmermann
---
drivers/gpu/drm/tiny/bochs.c| 1 -
drivers
After adding fbdev-dma and converting drivers, all users of
fbdev-generic require shadow buffering. Make it mandatory and
remove all other codepaths. This change greatly simplifies the
code for generic fbdev emulation. It will work with any driver
that supports GEM's vmap and vunmap.
The change fu
Hi Neil,
Le jeu. 9 mars 2023 à 15:51, Neil Armstrong
a écrit :
> > +
> > +#include
>
> Is this include needed ?
Seems not, I remove it.
> > + struct gpio_desc *enable_gpio;
> > + struct gpio_desc *reset_gpio;
> > + struct gpio_desc *dcdc_en_gpio;
>
> Isn't this "DCDC" a regulator ?
On Wed, 15 Mar 2023 16:25:11 +0100
Christian König wrote:
> >>
> >> Thanks for the notice,
> > I'm still getting this on Linus's latest tree.
>
> This must be some reference counting issue which only happens in your
> particular use case. We have tested this quite extensively and couldn't
>
On 10.03.2023 10:45, Nirmoy Das wrote:
Stolen memory is not usable for MTL A0 stepping beyond
certain access size and we have no control over userspace
access size of /dev/fb which can be backed by stolen memory.
So disable stolen memory backed fb by setting i915->dsm.usable_size
to zero.
v2: re
From: Martin Krastev
We reviewers botched that one.
Reviewed-by: Martin Krastev
Regards,
Martin
On 14.03.23 г. 23:14 ч., Zack Rusin wrote:
From: Zack Rusin
The src/dst_pitch got mixed up during the rework of the function, make
sure the offset's refer to the correct one.
Spotted by cla
Am 15.03.23 um 16:09 schrieb Steven Rostedt:
On Wed, 8 Mar 2023 07:17:38 +0100
Christian König wrote:
Am 08.03.23 um 03:26 schrieb Steven Rostedt:
On Tue, 7 Mar 2023 21:22:23 -0500
Steven Rostedt wrote:
Looks like there was a lock possibly used after free. But as commit
9bff18d13473a9fdf
On Sun, Mar 12, 2023 at 08:01:57PM +0800, Huang Rui wrote:
> From: Chen Jiqian
>
> When hypervisor get an interrupt, it needs interrupt's
> gsi number instead of irq number. Gsi number is unique
> in xen, but irq number is only unique in one domain.
> So, we need to record the relationship betwee
Hi, Alexandre:
Alexandre Mergnat 於 2023年3月15日 週三 下午5:36寫道：
>
> Le lun. 13 mars 2023 à 16:21, Chun-Kuang Hu a écrit
> :
> >
> > >
> > > + dpi->dpi_clk = devm_clk_get_optional(dev, "dpi");
> >
> > For MT8365, DPI clock is not optional, so make sure that MT8365 DPI
> > should have this clock
On Sun, Mar 12, 2023 at 08:01:56PM +0800, Huang Rui wrote:
> From: Chen Jiqian
>
> Add acpi_register_gsi_xen_pvh() to register gsi for PVH mode.
> In addition to call acpi_register_gsi_ioapic(), it also setup
> a map between gsi and vector in hypervisor side. So that,
> when dgpu create an interr
On Fri, Mar 10, 2023 at 09:38:18AM -0800, Rob Clark wrote:
> On Fri, Mar 10, 2023 at 7:45 AM Jonas Ådahl wrote:
> >
> > On Wed, Mar 08, 2023 at 07:52:52AM -0800, Rob Clark wrote:
> > > From: Rob Clark
> > >
> > > Add a way to hint to the fence signaler of an upcoming deadline, such as
> > > vblan
On 3/14/23 05:26, Dmitry Osipenko wrote:
> @@ -633,7 +605,10 @@ int drm_gem_shmem_mmap(struct drm_gem_shmem_object
> *shmem, struct vm_area_struct
> return ret;
> }
>
> + dma_resv_lock(shmem->base.resv, NULL);
> ret = drm_gem_shmem_get_pages(shmem);
> + dma_resv
On 09/03/2023 15:23, Alexandre Mergnat wrote:
> Add compatible for the MT8365 SoC.
>
> Signed-off-by: Alexandre Mergnat
> ---
Acked-by: Krzysztof Kozlowski
Best regards,
Krzysztof
Am 15.03.23 um 10:52 schrieb Tvrtko Ursulin:
Hi,
On 14/03/2023 15:33, Christian König wrote:
Am 14.03.23 um 15:18 schrieb Tvrtko Ursulin:
From: Tvrtko Ursulin
Thread group id (aka pid from userspace point of view) is a more
interesting thing to show as an owner of a DRM fd, so track and sho
On 15/03/2023 09:01, Alexandre Mergnat wrote:
> Le ven. 10 mars 2023 à 09:39, Krzysztof Kozlowski
> a écrit :
>>
>> On 09/03/2023 15:23, Alexandre Mergnat wrote:
>>> Add compatible for the MT8365 SoC.
>>>
>>> Signed-off-by: Alexandre Mergnat
>>> ---
>>> Documentation/devicetree/bindings/soc/medi
On Sun, Mar 12, 2023 at 08:01:55PM +0800, Huang Rui wrote:
> There is an second stage translation between the guest machine address
> and host machine address in Xen PVH/HVM. The PCI bar address in the xen
> guest kernel are not translated at the second stage on Xen PVH/HVM, so
I'm confused by the
From: Jiri Slaby (SUSE)
[ Upstream commit 3638a820c5c3b52f327cebb174fd4274bee08aa7 ]
gcc-13 warns about mismatching types for enums. That revealed switched
arguments of nv50_wndw_new_():
drivers/gpu/drm/nouveau/dispnv50/wndw.c:696:1: error: conflicting types for
'nv50_wndw_new_' due to enum/i
On Sun, Mar 12, 2023 at 08:01:54PM +0800, Huang Rui wrote:
> The xen grant table will be initialied before parsing the PCI resources,
> so xen_alloc_unpopulated_pages() ends up using a range from the PCI
> window because Linux hasn't parsed the PCI information yet.
>
> So modify the initialization
From: Harry Wentland
commit e5eef23e267c72521d81f23f7f82d1f523d4a253 upstream.
The EDID of an HDR display defines EOTFs that are supported
by the display and can be set in the HDR metadata infoframe.
Userspace is expected to read the EDID and set an appropriate
HDR_OUTPUT_METADATA.
In drm_parse
From: Harry Wentland
commit 7d386975f6a495902e679a3a250a7456d7e54765 upstream.
This is useful to understand the bpc defaults and
support of a driver.
Signed-off-by: Harry Wentland
Cc: Pekka Paalanen
Cc: Sebastian Wick
Cc: vitaly.pros...@amd.com
Cc: Uma Shankar
Cc: Ville Syrjälä
Cc: Joshua
From: Jiri Slaby (SUSE)
[ Upstream commit 3638a820c5c3b52f327cebb174fd4274bee08aa7 ]
gcc-13 warns about mismatching types for enums. That revealed switched
arguments of nv50_wndw_new_():
drivers/gpu/drm/nouveau/dispnv50/wndw.c:696:1: error: conflicting types for
'nv50_wndw_new_' due to enum/i
From: Harry Wentland
commit 7d386975f6a495902e679a3a250a7456d7e54765 upstream.
This is useful to understand the bpc defaults and
support of a driver.
Signed-off-by: Harry Wentland
Cc: Pekka Paalanen
Cc: Sebastian Wick
Cc: vitaly.pros...@amd.com
Cc: Uma Shankar
Cc: Ville Syrjälä
Cc: Joshua
From: Harry Wentland
commit e5eef23e267c72521d81f23f7f82d1f523d4a253 upstream.
The EDID of an HDR display defines EOTFs that are supported
by the display and can be set in the HDR metadata infoframe.
Userspace is expected to read the EDID and set an appropriate
HDR_OUTPUT_METADATA.
In drm_parse
Dear Thomas,
Thank you for the kind advice.
In fact, I notice there was a discussion regarding whether to put the
check in each individual driver or solve this problem as a whole as
you suggested. The conclusion is that it is better to keep the check per
driver rather than in the caller.
Related
From: Jiri Slaby (SUSE)
[ Upstream commit 3638a820c5c3b52f327cebb174fd4274bee08aa7 ]
gcc-13 warns about mismatching types for enums. That revealed switched
arguments of nv50_wndw_new_():
drivers/gpu/drm/nouveau/dispnv50/wndw.c:696:1: error: conflicting types for
'nv50_wndw_new_' due to enum/i
From: Harry Wentland
commit 7d386975f6a495902e679a3a250a7456d7e54765 upstream.
This is useful to understand the bpc defaults and
support of a driver.
Signed-off-by: Harry Wentland
Cc: Pekka Paalanen
Cc: Sebastian Wick
Cc: vitaly.pros...@amd.com
Cc: Uma Shankar
Cc: Ville Syrjälä
Cc: Joshua
From: Harry Wentland
commit 7d386975f6a495902e679a3a250a7456d7e54765 upstream.
This is useful to understand the bpc defaults and
support of a driver.
Signed-off-by: Harry Wentland
Cc: Pekka Paalanen
Cc: Sebastian Wick
Cc: vitaly.pros...@amd.com
Cc: Uma Shankar
Cc: Ville Syrjälä
Cc: Joshua
From: Jiri Slaby (SUSE)
[ Upstream commit 3638a820c5c3b52f327cebb174fd4274bee08aa7 ]
gcc-13 warns about mismatching types for enums. That revealed switched
arguments of nv50_wndw_new_():
drivers/gpu/drm/nouveau/dispnv50/wndw.c:696:1: error: conflicting types for
'nv50_wndw_new_' due to enum/i
From: Harry Wentland
commit 7d386975f6a495902e679a3a250a7456d7e54765 upstream.
This is useful to understand the bpc defaults and
support of a driver.
Signed-off-by: Harry Wentland
Cc: Pekka Paalanen
Cc: Sebastian Wick
Cc: vitaly.pros...@amd.com
Cc: Uma Shankar
Cc: Ville Syrjälä
Cc: Joshua
S2idle resume freeze can be observed on Intel ADL + AMD WX5500. This is
caused by commit 0064b0ce85bb ("drm/amd/pm: enable ASPM by default").
The root cause is still not clear for now.
So extend and apply the ASPM quirk from commit e02fe3bc7aba
("drm/amdgpu: vi: disable ASPM on Intel Alder Lake b
On Tue, 14 Mar 2023, Niklas Schnelle wrote:
> In a future patch HAS_IOPORT=n will result in inb()/outb() and friends
> not being declared. We thus need to add HAS_IOPORT as dependency for
> those drivers using them. In the bochs driver there is optional MMIO
> support detected at runtime, warn if
Hi Nirmoy,
On Wed, Mar 15, 2023 at 11:54:46AM +0100, Nirmoy Das wrote:
> Add a comment why there is a obj refcount inc before installing
> the vm_ops for the mmap call. Also remove the invalid older comment
> as drm API(drm_gem_prime_mmap()) will hold an obj reference before
> calling this driver
On 15/03/2023 11:10, Liviu Dudau wrote:
> On Wed, Mar 15, 2023 at 09:34:37AM +, Steven Price wrote:
>> On 13/03/2023 10:22, patrik.bergl...@arm.com wrote:
>>> From: Patrik Berglund
>>>
>>> The Arm Morello board EDK2 port already provides an EFI GOP display for
>>> Ceti/Cetus (Komeda) with more
On Wed, Mar 15, 2023 at 09:34:37AM +, Steven Price wrote:
> On 13/03/2023 10:22, patrik.bergl...@arm.com wrote:
> > From: Patrik Berglund
> >
> > The Arm Morello board EDK2 port already provides an EFI GOP display for
> > Ceti/Cetus (Komeda) with more boards incoming.
> > However, once the Ko
On 3/14/23 01:20, Yussef Fatayer wrote:
Rename documentation parameter from "proposed_placement" to
"placement" to avoid the warnings of function parameter not
described and excess function parameter.
Signed-off-by: Yussef Fatayer
Reviewed-by: Maíra Canal
Best Regards,
- Maíra Canal
---
Add a comment why there is a obj refcount inc before installing
the vm_ops for the mmap call. Also remove the invalid older comment
as drm API(drm_gem_prime_mmap()) will hold an obj reference before
calling this driver mmap callback so we can't have 0-refcnted
object here.
Cc: Matthew Auld
Cc: An
Hi,
thanks for looking through these drivers.
Am 15.03.23 um 10:22 schrieb Wei Chen:
var->pixclock can be assigned to zero by user. Without
proper check, divide by zero would occur when invoking
macro PICOS2KHZ in au1200fb_fb_check_var.
Error out if var->pixclock is zero.
Signed-off-by: Wei C
On Wed, Mar 15, 2023 at 09:16:50AM +0100, Geert Uytterhoeven wrote:
> Hi Niklas,
>
> On Tue, Mar 14, 2023 at 1:13 PM Niklas Schnelle
> wrote:
> > In a future patch HAS_IOPORT=n will result in inb()/outb() and friends
> > not being declared. We thus need to add HAS_IOPORT as dependency for
> > th
On Tue, Mar 14, 2023 at 10:18 AM Colin Ian King wrote:
>
> There is a spelling mistake in a dev_err message. Fix it.
>
> Signed-off-by: Colin Ian King
> ---
> drivers/accel/habanalabs/common/memory_mgr.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/accel/haban
On 13/03/2023 18:29, Greg Kroah-Hartman wrote:
The struct bus_type pointers in the functions
intel_huc_register_gsc_notifier() and
intel_huc_unregister_gsc_notifier() should be a const pointer, as the
structure is not modified anywhere in the functions, and the pointer
they are passed will be a
Hi Dave & Daniel -
Missed fixes last week, so here we are early this week.
drm-intel-fixes-2023-03-15:
drm/i915 fixes for v6.3-rc3:
- Fix hwmon PL1 power limit enabling
- Fix audio ELD handling for DP MST
- Fix PSR io and wake line calculations
- Fix DG2 HDMI modes with 267.30 and 319.89 MHz p
Hi,
On 14/03/2023 15:33, Christian König wrote:
Am 14.03.23 um 15:18 schrieb Tvrtko Ursulin:
From: Tvrtko Ursulin
Thread group id (aka pid from userspace point of view) is a more
interesting thing to show as an owner of a DRM fd, so track and show that
instead of the thread id.
In the next
On 10/03/2023 00:59, Ashutosh Dixit wrote:
The fallback to requested freq does not work for SLPC because SLPC does not
use 'struct intel_rps'. Also for SLPC requested freq can only be obtained
from a hw register after acquiring forcewake which we don't want to do for
PMU. Therefore remove fallb
On 10/03/2023 00:59, Ashutosh Dixit wrote:
Expose intel_rps_read_actual_frequency_fw to read the actual freq without
taking forcewake for use by PMU. The code is refactored to use a common set
of functions across sysfs and PMU. Using common functions with sysfs in PMU
solves the issues of missi
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