On 3/24/23 00:51, Dmitry Osipenko wrote:
> On 3/24/23 00:18, Rob Clark wrote:
> ...
>>> +static int
>>> +virtio_gpu_parse_deps(struct virtio_gpu_submit *submit)
>>> +{
>>> + struct drm_virtgpu_execbuffer *exbuf = submit->exbuf;
>>> + struct drm_virtgpu_execbuffer_syncobj syncobj_desc;
>
We have multiple Vulkan context types that are awaiting for the addition
of the sync object DRM UAPI support to the VirtIO-GPU kernel driver:
1. Venus context
2. Native contexts (virtio-freedreno, virtio-intel, virtio-amdgpu)
Mesa core supports DRM sync object UAPI, providing Vulkan drivers wit
Add sync object DRM UAPI support to VirtIO-GPU driver. It's required
for enabling a full-featured Vulkan fencing by Venus and native context
VirtIO-GPU Mesa drivers.
Signed-off-by: Dmitry Osipenko
---
drivers/gpu/drm/virtio/virtgpu_drv.c| 3 +-
drivers/gpu/drm/virtio/virtgpu_submit.c | 219
Move virtio_gpu_execbuffer_ioctl() into separate virtgpu_submit.c file
and refactor the code along the way to ease addition of new features to
the ioctl.
Reviewed-by: Rob Clark
Signed-off-by: Dmitry Osipenko
---
drivers/gpu/drm/virtio/Makefile | 2 +-
drivers/gpu/drm/virtio/virtgpu_dr
Hi, Angelo:
AngeloGioacchino Del Regno 於
2023年3月23日 週四 下午4:58寫道：
>
> Il 21/03/23 13:18, Nancy.Lin ha scritto:
> > The hardware path of vdosys1 with DPTx output need to go through by several
> > modules, such as, OVL_ADAPTOR and MERGE.
> >
> > Add DRM and these modules support by the patches belo
On 3/23/2023 11:41 AM, Alan Previn wrote:
MESA driver is creating protected context on every driver handle
creation to query caps bits for app. So when running CI tests,
they are observing hundreds of drm_errors when enabling PXP
in .config but using SOC fusing or BIOS configuration that canno
Hi Daniele - thanks for reviewing this - i will fix all of code in accordance
to the review
comments you provided with some exceptions / alternatives:
On Fri, 2023-03-03 at 17:07 -0800, Ceraolo Spurio, Daniele wrote:
>
> On 2/27/2023 6:21 PM, Alan Previn wrote:
> > Add GSC engine based method fo
drm_edid_read returns NULL on error, so feeding it directly into
drm_edid_duplicate may lead to NULL pointer dereference. Add a check to
guard this.
Fixes: 6a17b4d1b52f ("drm/bridge: ps8640: Add a cache for EDID")
Signed-off-by: Pin-yen Lin
---
drivers/gpu/drm/bridge/parade-ps8640.c | 6 ++
This re-aligns the xe driver with the upstream guidelines
(https://docs.kernel.org/driver-api/firmware/firmware-usage-guidelines.html?highlight=firmware+guideline)
and document the table used for it so it's easier to understand the
policy in place. Justification for the changes, including the excep
The rev field is always 0 so it ends up never used. In i915 it was
introduced because of CML: up to rev 5 it reuses the guc and huc
firmware blobs from KBL. After that there is a specific firmware for
that platform. This can be reintroduced later if ever needed.
With the removal of revid the pack
Update the logic to autoselect GuC/HuC for the platforms with the
following improvements:
- Document what is the firmware file that is expected to be
loaded and what is checked from blob headers
- When the platform is under force-probe it's desired to enforce
the full-version requirement so th
Platform order is important when looping through the list of guc
firmware blobs since we use it to prevent loading a blob for a newer
platform onto an older one. Move PVC after ADL.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/xe/xe_platform_types.h | 3 +--
drivers/gpu/drm/xe/xe_uc_fw.c
Hi Neil,
On Thu, Mar 23, 2023 at 02:10:44PM +0100, Neil Armstrong wrote:
> Hi,
>
> On 23/03/2023 11:49, Krzysztof Kozlowski wrote:
> > On 23/03/2023 11:25, Neil Armstrong wrote:
> > > Fixes the following DT bindings check error:
> > > ufshc@1d84000: Unevaluated properties are not allowed ('reg-na
101 - 113 of 113 matches
Mail list logo
