Michael Banack writes:
Hello Michael,
> Yes, that patch should be:
>
> Signed-off-by: Michael Banack
>
Great, thanks for the confirmation.
> --Michael Banack
>
--
Best regards,
Javier Martinez Canillas
Core Platforms
Red Hat
Use kfree() to free 'args' before return '-EINVAL'.
Signed-off-by: Su Hui
---
drivers/gpu/drm/nouveau/nvif/vmm.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/nouveau/nvif/vmm.c
b/drivers/gpu/drm/nouveau/nvif/vmm.c
index 99296f03371a..a0afe3bf0d78 100644
--- a/drivers/gpu/
Hello,
I have a draft of a proposal that I would like feedback on from Maíra
Canal (or another mentor). If you could please let me know their email
address (or I could send you the draft and you could forward it to them).
It's for the KUnit and DRM project.
Thanks,
David Walters.
From: Simon Ser
amdgpu_dm_commit_planes() already sets the flip_immediate flag for
async page-flips. This flag is used to set the UNP_FLIP_CONTROL
register. Thus, no additional change is required to handle async
page-flips with the atomic uAPI.
Signed-off-by: Simon Ser
Reviewed-by: André Almeid
From: Pekka Paalanen
Specify how the atomic state is maintained between userspace and
kernel, plus the special case for async flips.
Signed-off-by: Pekka Paalanen
Signed-off-by: André Almeida
---
v8:
- no changes
v7:
- add a note that drivers can make exceptions for ad-hoc prop changes
- add a
Given that prop changes may lead to modesetting, which would defeat the
fast path of the async flip, refuse any atomic prop change for async
flips in atomic API. The only exception is the framebuffer ID to flip
to. Currently the only plane type supported is the primary one.
Reviewed-by: Simon Ser
From: Simon Ser
This new field indicates whether the driver has the necessary logic
to support async page-flips via the atomic uAPI. This is leveraged by
the next commit to allow user-space to use this functionality.
All atomic drivers setting drm_mode_config.async_page_flip are updated
to also
From: Simon Ser
This new kernel capability indicates whether async page-flips are
supported via the atomic uAPI. DRM clients can use it to check
for support before feeding DRM_MODE_PAGE_FLIP_ASYNC to the kernel.
Make it clear that DRM_CAP_ASYNC_PAGE_FLIP is for legacy uAPI only.
Signed-off-by:
From: Simon Ser
If the driver supports it, allow user-space to supply the
DRM_MODE_PAGE_FLIP_ASYNC flag to request an async page-flip.
Set drm_crtc_state.async_flip accordingly.
Document that drivers will reject atomic commits if an async
flip isn't possible. This allows user-space to fall back
Hi,
This work from me and Simon adds support for DRM_MODE_PAGE_FLIP_ASYNC through
the atomic API. This feature is already available via the legacy API. The use
case is to be able to present a new frame immediately (or as soon as
possible), even if after missing a vblank. This might result in teari
On Tue, Oct 24, 2023 at 11:09:10PM +0200, Salvatore Bonaccorso wrote:
> Hi Timo,
>
> On Tue, Oct 24, 2023 at 11:14:32PM +0300, Timo Lindfors wrote:
> > Package: src:linux
> > Version: 6.1.55-1
> > Severity: normal
> >
> > Steps to reproduce:
> > 1) Install Debian 12 as a virtual machine using vir
Hi Alex,
On Tue, 24 Oct 2023 08:57:16 -0400 Alex Deucher wrote:
>
> The two patches are in my -next tree and in the PR I sent last week.
Thanks.
--
Cheers,
Stephen Rothwell
pgp0dvwDrF7ce.pgp
Description: OpenPGP digital signature
Hi Timo,
On Tue, Oct 24, 2023 at 11:14:32PM +0300, Timo Lindfors wrote:
> Package: src:linux
> Version: 6.1.55-1
> Severity: normal
>
> Steps to reproduce:
> 1) Install Debian 12 as a virtual machine using virt-manager, choose qxl
>graphics card. You only need basic installation without wayla
On Tue, Oct 24, 2023 at 01:27:55PM -0500, Rob Herring wrote:
> On Thu, Oct 19, 2023 at 09:50:38AM -0500, Chris Morgan wrote:
> > On Thu, Oct 19, 2023 at 11:22:19AM +0200, Krzysztof Kozlowski wrote:
> > > On 18/10/2023 18:18, Chris Morgan wrote:
> > > > From: Chris Morgan
> > > >
> > > > Update th
On Mon, Oct 23, 2023 at 04:40:05PM +0200, Alexandre Mergnat wrote:
> Display Serial Interface for MT8365 is compatible with another SoC.
> Then, add MT8365 binding along with MT8183 SoC.
>
> Signed-off-by: Alexandre Mergnat
> ---
> Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.
On Fri, Oct 20, 2023 at 3:51 PM Alex Deucher wrote:
>
> Hi Dave, Sima,
>
> More updates for 6.7. Mostly bug fixes.
>
> The following changes since commit 27442758e9b4e083bef3f164a1739475c01f3202:
>
> Merge tag 'amd-drm-next-6.7-2023-10-13' of
> https://gitlab.freedesktop.org/agd5f/linux into d
On Tue, Oct 24, 2023 at 8:57 AM Alex Deucher wrote:
>
> On Mon, Oct 23, 2023 at 8:59 PM Stephen Rothwell
> wrote:
> >
> > Hi all,
> >
> > On Thu, 19 Oct 2023 12:06:18 +1100 Stephen Rothwell
> > wrote:
> > >
> > > On Tue, 10 Oct 2023 12:43:57 +1100 Stephen Rothwell
> > > wrote:
> > > >
> > >
On Mon, 23 Oct 2023 17:37:13 +, Jonas Karlman wrote:
> This series add support for displaying 10-bit 4:2:0 and 4:2:2 formats produced
> by the Rockchip Video Decoder on RK322X, RK3288, RK3328, RK3368 and RK3399.
> Also include 10-bit 4:4:4 support since VOP can support that also.
>
> First pat
On Wed, 18 Oct 2023 11:52:12 +0800, Liu Ying wrote:
> In order to support burst mode, vendor drivers set lane_mbps higher than
> bandwidth through DPI interface. So, calculate horizontal component lane
> byte clock cycle(lbcc) based on lane_mbps instead of pixel clock rate for
> burst mode.
>
>
On Wed, 18 Oct 2023 17:41:22 +0800, Andy Yan wrote:
> From: Andy Yan
>
>
> This is a preparation for the upcoming support for rk3588 vop.
>
> Patch 1 make the bpp calculation covery more format
> Patch 2 remove formats that are unsupported by cluster windows
> Patch 3 add more formats
> Patch 4
Yes, that patch should be:
Signed-off-by: Michael Banack
--Michael Banack
On 10/23/23 14:29, Javier Martinez Canillas wrote:
Albert Esteve writes:
From: Michael Banack
To clarify the intent and reasoning behind the hotspot properties
introduce userspace documentation that goes over curso
Add a single KUnit test case for the drm_fb_release function, which also
implicitly test the static legacy_remove_fb function.
Signed-off-by: Carlos Eduardo Gallo Filho
---
v2:
- Rely on drm_kunit_helper_alloc_device() for mock initialization.
---
drivers/gpu/drm/tests/drm_framebuffer_test.c |
Add a single KUnit test case for the drm_mode_addfb2 function.
Signed-off-by: Carlos Eduardo Gallo Filho
---
v2:
- Reorder kunit cases alphabetically.
- Rely on drm_kunit_helper_alloc_device() for mock initialization.
---
drivers/gpu/drm/tests/drm_framebuffer_test.c | 104 ++-
Add a single KUnit test case for the drm_framebuffer_free function.
Signed-off-by: Carlos Eduardo Gallo Filho
---
v2:
- Reorder kunit cases alphabetically.
---
drivers/gpu/drm/tests/drm_framebuffer_test.c | 49
1 file changed, 49 insertions(+)
diff --git a/drivers/gpu/drm
Add a single KUnit test case for the drm_framebuffer_init function.
Signed-off-by: Carlos Eduardo Gallo Filho
---
v2:
- Reorder kunit cases alphabetically.
- Let fb1.dev unset instead of set it to wrong_drm to test mismatched
drm_device passed as drm_framebuffer_init() argument.
- Clean
Add a single KUnit test case for the drm_framebuffer_lookup function.
Signed-off-by: Carlos Eduardo Gallo Filho
---
v2:
- Reorder kunit cases alphabetically.
- Replace drm_mode_object_add() call to drm_framebuffer_init().
- Rely on drm_kunit_helper_alloc_device() for mock initialization.
--
Add a single KUnit test case for the drm_framebuffer_cleanup function.
Signed-off-by: Carlos Eduardo Gallo Filho
---
v2:
- Reorder kunit cases alphabetically.
- Rely on drm_kunit_helper_alloc_device() for mock initialization.
---
drivers/gpu/drm/tests/drm_framebuffer_test.c | 37
Add a parametrized test for the drm_framebuffer_check_src_coords function.
Signed-off-by: Carlos Eduardo Gallo Filho
---
v2:
- Order kunit cases alphabetically.
- Rename check_src_coords_case to drm_framebuffer_check_src_coords_case.
- Remove unnecessary comments.
- Add framebuffer size a
Introduce a test to cover the creation of framebuffer with
modifier on a device that doesn't support it.
Signed-off-by: Carlos Eduardo Gallo Filho
---
v2:
- Reorder kunit cases alphabetically.
---
drivers/gpu/drm/tests/drm_framebuffer_test.c | 28
1 file changed, 28 insert
Replace the use of strcpy to strscpy on the test_to_desc of the
drm_test_framebuffer_create test for better security and reliability.
Signed-off-by: Carlos Eduardo Gallo Filho
---
drivers/gpu/drm/tests/drm_framebuffer_test.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/dri
Extend the existing test case to cover:
1. Invalid flag atribute in the struct drm_mode_fb_cmd2.
2. Pixel format which requires non-linear modifier with
DRM_FORMAT_MOD_LINEAR set.
3. Non-zero buffer offset for an unused plane
Also replace strcpy to strscpy on test_to_desc for improved security
and
The dev_private member of drm_device is deprecated and its use should
be avoided. Stop using it by embedding the drm_device onto a mock struct
with a void pointer like dev_private, using it instead.
Also start using drm_kunit_helper_alloc_drm_device() for allocating
the drm_device mock.
Signed-of
This patchset includes new KUnit tests for 7 untested functions from
drm_framebuffer.c and improvements to the existent one.
The first patch replace the use of dev_private member from drm_device
mock on the existent test by embedding it into an outer struct containing
a generic pointer.
The patch
On 10/23/2023 4:03 PM, Dmitry Baryshkov wrote:
On Tue, 24 Oct 2023 at 01:36, Rob Clark wrote:
On Mon, Oct 23, 2023 at 3:30 PM Dmitry Baryshkov
wrote:
On Tue, 24 Oct 2023 at 01:12, Rob Clark wrote:
From: Rob Clark
Seems like we need to pick INPUT_SEL=1 when CTM is enabled. But not
o
On Thu, Oct 19, 2023 at 09:50:38AM -0500, Chris Morgan wrote:
> On Thu, Oct 19, 2023 at 11:22:19AM +0200, Krzysztof Kozlowski wrote:
> > On 18/10/2023 18:18, Chris Morgan wrote:
> > > From: Chris Morgan
> > >
> > > Update the NewVision NV3051D compatible strings by adding a new panel,
> > > the p
The member variable enable_hpo_pg_support is already initialized
and hence the reinitialization instruction can be removed. Issue
identified using the doubleinit.cocci Coccinelle semantic patch script.
Signed-off-by: Bragatheswaran Manickavel
---
drivers/gpu/drm/amd/display/dc/dcn35/dcn35_reso
Hi Jani,
> > static void rc6_res_reg_init(struct intel_rc6 *rc6)
> > {
> > - memset(rc6->res_reg, INVALID_MMIO_REG.reg, sizeof(rc6->res_reg));
>
> That's just bollocks. memset() is byte granularity, while
> INVALID_MMIO_REG.reg is u32. If the value was anything other than 0,
> this would brea
Hi,
On Thu, Oct 05, 2023 at 11:16:26PM +0200, Andi Shyti wrote:
> Given a reference to "guc", the guc_to_i915() returns the
> pointer to "i915" private data.
>
> Signed-off-by: Andi Shyti
just a kind reminder.
Andi
Hi,
> I might have picked up the wrong series and missed some reviews
> and the extra patch from Nirmoy with a real use of the
> drm_dbg_ratelimited() that John was looking for.
just a kind reminder.
Andi
On 2023-10-24 11:23, Maxime Ripard wrote:
> Hi Marco,
>
> On Mon, Oct 23, 2023 at 06:45:40PM +0200, Marco Pagani wrote:
>> This patch introduces an initial KUnit test suite for GEM objects
>> backed by shmem buffers.
>>
>> Signed-off-by: Marco Pagani
>> ---
>> drivers/gpu/drm/Kconfig
From: Rob Clark
For allocations with userspace controlled size, we should not warn on
allocation failure. Fixes KASAN splat:
WARNING: CPU: 6 PID: 29557 at mm/page_alloc.c:5398
__alloc_pages+0x160c/0x2204
Modules linked in: bridge stp llc hci_vhci tun veth xt_cgroup uinput
xt_MASQUERADE
From: Rob Clark
Error messages resulting from incorrect usage of the kernel uabi should
not spam dmesg by default. But it is useful to enable them to debug
userspace. So demote to DRM_UT_DRIVER.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/msm_gem.c| 6 ++---
drivers/gpu/drm/msm
From: Jacek Lawrynowicz
IP reset has to followed by ivpu_pll_disable() to properly enter
reset state.
Fixes: 828d63042aec ("accel/ivpu: Don't enter d0i3 during FLR")
Cc: sta...@vger.kernel.org
Signed-off-by: Jacek Lawrynowicz
Reviewed-by: Stanislaw Gruszka
Signed-off-by: Stanislaw Gruszka
---
On 2023-10-24 14:41, Andy Yan wrote:
> Hi:
>
> On 10/24/23 16:49, Christopher Obbard wrote:
>> Hi Jonas,
>>
>> On Mon, 2023-10-23 at 21:11 +, Jonas Karlman wrote:
>>> Use of DRM_FORMAT_RGB888 and DRM_FORMAT_BGR888 on e.g. RK3288, RK3328
>>> and RK3399 result in wrong colors being displayed.
>>
On 10/24/23 07:56, Maxime Ripard wrote:
The VC4 mock helpers allocate the CRTC, encoders and connectors using a
call to kunit_kzalloc(), but the DRM device they are attache to survives
for longer than the test itself which leads to use-after-frees reported
by KASAN.
Switch to drmm_kzalloc to tie
On 10/15/23 10:27, Geert Uytterhoeven wrote:
Currently drm_client_buffer_addfb() uses the legacy drm_mode_addfb(),
which uses bpp and depth to guess the wanted buffer format.
However, drm_client_buffer_addfb() already knows the exact buffer
format, so there is no need to convert back and forth be
On Tue, Oct 24, 2023 at 06:57:38PM +0300, Andy Shevchenko wrote:
> It's a dirty hack in the driver that pokes GPIO registers behind
> the driver's back. Moreoever it might be problematic as simultaneous
> I/O may hang the system, see the commit 0bd50d719b00 ("pinctrl:
> cherryview: prevent concurre
From: Karol Wachowski
Move sequence of masking and unmasking global interrupts from buttress
interrupt handler to generic one that handles both VPUIP and BTRS
interrupts. Unmasking global interrupts will re-trigger MSI for any
pending interrupts.
Lack of this sequence will cause the driver to mi
From: Tvrtko Ursulin
When notified by the drm core we are over our allotted time budget, i915
instance will check if any of the GPU engines it is reponsible for is
fully saturated. If it is, and the client in question is using that
engine, it will throttle it.
For now throttling is done simplist
From: Tvrtko Ursulin
To support container use cases where external orchestrators want to make
deployment and migration decisions based on GPU load and capacity, we can
expose the GPU load as seen by the controller in a new drm.active_us
field. This field contains a monotonic cumulative time cgrou
From: Tvrtko Ursulin
To reduce the number of tracking going on, especially with drivers which
will not support any sort of control from the drm cgroup controller side,
lets express the funcionality as opt-in and use the presence of
drm_cgroup_ops as activation criteria.
Signed-off-by: Tvrtko Urs
From: Tvrtko Ursulin
Similar to CPU scheduling, implement a concept of weight in the drm cgroup
controller.
Uses the same range and default as the CPU controller - CGROUP_WEIGHT_MIN,
CGROUP_WEIGHT_DFL and CGROUP_WEIGHT_MAX.
Later each cgroup is assigned a time budget proportionaly based on the
From: Tvrtko Ursulin
Add a new callback via which the drm cgroup controller is notifying the
drm core that a certain process is above its allotted GPU time.
Signed-off-by: Tvrtko Ursulin
---
include/drm/drm_drv.h | 8
kernel/cgroup/drm.c | 16
2 files changed, 24 i
From: Tvrtko Ursulin
Add a driver callback and core helper which allow querying the time spent
on GPUs for processes belonging to a group.
Signed-off-by: Tvrtko Ursulin
---
include/drm/drm_drv.h | 28
kernel/cgroup/drm.c | 20
2 files changed
From: Tvrtko Ursulin
To enable propagation of settings from the cgroup DRM controller to DRM
and vice-versa, we need to start tracking to which cgroups DRM clients
belong.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/drm_file.c | 6
include/drm/drm_file.h | 6
include/linu
From: Tvrtko Ursulin
This series contains a proposal for a DRM cgroup controller which implements a
weight based hierarchical GPU usage budget approach and is similar in concept to
some of the existing controllers like CPU and IO.
Motivation mostly comes from my earlier proposal where I identifi
From: Tvrtko Ursulin
Skeleton controller without any functionality.
Signed-off-by: Tvrtko Ursulin
---
include/linux/cgroup_drm.h| 9 ++
include/linux/cgroup_subsys.h | 4 +++
init/Kconfig | 7
kernel/cgroup/Makefile| 1 +
kernel/cgroup/drm.c
DSI code for VBT has a set of ugly GPIO hacks, one of which is direct
talking to GPIO IP behind the actual driver's back. A second attempt
to fix that is here.
If I understood correctly, my approach should work in the similar way as
the current IOSF GPIO.
Hans, I believe you have some devices tha
It's a dirty hack in the driver that pokes GPIO registers behind
the driver's back. Moreoever it might be problematic as simultaneous
I/O may hang the system, see the commit 40ecab551232 ("pinctrl:
baytrail: Really serialize all register accesses") for the details.
Taking all this into consideratio
In the snippets like the following
if (...)
return / goto / break / continue ...;
else
...
the 'else' is redundant. Get rid of it.
Signed-off-by: Andy Shevchenko
---
drivers/gpu/drm/i915/display/intel_dsi_vbt.c | 58 ++--
1 file c
On Wed, Oct 18, 2023 at 03:52:36PM +0300, Andy Shevchenko wrote:
> On Wed, Oct 18, 2023 at 11:09:35AM +0200, Hans de Goede wrote:
> > On 10/18/23 07:10, Andy Shevchenko wrote:
...
> > Yes I should be able to find a device or 2 which poke GPIOs from the
> > VBT MIPI sequences. Unfortunately I don'
It's a dirty hack in the driver that pokes GPIO registers behind
the driver's back. Moreoever it might be problematic as simultaneous
I/O may hang the system, see the commit 0bd50d719b00 ("pinctrl:
cherryview: prevent concurrent access to GPIO controllers") for
the details. Taking all this into con
Names of the MIPI sequence steps are sequential and defined, no
need to check for the gaps. However in seq_name the MIPI_SEQ_END
is missing. Add it there, and drop unneeded NULL check in
sequence_name().
Signed-off-by: Andy Shevchenko
---
drivers/gpu/drm/i915/display/intel_dsi_vbt.c | 3 ++-
1 f
Drop unused vlv_iosf_sb_read() and vlv_iosf_sb_write().
Signed-off-by: Andy Shevchenko
---
drivers/gpu/drm/i915/vlv_sideband.c | 17 -
drivers/gpu/drm/i915/vlv_sideband.h | 3 ---
2 files changed, 20 deletions(-)
diff --git a/drivers/gpu/drm/i915/vlv_sideband.c
b/drivers/gpu/d
Extract a common soc_gpio_exec() helper that may be used by a few SoCs.
Signed-off-by: Andy Shevchenko
---
drivers/gpu/drm/i915/display/intel_dsi_vbt.c | 49 +++-
1 file changed, 27 insertions(+), 22 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dsi_vbt.c
b/drive
Move existing condition to while(), so it will be clear on what
circumstances the loop is successfully finishing.
Signed-off-by: Andy Shevchenko
---
drivers/gpu/drm/i915/display/intel_dsi_vbt.c | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/i
Hi Chris,
Am Freitag, 20. Oktober 2023, 17:03:08 CEST schrieb Chris Morgan:
> On Thu, Oct 19, 2023 at 07:45:17PM +0200, Heiko Stübner wrote:
> > Hey Chris,
> >
> > Am Donnerstag, 19. Oktober 2023, 16:43:56 CEST schrieb Chris Morgan:
> > > On Thu, Oct 19, 2023 at 11:21:47AM +0200, Krzysztof Kozlow
On Tue, Oct 24, 2023 at 07:53:38AM +, Flavio Suligoi wrote:
> > On Mon, Oct 23, 2023 at 09:28:03AM +, Flavio Suligoi wrote:
> > > > On Fri, Oct 20, 2023 at 03:54:33PM +0200, Flavio Suligoi wrote:
> > > > > The two properties:
> > > > >
> > > > > - max-brightness
> > > > > - default brightne
Hi,
On Mon, Oct 23, 2023 at 10:25:50AM -0700, Doug Anderson wrote:
> On Mon, Oct 23, 2023 at 9:31 AM Yuran Pereira
> wrote:
> >
> > Since "Clean up checks for already prepared/enabled in panels" has
> > already been done and merged [1], I think there is no longer a need
> > for this item to be i
I've just tested this series, and it is working perfectly. For the two
patches of the series:
Acked-by: Jose Maria Casanova Crespo
Thanks Maíra for taking care of upstreaming this feature.
Chema
El 5/9/23 a las 23:06, Maíra Canal escribió:
This patchset exposes GPU usages stats both globall
On Thu, Aug 10, 2023 at 04:44:45PM +0200, Alexander Stein wrote:
> Hi everyone,
>
> while working on i.MX6Q based board
> (arch/arm/boot/dts/nxp/imx/imx6q-mba6a.dts)
> I noticed several warnings on dtbs_check. The first 5 patches should be pretty
> much straight forward.
> I'm not 100% sure on th
On Tue, Oct 24, 2023 at 04:12:34PM +0300, Pekka Paalanen wrote:
> On Tue, 24 Oct 2023 16:03:27 +0300
> Ville Syrjälä wrote:
>
> > On Tue, Oct 24, 2023 at 09:03:22AM +, Simon Ser wrote:
> > > On Tuesday, October 24th, 2023 at 09:36, Pekka Paalanen
> > > wrote:
> > >
> > > > Are DP MST por
On Tue, 24 Oct 2023 16:03:27 +0300
Ville Syrjälä wrote:
> On Tue, Oct 24, 2023 at 09:03:22AM +, Simon Ser wrote:
> > On Tuesday, October 24th, 2023 at 09:36, Pekka Paalanen
> > wrote:
> >
> > > Are DP MST port numbers guaranteed to be tied to the physical hardware
> > > configuration (e.
On Tue, Oct 24, 2023 at 01:07:10PM +0200, Michał Winiarski wrote:
Widely used variable names can be used by macro users, potentially
leading to name collisions.
Suffix locals used inside the macros with an underscore, to reduce the
collision potential.
Suggested-by: Lucas De Marchi
Signed-off-b
On Tue, Oct 24, 2023 at 09:03:22AM +, Simon Ser wrote:
> On Tuesday, October 24th, 2023 at 09:36, Pekka Paalanen
> wrote:
>
> > Are DP MST port numbers guaranteed to be tied to the physical hardware
> > configuration (e.g. how cables are connected) and therefore stable
> > across reboots? Wh
Different from OVL, OVL adaptor is a pseudo device so we didn't
define it in the device tree, consequently, pm_runtime_resume_and_get()
called by .atomic_enable() powers on no device. For this reason, we
implement a function to power on the RDMAs in OVL adaptor, and the
system will make sure the IO
Padding is a new display module on MT8188, it provides ability
to add pixels to width and height of a layer with specified colors.
Due to hardware design, Mixer in VDOSYS1 requires width of a layer
to be 2-pixel-align, or 4-pixel-align when ETHDR is enabled,
we need Padding to deal with odd width.
- Reset ID must starts from 0 and be consecutive, but
the reset bits in our hardware design is not continuous,
some bits are left unused, we need a map to solve the problem
- Use old style 1-to-1 mapping if .rst_tb is not defined
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Hsiao C
- The mmsys_dev_num in MT8188 VDOSYS0 was set to 1 since
VDOSYS1 was not available before. Increase it to support
VDOSYS1 in display driver.
- Add compatible name for MT8188 VDOSYS1
(shares the same driver data with MT8195 VDOSYS1)
Reviewed-by: CK Hu
Reviewed-by: AngeloGioacchino Del Regno
Rename OVL_ADAPTOR_TYPE_RDMA to OVL_ADAPTOR_TYPE_MDP_RDMA
to align the naming rule of mtk_ovl_adaptor_comp_id.
Reviewed-by: CK Hu
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Hsiao Chien Sung
---
.../gpu/drm/mediatek/mtk_disp_ovl_adaptor.c | 22 +--
1 file changed,
DPI input is in 1T2P mode on both MT8195 and MT8188.
Remove the redundant driver data to align the settings, or
the screen will glitch.
Fixes: 2847cd7e6403 ("drm/mediatek: Add mt8188 dpi compatibles and platform
data")
Reviewed-by: CK Hu
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by:
- Adjust indentation to align with other files
- Sort device table in alphabetical order
- Add sentinel to device table
Reviewed-by: CK Hu
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Hsiao Chien Sung
---
drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c | 15 ---
1 file c
Add MT8188 reset bit map for VDOSYS0 and VDOSYS1.
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Hsiao Chien Sung
---
drivers/soc/mediatek/mt8188-mmsys.h | 84 +
drivers/soc/mediatek/mtk-mmsys.c| 7 ++-
2 files changed, 90 insertions(+), 1 deletion(-)
By registering component related functions to the pointers,
we can easily manage them within a for-loop and simplify the
logic of component start/stop process.
Reviewed-by: CK Hu
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Hsiao Chien Sung
---
.../gpu/drm/mediatek/mtk_disp_ovl_adap
This series is based on mediatek-drm-next branch of
kernel/git/chunkuang.hu/linux.git.
Changes in v11:
- Change "mtk-padding" to "mtk-disp-padding" for consistency
- Remove patch "drm/mediatek: Remove ineffectual power management codes
for backward compatibility
Changes in v10:
- Remove "Review
- Add Padding components
- Add Mutex module definitions for Padding
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Hsiao Chien Sung
---
drivers/soc/mediatek/mtk-mutex.c | 16
include/linux/soc/mediatek/mtk-mmsys.h | 8
2 files changed, 24 insertions(+)
Do not reset Merge while using CMDQ because reset API doesn't
wait for frame done event as CMDQ does and could lead to
underrun when the layer is switching off.
Fixes: aaf94f7c3ae6 ("drm/mediatek: Add display merge async reset control")
Reviewed-by: CK Hu
Reviewed-by: AngeloGioacchino Del Regno
Add compatible name for MediaTek MT8188 MERGE.
Reviewed-by: AngeloGioacchino Del Regno
Acked-by: Krzysztof Kozlowski
Reviewed-by: CK Hu
Signed-off-by: Hsiao Chien Sung
---
.../devicetree/bindings/display/mediatek/mediatek,merge.yaml | 3 +++
1 file changed, 3 insertions(+)
diff --git
a/D
Add MT8188 Padding to OVL adaptor to probe the driver.
Reviewed-by: CK Hu
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Hsiao Chien Sung
---
.../gpu/drm/mediatek/mtk_disp_ovl_adaptor.c | 26 +++
1 file changed, 26 insertions(+)
diff --git a/drivers/gpu/drm/mediatek
By registering component related functions to the pointers,
we can easily manage them within a for-loop and simplify the
logic of clock control significantly.
Reviewed-by: CK Hu
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Hsiao Chien Sung
---
.../gpu/drm/mediatek/mtk_disp_ovl_adapt
Padding is a new hardware module on MediaTek MT8188,
add dt-bindings for it.
Reviewed-by: Krzysztof Kozlowski
Reviewed-by: CK Hu
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Hsiao Chien Sung
---
.../display/mediatek/mediatek,padding.yaml| 81 +++
1 file changed,
Add component ID to component match structure so we can
configure them with a for-loop.
The main reason we do such code refactoring is that
there is a new hardware component called "Padding" since
MT8188, while MT8195 doesn't have this module, we can't
use the original logic to manage the componen
- Add register definitions for MT8188
- Add VDOSYS1 routing table
- Update MUTEX definitions accordingly
- Set VSYNC length from 0x40 (default) to 1 since ETHDR is bypassed
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Hsiao Chien Sung
---
drivers/soc/mediatek/mt8188-mmsys.h | 126 +++
Add compatible name for MediaTek MT8188 ETHDR.
Reviewed-by: AngeloGioacchino Del Regno
Acked-by: Krzysztof Kozlowski
Reviewed-by: CK Hu
Signed-off-by: Hsiao Chien Sung
---
.../bindings/display/mediatek/mediatek,ethdr.yaml | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
Sort OVL adaptor components' names in alphabetical order.
Reviewed-by: CK Hu
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Hsiao Chien Sung
---
drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/g
Add MT8188 VDOSYS0 and VDOSYS1 reset control bits.
Reviewed-by: AngeloGioacchino Del Regno
Acked-by: Krzysztof Kozlowski
Signed-off-by: Hsiao Chien Sung
---
include/dt-bindings/reset/mt8188-resets.h | 75 +++
1 file changed, 75 insertions(+)
diff --git a/include/dt-bindin
Return the result of clk_prepare_enable() instead of
always returns 0.
Fixes: f8946e2b6bb2 ("drm/mediatek: Add display MDP RDMA support for MT8195")
Reviewed-by: CK Hu
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Hsiao Chien Sung
---
drivers/gpu/drm/mediatek/mtk_mdp_rdma.c | 3 +--
Add compatible name for MediaTek MT8188 VDOSYS1.
Reviewed-by: AngeloGioacchino Del Regno
Acked-by: Krzysztof Kozlowski
Signed-off-by: Hsiao Chien Sung
---
.../devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicet
1 - 100 of 146 matches
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