Add header files for register definition and structure.
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Alexandre Mergnat
---
sound/soc/mediatek/mt8365/mt8365-afe-common.h | 449
sound/soc/mediatek/mt8365/mt8365-reg.h| 991 ++
2 files
Add audio clock wrapper and audio tuner control.
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Alexandre Mergnat
---
sound/soc/mediatek/mt8365/mt8365-afe-clk.c | 421 +
sound/soc/mediatek/mt8365/mt8365-afe-clk.h | 32 +++
2 files changed, 453
Add I2S Device Audio Interface support for MT8365 SoC.
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Alexandre Mergnat
---
sound/soc/mediatek/mt8365/mt8365-dai-i2s.c | 850 +
1 file changed, 850 insertions(+)
diff --git
Add the audio codec sub-device. This sub-device is used to set the
optional voltage values according to the hardware.
The properties are:
- Setup of microphone bias voltage.
- Setup of the speaker pin pull-down.
Also, add the audio power supply property which is dedicated for
the audio codec
Add ADDA Device Audio Interface support for MT8365 SoC.
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Alexandre Mergnat
---
sound/soc/mediatek/mt8365/mt8365-dai-adda.c | 311
1 file changed, 311 insertions(+)
diff --git
Add MT8365 audio front-end bindings
Reviewed-by: Krzysztof Kozlowski
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Alexandre Mergnat
---
.../bindings/sound/mediatek,mt8365-afe.yaml| 130 +
1 file changed, 130 insertions(+)
diff --git
Add soundcard bindings for the MT8365 SoC with the MT6357 audio codec.
Reviewed-by: AngeloGioacchino Del Regno
Reviewed-by: Krzysztof Kozlowski
Signed-off-by: Alexandre Mergnat
---
.../bindings/sound/mediatek,mt8365-mt6357.yaml | 107 +
1 file changed, 107
This serie aim to add the following audio support for the Genio 350-evk:
- Playback
- 2ch Headset Jack (Earphone)
- 1ch Line-out Jack (Speaker)
- 8ch HDMI Tx
- Capture
- 1ch DMIC (On-board Digital Microphone)
- 1ch AMIC (On-board Analogic Microphone)
- 1ch Headset Jack (External
PREEMPT_RT has a different locking implementation for ww_mutex. The
base mutex of struct ww_mutex is declared as struct WW_MUTEX_BASE. The
latter is defined as `mutex' for non-PREEMPT_RT builds and `rt_mutex'
for PREEMPT_RT builds.
Using mutex_lock() directly on the base mutex in
On Wed, Jun 19, 2024 at 10:24:25AM +0200, Thomas Hellström wrote:
> On Wed, 2024-06-19 at 03:37 +, Matthew Brost wrote:
> > On Tue, Jun 18, 2024 at 09:18:12AM +0200, Thomas Hellström wrote:
> >
> > Ugh, replying to correct version again...
> >
> > > To address the problem with hitches moving
On Mon, Jun 10, 2024 at 04:55:47PM +0800, Lu Baolu wrote:
> An iommu domain is allocated in portal_set_cpu() and is attached to
> pcfg->dev in the same function.
>
> Use iommu_paging_domain_alloc() to make it explicit.
>
> Signed-off-by: Lu Baolu
> ---
> drivers/soc/fsl/qbman/qman_portal.c | 5
On Mon, Jun 10, 2024 at 04:55:46PM +0800, Lu Baolu wrote:
> An iommu domain is allocated in rproc_enable_iommu() and is attached to
> rproc->dev.parent in the same function.
>
> Use iommu_paging_domain_alloc() to make it explicit.
>
> Signed-off-by: Lu Baolu
> ---
>
On Mon, Jun 10, 2024 at 04:55:45PM +0800, Lu Baolu wrote:
> An iommu domain is allocated in ath11k_ahb_fw_resources_init() and is
> attached to ab_ahb->fw.dev in the same function.
>
> Use iommu_paging_domain_alloc() to make it explicit.
>
> Signed-off-by: Lu Baolu
> Acked-by: Jeff Johnson
>
On Mon, Jun 10, 2024 at 04:55:44PM +0800, Lu Baolu wrote:
> An iommu domain is allocated in ath10k_fw_init() and is attached to
> ar_snoc->fw.dev in the same function. Use iommu_paging_domain_alloc() to
> make it explicit.
>
> Signed-off-by: Lu Baolu
> Acked-by: Jeff Johnson
> ---
>
Hi Barry,
On Mon, 10 Jun 2024 at 22:14, Carlos Llamas wrote:
>
> On Thu, Jun 06, 2024 at 02:02:13PM +1200, Barry Song wrote:
> > From: Barry Song
> >
> > dma_heap_allocation_data defines the UAPI as follows:
> >
> > struct dma_heap_allocation_data {
> > __u64 len;
> > __u32 fd;
On Mon, Jun 10, 2024 at 04:55:34PM +0800, Lu Baolu wrote:
> Lu Baolu (20):
> iommu: Add iommu_paging_domain_alloc() interface
> iommufd: Use iommu_paging_domain_alloc()
> vfio/type1: Use iommu_paging_domain_alloc()
> drm/msm: Use iommu_paging_domain_alloc()
> wifi: ath10k: Use
From: Hsiao Chien Sung
Set DRM mode configs limitation according to the hardware capabilities
and pass the IGT checks as below:
- The test "graphics.IgtKms.kms_plane" requires a frame buffer with
width of 4512 pixels (> 4096).
- The test "graphics.IgtKms.kms_cursor_crc" checks if the cursor
This series fixes the errors of MediaTek display driver found by IGT.
Signed-off-by: Hsiao Chien Sung
---
Changes in v2:
- Seperate the changes that belong to another repo (driver/soc/mediatek)
- Move the fix patches to the front of the series
- Link to v1:
From: Hsiao Chien Sung
Support more 10bit formats in OVL.
Reviewed-by: CK Hu
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Hsiao Chien Sung
---
drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 32 +---
1 file changed, 29 insertions(+), 3 deletions(-)
diff
From: Hsiao Chien Sung
Set the plane alpha according to DRM plane property.
Reviewed-by: CK Hu
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Hsiao Chien Sung
---
drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git
From: Hsiao Chien Sung
CONST_BLD must be enabled for XRGB formats although the alpha channel
can be ignored, or OVL will still read the value from memory.
This error only affects CRC generation.
Fixes: 119f5173628a ("drm/mediatek: Add DRM Driver for Mediatek SoC MT8173.")
Reviewed-by:
From: Hsiao Chien Sung
Set the plane alpha according to DRM plane property.
Reviewed-by: CK Hu
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Hsiao Chien Sung
---
drivers/gpu/drm/mediatek/mtk_ethdr.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git
From: Hsiao Chien Sung
Support RGBA and RGBX formats in OVL on MT8195.
Reviewed-by: CK Hu
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Hsiao Chien Sung
---
drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 2 ++
1 file changed, 2 insertions(+)
diff --git
From: Hsiao Chien Sung
CONST_BLD must be enabled for XRGB formats although the alpha channel
can be ignored, or OVL will still read the value from memory.
This error only affects CRC generation.
Fixes: 119f5173628a ("drm/mediatek: Add DRM Driver for Mediatek SoC MT8173.")
Reviewed-by: CK Hu
From: Hsiao Chien Sung
Although the alpha channel in XRGB formats can be ignored, ALPHA_CON
must be configured accordingly when using XRGB formats or it will still
affects CRC generation.
Fixes: d886c0009bd0 ("drm/mediatek: Add ETHDR support for MT8195")
Reviewed-by: CK Hu
Reviewed-by:
From: Hsiao Chien Sung
When 9-bit alpha is enabled, its value will be converted from 0-255 to
0-256 (255 = not defined). This is designed for special HDR related
calculation, which should be disabled by default, otherwise, alpha
blending will not work correctly.
Fixes: 119f5173628a
From: Hsiao Chien Sung
Fix an issue that plane coordinate was not saved when
calling async update.
Fixes: 920fffcc8912 ("drm/mediatek: update cursors by using async atomic
update")
Reviewed-by: CK Hu
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Hsiao Chien Sung
---
From: Hsiao Chien Sung
Define new color formats to hide the bit operation in the MACROs to make
the switch statement more concise.
Change the MACROs to align the naming rule in DRM.
Reviewed-by: CK Hu
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Hsiao Chien Sung
---
From: Hsiao Chien Sung
Always add DRM_MODE_ROTATE_0 to rotation property to meet
IGT's (Intel GPU Tools) requirement.
Reviewed-by: CK Hu
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Hsiao Chien Sung
---
drivers/gpu/drm/mediatek/mtk_ddp_comp.h | 6 +-
From: Hsiao Chien Sung
Add OVL compatible name for MT8195.
Without this commit, DRM won't work after modifying the device tree.
Reviewed-by: CK Hu
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Hsiao Chien Sung
---
drivers/gpu/drm/mediatek/mtk_drm_drv.c | 2 ++
1 file changed, 2
From: Hsiao Chien Sung
We found that IGT (Intel GPU Tool) will try to commit layers with
zero width or height and lead to undefined behaviors in hardware.
Disable the layers in such a situation.
Fixes: 453c3364632a ("drm/mediatek: Add ovl_adaptor support for MT8195")
Fixes: d886c0009bd0
On Mon, Jun 10, 2024 at 04:55:43PM +0800, Lu Baolu wrote:
> An iommu domain is allocated in venus_firmware_init() and is attached to
> core->fw.dev in the same function. Use iommu_paging_domain_alloc() to
> make it explicit.
>
> Signed-off-by: Lu Baolu
> ---
>
On Mon, Jun 10, 2024 at 04:55:42PM +0800, Lu Baolu wrote:
> An iommu domain is allocated in tegra_vde_iommu_init() and is attached to
> vde->dev. Use iommu_paging_domain_alloc() to make it explicit.
>
> Signed-off-by: Lu Baolu
> ---
> drivers/media/platform/nvidia/tegra-vde/iommu.c | 7 ---
On Mon, Jun 10, 2024 at 04:55:41PM +0800, Lu Baolu wrote:
> An iommu domain is allocated in host1x_iommu_attach() and is attached to
> host->dev. Use iommu_paging_domain_alloc() to make it explicit.
>
> Signed-off-by: Lu Baolu
> ---
> drivers/gpu/host1x/dev.c | 7 ---
> 1 file changed, 4
Hi
Am 07.06.24 um 03:14 schrieb wu hoi pok:
this patch is to remove the load callback from the kms_driver,
following closly to amdgpu, radeon_driver_load_kms and devm_drm_dev_alloc
are used, most of the changes here are rdev->ddev to rdev_to_drm,
which maps to adev_to_drm in amdgpu. however
On Mon, Jun 10, 2024 at 04:55:38PM +0800, Lu Baolu wrote:
> Replace iommu_domain_alloc() with iommu_paging_domain_alloc().
>
> Signed-off-by: Lu Baolu
> ---
> drivers/vhost/vdpa.c | 14 ++
> 1 file changed, 6 insertions(+), 8 deletions(-)
Reviewed-by: Jason Gunthorpe
Jason
On Mon, Jun 10, 2024 at 04:55:37PM +0800, Lu Baolu wrote:
> Replace iommu_domain_alloc() with iommu_paging_domain_alloc().
>
> Signed-off-by: Lu Baolu
> ---
> drivers/vfio/vfio_iommu_type1.c | 7 ---
> 1 file changed, 4 insertions(+), 3 deletions(-)
Reviewed-by: Jason Gunthorpe
Jason
On Mon, Jun 10, 2024 at 04:55:36PM +0800, Lu Baolu wrote:
> If the iommu driver doesn't implement its domain_alloc_user callback,
> iommufd_hwpt_paging_alloc() rolls back to allocate an iommu paging domain.
> Replace iommu_domain_alloc() with iommu_user_domain_alloc() to pass the
> device pointer
On Mon, Jun 10, 2024 at 04:55:35PM +0800, Lu Baolu wrote:
> Commit <17de3f5fdd35> ("iommu: Retire bus ops") removes iommu ops from
> bus. The iommu subsystem no longer relies on bus for operations. So the
> bus parameter in iommu_domain_alloc() is no longer relevant.
>
> Add a new interface named
On Wed, Jun 19, 2024 at 9:50 AM Alex Deucher wrote:
>
> On Tue, Jun 18, 2024 at 7:53 PM Doug Anderson wrote:
> >
> > Hi,
> >
> > On Tue, Jun 18, 2024 at 3:00 PM Alex Deucher wrote:
> > >
> > > On Tue, Jun 18, 2024 at 5:40 PM Doug Anderson
> > > wrote:
> > > >
> > > > Hi,
> > > >
> > > >
> > >
Hi
Am 13.06.24 um 07:59 schrieb Marek Olšák:
Hi Thomas,
Commit 9eac534db0013aff9b9124985dab114600df9081 as per the title
breaks (crashes?) lightdm (login screen) such that all I get is the
terminal. It's also reproducible with tag v6.9 where the commit is
present.
I was able to reproduce the
On Tue, Jun 18, 2024 at 7:53 PM Doug Anderson wrote:
>
> Hi,
>
> On Tue, Jun 18, 2024 at 3:00 PM Alex Deucher wrote:
> >
> > On Tue, Jun 18, 2024 at 5:40 PM Doug Anderson wrote:
> > >
> > > Hi,
> > >
> > >
> > > On Mon, Jun 17, 2024 at 8:01 AM Alex Deucher
> > > wrote:
> > > >
> > > > On Wed,
>> …
>>> +++ b/drivers/iio/industrialio-buffer.c
>> …
>>> +static void iio_buffer_dmabuf_release(struct kref *ref)
>>> +{
>> …
>>> + dma_resv_lock(dmabuf->resv, NULL);
>>> + dma_buf_unmap_attachment(attach, priv->sgt, priv->dir);
>>> + dma_resv_unlock(dmabuf->resv);
>> …
>>
>> Under which
вт, 18 июн. 2024 г. в 21:39, Dmitry Baryshkov :
>
> > + ret = mipi_dsi_compression_mode(dsi, true);
> > + if (ret < 0) {
> > + dev_err(dev, "Failed to set compression mode: %d\n", ret);
> > + return ret;
> > + }
>
> Interesting, compression mode is being set
Hi Dzmitry,
kernel test robot noticed the following build warnings:
[auto build test WARNING on 6906a84c482f098d31486df8dc98cead21cce2d0]
url:
https://github.com/intel-lab-lkp/linux/commits/Dzmitry-Sankouski/power-supply-add-undervoltage-health-status-property/20240618-222456
base:
6.9-stable review patch. If anyone has any objections, please let me know.
--
From: Wachowski, Karol
commit 39bc27bd688066a63e56f7f64ad34fae03fbe3b8 upstream.
Lack of check for copy-on-write (COW) mapping in drm_gem_shmem_mmap
allows users to call mmap with PROT_WRITE and
6.6-stable review patch. If anyone has any objections, please let me know.
--
From: Wachowski, Karol
commit 39bc27bd688066a63e56f7f64ad34fae03fbe3b8 upstream.
Lack of check for copy-on-write (COW) mapping in drm_gem_shmem_mmap
allows users to call mmap with PROT_WRITE and
On Wed, 2024-06-19 at 14:21 +0200, Paul Cercueil wrote:
> Le mercredi 19 juin 2024 à 13:56 +0200, Markus Elfring a écrit :
> > …
> > > https://lore.kernel.org/linux-iio/219abc43b4fdd4a13b307ed2efaa0e6869e68e3f.ca...@gmail.com/T/#eefd360069c4261aec9621fafde30924706571c94
> > >
> > > (and responses
On Tue, Jun 18, 2024 at 12:03:02PM +0200, Paul Cercueil wrote:
> Document the dmaengine_prep_peripheral_dma_vec() API function, the
> device_prep_peripheral_dma_vec() backend function, and the dma_vec
> struct.
>
LGTM, thanks!
Reviewed-by: Bagas Sanjaya
--
An old man doll... just what I
On Tue, Jun 18, 2024 at 12:03:01PM +0200, Paul Cercueil wrote:
> +As part of this interface, three new IOCTLs have been added. These three
> +IOCTLs have to be performed on the IIO buffer's file descriptor,
> +obtained using the IIO_BUFFER_GET_FD_IOCTL() ioctl.
"... which can be obtained using
Le mercredi 19 juin 2024 à 13:56 +0200, Markus Elfring a écrit :
> …
> > https://lore.kernel.org/linux-iio/219abc43b4fdd4a13b307ed2efaa0e6869e68e3f.ca...@gmail.com/T/#eefd360069c4261aec9621fafde30924706571c94
> >
> > (and responses below)
> >
> > It's more nuanced than I remembered.
> …
>
>
>
On 6/19/24 11:01, Przemek Kitszel wrote:
> On 6/19/24 09:16, Omer Shpigelman wrote:
>> On 6/18/24 17:19, Andrew Lunn wrote:
>
> [...]
>
>> +module_param(poll_enable, bool, 0444);
>> +MODULE_PARM_DESC(poll_enable,
>> + "Enable Rx polling rather than IRQ + NAPI (0 = no, 1
Le mercredi 19 juin 2024 à 13:43 +0200, Markus Elfring a écrit :
> …
> > +++ b/drivers/iio/industrialio-buffer.c
> …
> > +static void iio_buffer_dmabuf_release(struct kref *ref)
> > +{
> …
> > + dma_resv_lock(dmabuf->resv, NULL);
> > + dma_buf_unmap_attachment(attach, priv->sgt, priv->dir);
>
On 14/06/2024 19:00, Thadeu Lima de Souza Cascardo wrote:
On Fri, Jun 14, 2024 at 11:52:03AM +0100, Tvrtko Ursulin wrote:
On 24/03/2024 10:15, Thadeu Lima de Souza Cascardo wrote:
commit e531fdb5cd5e ("dma-buf/sw_sync: Avoid recursive lock during fence
signal") fixed a recursive locking
On 6/19/24 00:19, Stephen Hemminger wrote:
> On Tue, 18 Jun 2024 19:37:36 +
> Omer Shpigelman wrote:
>
>>>
>>> Is there any reason in particular to call netif_receive_skb instead of
>>> napi_gro_receive ?
>>>
>>
>> As you can see, we also support polling mode which is a non-NAPI flow.
>>
On 19/06/2024 14:00, Jacopo Mondi wrote:
> Hi Krzysztof
>
> On Wed, Jun 19, 2024 at 01:07:24PM GMT, Krzysztof Kozlowski wrote:
>> On 19/06/2024 12:22, Jacopo Mondi wrote:
>>> Add support for R-Car R8A779H0 V4M which has the same characteristics
>>> of the already supported R-Car V4H R8A779G0.
>>>
On 6/15/24 03:10, Stephen Hemminger wrote:
> [You don't often get email from step...@networkplumber.org. Learn why this is
> important at https://aka.ms/LearnAboutSenderIdentification ]
>
> On Thu, 13 Jun 2024 11:22:02 +0300
> Omer Shpigelman wrote:
>
>> +static int hbl_en_ports_reopen(struct
Hi Krzysztof
On Wed, Jun 19, 2024 at 01:07:24PM GMT, Krzysztof Kozlowski wrote:
> On 19/06/2024 12:22, Jacopo Mondi wrote:
> > Add support for R-Car R8A779H0 V4M which has the same characteristics
> > of the already supported R-Car V4H R8A779G0.
> >
> > Signed-off-by: Jacopo Mondi
> >
>
> Please
On Wed, Jun 19, 2024 at 01:10:09PM +0300, Jani Nikula wrote:
> On Fri, 14 Jun 2024, Imre Deak wrote:
> > Add helpers to convert between x16 fixed point and integer/fraction
> > values. Also add the format/argument macros required to printk x16
> > fixed point variables.
> >
> > These are needed
…
> https://lore.kernel.org/linux-iio/219abc43b4fdd4a13b307ed2efaa0e6869e68e3f.ca...@gmail.com/T/#eefd360069c4261aec9621fafde30924706571c94
>
> (and responses below)
>
> It's more nuanced than I remembered.
…
>> * Will the desire grow for further collateral evolution according to
>> affected
On Fri, Jun 14, 2024 at 04:37:41PM -0300, André Almeida wrote:
> Hi Dmitry,
>
> Em 14/06/2024 14:32, Dmitry Baryshkov escreveu:
> > On Fri, Jun 14, 2024 at 12:35:27PM GMT, André Almeida wrote:
> >> AMD hardware can do async flips with overlay planes, but currently there's
> >> no
> >> easy way
On 18/06/24 01:04, Dmitry Baryshkov wrote:
> On Mon, 17 Jun 2024 at 17:16, Aradhya Bhatia wrote:
>>
>> Hi Dmitry,
>>
>> Thanks for reviewing the patches!
>>
>> On 17/06/24 17:29, Dmitry Baryshkov wrote:
>>> On Mon, Jun 17, 2024 at 04:23:03PM GMT, Aradhya Bhatia wrote:
Update the Phy
…
> +++ b/drivers/iio/industrialio-buffer.c
…
> +static void iio_buffer_dmabuf_release(struct kref *ref)
> +{
…
> + dma_resv_lock(dmabuf->resv, NULL);
> + dma_buf_unmap_attachment(attach, priv->sgt, priv->dir);
> + dma_resv_unlock(dmabuf->resv);
…
Under which circumstances will
On Tue, 11 Jun 2024 10:56:00 +0200
AngeloGioacchino Del Regno
wrote:
> Changes in v3:
> - Added comment stating that MT8188 uses same supplies as MT8183
>as requested by Steven
>
> Changes in v2:
> - Fixed bindings to restrict number of power domains for MT8188's
>GPU to three like
On 6/17/24 15:34, Alexander Lobakin wrote:
> [Some people who received this message don't often get email from
> aleksander.loba...@intel.com. Learn why this is important at
> https://aka.ms/LearnAboutSenderIdentification ]
>
> From: Omer Shpigelman
> Date: Thu, 13 Jun 2024 11:21:53 +0300
>
>>
On Wed, Jun 12, 2024 at 11:47:03PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> intel_surf_alignment() in particular has devolved into
> a complete mess. Redesign the code so that we can handle
> alignment restrictions in a nicer. Also adjust alignment
> for TGL+ to actually match the
On Wed, 19 Jun 2024 at 12:31, Ville Syrjala
wrote:
> Export drm_plane_has_format() so that drivers can use it.
Acked-by: Daniel Stone
From: Ville Syrjälä
Export drm_plane_has_format() so that drivers can use it.
v2: add kerneldoc
Reviewed-by: Jani Nikula
Reviewed-by: Daniel Vetter
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/drm_crtc_internal.h | 2 --
drivers/gpu/drm/drm_plane.c | 10 ++
Le mercredi 19 juin 2024 à 13:13 +0200, Markus Elfring a écrit :
> > > Would you dare to transform the remaining goto chain into further
> > > applications
> > > of scope-based resource management?
> >
> > We discussed this after v6 or v7, DRM/DMABUF maintainers were not
> > keen
> > on doing
> -Original Message-
> From: Pekka Paalanen
> Sent: Thursday, March 28, 2024 3:35 PM
> To: Garg, Nemesa
> Cc: Simon Ser ; intel-...@lists.freedesktop.org; dri-
> de...@lists.freedesktop.org; G M, Adarsh
> Subject: Re: [RFC 0/5] Introduce drm sharpening property
>
> On Wed, 27 Mar
>> Would you dare to transform the remaining goto chain into further
>> applications
>> of scope-based resource management?
>
> We discussed this after v6 or v7, DRM/DMABUF maintainers were not keen
> on doing that *just yet*.
* Would you like to add any links for corresponding development
On 19/06/2024 12:22, Jacopo Mondi wrote:
> Add support for R-Car R8A779H0 V4M which has the same characteristics
> of the already supported R-Car V4H R8A779G0.
>
> Signed-off-by: Jacopo Mondi
>
Please run scripts/checkpatch.pl and fix reported warnings. Then please
run `scripts/checkpatch.pl
Il 18/06/24 12:17, AngeloGioacchino Del Regno ha scritto:
Changes in v8:
- Rebased on next-20240617
- Changed to allow probing a VDO with no available display outputs
Hello CK,
At the time of writing, this series was well reviewed and tested by multiple
people
on multiple SoCs and
Hi,
On Tue, Jun 18, 2024 at 07:34:22PM +, Cavitt, Jonathan wrote:
> > Commit 05da7d9f717b ("drm/i915/gem: Downgrade stolen lmem setup
> > warning") produces two sparse warnings. The first one being a bit
> > more sever as it might cause a segmentation fault.
> >
> > The difference between v1
Hi Janusz,
On Mon, Jun 03, 2024 at 09:54:45PM +0200, Janusz Krzysztofik wrote:
> CI has been sporadically reporting the following issue triggered by
> igt@i915_selftest@live@hangcheck on ADL-P and similar machines:
>
> <6> [414.049203] i915: Running
>
On Wed, Jun 19, 2024 at 09:27:54AM +, Omer Shpigelman wrote:
> On 6/18/24 15:58, Leon Romanovsky wrote:
> > On Tue, Jun 18, 2024 at 11:08:34AM +, Omer Shpigelman wrote:
> >> On 6/17/24 22:04, Leon Romanovsky wrote:
> >>> [Some people who received this message don't often get email from
>
Il 23/05/24 14:49, Alexandre Mergnat ha scritto:
- Add aliases for each display components to help display drivers.
- Add the Display Pulse Width Modulation (DISP_PWM) to provide PWM signals
for the LED driver of mobile LCM.
- Add the MIPI Display Serial Interface (DSI) PHY support. (up to
Hi Dave & Sima -
Surprisingly few fixes lately, here's one for joiner+MSO.
drm-intel-fixes-2024-06-19:
drm/i915 fixes for v6.10-rc5:
- Fix conditions for joiner usage, it's not possible with eDP MSO
BR,
Jani.
The following changes since commit 6ba59ff4227927d3a8530fc2973b80e94b54d58f:
Hi!
> > > Let's bring in the actual gpu people.. Dave/Jani/others - does any of
> > > this sound familiar? Pavel says things have gotten much slower in
> > > 6.10: "something was very wrong with the performance, likely to do
> > > with graphics"
> >
> > Actually, maybe it's not graphics at all.
From: Phong Hoang
Add a check to the register access function when attaching a bridge
device.
Signed-off-by: Phong Hoang
Signed-off-by: Jacopo Mondi
---
drivers/gpu/drm/bridge/ti-sn65dsi86.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git
Add support for R-Car R8A779H0 V4M which has the same characteristics
of the already supported R-Car V4H R8A779G0.
Signed-off-by: Jacopo Mondi
---
BSP patch:
https://github.com/renesas-rcar/linux-bsp/commit/61b876a8fa2c5d0f8049ecf29f24e3dd73ba9f8b
---
Add support for R-Car R8A779H0 V4M which has similar characteristics
as the already supported R-Car V4H R8A779G0, but with a single output
channel.
Signed-off-by: Jacopo Mondi
---
BSP patch
https://github.com/renesas-rcar/linux-bsp/commit/f2fc3314dab2052240653c1a31ba3d7c7190038e
---
---
From: Takeshi Kihara
Version 0.51 of the Renesas R-Car Gen4 TRM reports bit 16 of the
CLOCKSET1 register of the DSI transmitter module to be a reserved
field.
Fix this by correcting the CLOCKSET1_LOCK definition to match the TRM
and remove the CLOCKSET1_LOCK_PHY definition, as the register is
This series upports from Renesas BSP at revision rcar-5.2.0.rc18 the initial
display support for the V4M SoC (R8A779H0).
The series includes two small bugfixes and then adds support for the
V4M SoC to the R-Car DU module and R-Car DSI encoder.
Compile-tested only as I don't have a Gray Hawk
On Fri, 14 Jun 2024, Imre Deak wrote:
> Add helpers to convert between x16 fixed point and integer/fraction
> values. Also add the format/argument macros required to printk x16
> fixed point variables.
>
> These are needed by later patches dumping the Display Stream Compression
> configuration in
Hi Markus,
Le mercredi 19 juin 2024 à 12:03 +0200, Markus Elfring a écrit :
> …
> > All errors (new ones prefixed by >>):
> >
> > > > drivers/iio/industrialio-buffer.c:1715:3: error: cannot jump
> > > > from this goto statement to its label
> > 1715 | goto
> From: Carlos Song
> Sent: 2024年6月14日 12:56
>
> Add eDMA mode support for LPI2C.
>
> There are some differences between TX DMA mode and RX DMA mode.
> LPI2C MTDR register is Controller Transmit Data Register.
> When lpi2c send data, it is tx cmd register and tx data fifo.
> When lpi2c receive
…
> All errors (new ones prefixed by >>):
>
> >> drivers/iio/industrialio-buffer.c:1715:3: error: cannot jump from this
> >> goto statement to its label
> 1715 | goto err_dmabuf_unmap_attachment;
…
Would you dare to transform the remaining goto chain into further applications
Il 14/06/24 09:27, Alexandre Mergnat ha scritto:
Add the sound node which is linked to the MT8365 SoC AFE and
the MT6357 audio codec.
Update the file header.
Signed-off-by: Alexandre Mergnat
---
arch/arm64/boot/dts/mediatek/mt8365-evk.dts | 89 +
1 file changed,
Il 14/06/24 09:27, Alexandre Mergnat ha scritto:
Add audio front end support of MT8365 SoC.
Update the file header.
Signed-off-by: Alexandre Mergnat
Reviewed-by: AngeloGioacchino Del Regno
Il 14/06/24 09:27, Alexandre Mergnat ha scritto:
Add header files for register definition and structure.
Signed-off-by: Alexandre Mergnat
---
sound/soc/mediatek/mt8365/mt8365-afe-common.h | 491 +
sound/soc/mediatek/mt8365/mt8365-reg.h| 991 ++
2
Il 14/06/24 09:27, Alexandre Mergnat ha scritto:
- Add specific config to enable:
- MT8365 sound support
- MT6357 audio codec support
- Add the mt8365 directory and all drivers under it.
Signed-off-by: Alexandre Mergnat
---
sound/soc/mediatek/Kconfig | 20
Il 14/06/24 09:27, Alexandre Mergnat ha scritto:
Add soundcard bindings for the MT8365 SoC with the MT6357 audio codec.
Reviewed-by: Krzysztof Kozlowski
Signed-off-by: Alexandre Mergnat
Reviewed-by: AngeloGioacchino Del Regno
Il 14/06/24 09:27, Alexandre Mergnat ha scritto:
Add MT8365 audio front-end bindings
Reviewed-by: Krzysztof Kozlowski
Signed-off-by: Alexandre Mergnat
Reviewed-by: AngeloGioacchino Del Regno
Il 14/06/24 09:27, Alexandre Mergnat ha scritto:
Add ADDA Device Audio Interface support for MT8365 SoC.
Signed-off-by: Alexandre Mergnat
Reviewed-by: AngeloGioacchino Del Regno
Il 14/06/24 09:27, Alexandre Mergnat ha scritto:
Add I2S Device Audio Interface support for MT8365 SoC.
Signed-off-by: Alexandre Mergnat
Reviewed-by: AngeloGioacchino Del Regno
Il 14/06/24 09:27, Alexandre Mergnat ha scritto:
Add audio clock wrapper and audio tuner control.
Signed-off-by: Alexandre Mergnat
Reviewed-by: AngeloGioacchino Del Regno
Il 14/06/24 09:27, Alexandre Mergnat ha scritto:
Add Digital Micro Device Audio Interface support for MT8365 SoC.
Signed-off-by: Alexandre Mergnat
Reviewed-by: AngeloGioacchino Del Regno
On 6/17/24 17:17, Jason Gunthorpe wrote:
> [You don't often get email from j...@ziepe.ca. Learn why this is important at
> https://aka.ms/LearnAboutSenderIdentification ]
>
> On Thu, Jun 13, 2024 at 11:22:04AM +0300, Omer Shpigelman wrote:
>> Add an RDMA driver of Gaudi ASICs family for AI
On 6/18/24 19:01, Przemek Kitszel wrote:
> On 6/18/24 13:08, Omer Shpigelman wrote:
>> On 6/17/24 22:04, Leon Romanovsky wrote:
>>> [Some people who received this message don't often get email from
>>> l...@kernel.org. Learn why this is important at
>>>
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