Am Samstag, 14. September 2024, 20:28:59 CEST schrieb Cristian Ciocaltea:
> On 9/10/24 10:08 PM, Heiko Stübner wrote:
> > Am Freitag, 6. September 2024, 03:17:42 CEST schrieb Cristian Ciocaltea:
> > That hdmi->ref_clk just accidentially falls out of that loop at the end
> > looks somewhat strange,
submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url:
https://github.com/intel-lab-lkp/linux/commits/Javier-Martinez-Canillas/firmware-coreboot-Don-t-register-a-pdev-if-screen_info-data-is-present/20240
Hi all,
Just a friendly ping. Please send feedback whenever possible.
Best regards,
Alex
On Thu, Sep 05, 2024 at 08:43:58AM GMT, Alex Lanzano wrote:
> This patch series add support for the monochrome Sharp Memory LCD
> panels. This series is based off of the work done by Mehdi Djait.
>
> Refere
OVL_CON_CLRFMT_MAN is an configuration for extending color format
settings of DISP_REG_OVL_CON(n).
It will change some of the original color format settings.
Take the settings of (3 << 12) for example.
- If OVL_CON_CLRFMT_MAN = 0 means OVL_CON_CLRFMT_RGBA.
- If OVL_CON_CLRFMT_MAN = 1 means OVL
s!
Unfortunately I had to drop the scrambling setup for now [1], as I
encountered some issues while attempting to get this implemented as
suggested. Will get back to this and submit it separately when done.
Regards,
Cristian
[1]
https://lore.kernel.org/lkml/20240914-b4-rk3588-bridge-upstream-v7-0-2b1348137...@collabora.com/
Rockchip RK3588 SoC integrates the Synopsys DesignWare HDMI 2.1
Quad-Pixel (QP) TX controller IP.
Since this is a new IP block, quite different from those used in the
previous generations of Rockchip SoCs, add a dedicated binding file.
Reviewed-by: Krzysztof Kozlowski
Signed-off-by: Cristian Cio
The RK3588 SoC family integrates the newer Synopsys DesignWare HDMI 2.1
Quad-Pixel (QP) TX controller IP and a HDMI/eDP TX Combo PHY based on a
Samsung IP block.
Add just the basic support for now, i.e. RGB output up to 4K@60Hz,
without audio, CEC or any of the HDMI 2.1 specific features.
Co-deve
The Synopsys DesignWare HDMI 2.1 Quad-Pixel (QP) TX Controller IP
supports the following features, among others:
* Fixed Rate Link (FRL)
* Display Stream Compression (DSC)
* 4K@120Hz and 8K@60Hz video modes
* Variable Refresh Rate (VRR) including Quick Media Switching (QMS), aka
Cinema VRR
* Fas
The Rockchip RK3588 SoC family integrates the Synopsys DesignWare HDMI
2.1 Quad-Pixel (QP) TX controller, which is a new IP block, quite
different from those used in the previous generations of Rockchip SoCs.
The controller supports the following features, among others:
* Fixed Rate Link (FRL)
*
, "Missing ref clock\n");
return -EINVAL;
}
> That hdmi->ref_clk just accidentially falls out of that loop at the end
> looks somewhat strange, so getting and keeping that refclk
> separately would make this look cleaner.
I've added /* keep "ref" last */ comment above, but I agree it's not really
the best approach.
I'm going to submit v7 in the meantime, as this was the last remaining open
topic on my list. I guess we can figure this out afterwards.
Thanks,
Cristian
[1]
https://lore.kernel.org/lkml/20240914-clk_bulk_ena_fix-v1-0-ce3537585...@collabora.com/
On 2024-09-13 19:28, Rob Clark wrote:
> On Fri, Sep 13, 2024 at 10:03 AM Michel Dänzer
> wrote:
>>
>> On 2024-09-13 18:53, Rob Clark wrote:
>>> From: Rob Clark
>>>
>>> Fixes a race condition reported here:
>>> https://github.com/AsahiLinux/linux/issues/309#issuecomment-2238968609
>>>
>>> The who
rg/drm/drm-misc drm-misc-next
patch link:
https://lore.kernel.org/r/20240911180604.1834434-7-lizhi.hou%40amd.com
patch subject: [PATCH V3 06/11] accel/amdxdna: Add GEM buffer object management
config: x86_64-allyesconfig
(https://download.01.org/0day-ci/archive/20240914/202409142134.bxn16uqn-...
On Sat, 14 Sept 2024 at 14:29, Konrad Dybcio wrote:
>
> On 13.09.2024 12:37 PM, Soutrik Mukhopadhyay wrote:
> > In order to support different HW versions, introduce aux_cfg array
> > to move v4 specific aux configuration settings.
> >
> > Signed-off-by: Soutrik Mukhopadhyay
> > ---
> > v2: Fixed
On 13.09.2024 12:37 PM, Soutrik Mukhopadhyay wrote:
> In order to support different HW versions, introduce aux_cfg array
> to move v4 specific aux configuration settings.
>
> Signed-off-by: Soutrik Mukhopadhyay
> ---
> v2: Fixed review comments from Bjorn and Dmitry
> - Made aux_cfg array a
On Fri, Sep 13, 2024 at 10:12:39PM +0100, Hugh Cole-Baker wrote:
> I added printk to show the value of AUD_CONF2, and found that on 6.1.23, the
> value is 0 before the code in this patch sets the insert_pcuv bit. On 6.10.3
> the value is 4, i.e. insert_pcuv is already set.
>
> According to the RK3
On Fri, Sep 13, 2024 at 06:28:34PM -0300, Geraldo Nascimento wrote:
> On Fri, Sep 13, 2024 at 10:12:39PM +0100, Hugh Cole-Baker wrote:
> > I added printk to show the value of AUD_CONF2, and found that on 6.1.23, the
> > value is 0 before the code in this patch sets the insert_pcuv bit. On 6.10.3
>
Hi,
On Fri, Sep 13, 2024 at 06:07:44PM GMT, Dzmitry Sankouski wrote:
> Add POWER_SUPPLY_HEALTH_UNDERVOLTAGE status for power supply
> to report under voltage lockout failures.
>
> Signed-off-by: Dzmitry Sankouski
> ---
This is missing updates to
Documentation/ABI/testing/sysfs-class-power and
d
Hi,
On Tue, Aug 06, 2024 at 04:50:26PM GMT, Tomi Valkeinen wrote:
> A few minor fixes to omapdrm, mostly to remove sparse or other checker
> warnings.
>
> Tomi
>
> Signed-off-by: Tomi Valkeinen
For the series:
Reviewed-by: Sebastian Reichel
Greetings,
-- Sebastian
> ---
> Tomi Valkeinen
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