On Fri, 2025-03-21 at 19:50 -0400, Lyude Paul wrote:
> On Fri, 2025-03-14 at 13:02 +0100, Maxime Ripard wrote:
> > On Wed, Mar 05, 2025 at 05:59:26PM -0500, Lyude Paul wrote:
> > > A simple binding for drm_add_modes_noedid() using the ConnectorGuard type
> > > we just added.
> > >
> > > Signed-off
The instance of the GPU populated in Freescale i.MX95 does require
release from reset by writing into a single GPUMIX block controller
GPURESET register bit 0. Document support for this reset register.
Signed-off-by: Marek Vasut
---
Cc: Boris Brezillon
Cc: Conor Dooley
Cc: David Airlie
Cc: Fab
On Fri, 2025-03-14 at 12:37 +0100, Maxime Ripard wrote:
> On Wed, Mar 05, 2025 at 05:59:21PM -0500, Lyude Paul wrote:
> > The next step is adding a set of basic bindings to create a plane, which
> > has to happen before we can create a CRTC (since we need to be able to at
> > least specify a primar
On Fri, Mar 21, 2025 at 07:52:23PM -0400, Lyude Paul wrote:
> On Fri, 2025-03-21 at 19:50 -0400, Lyude Paul wrote:
> > On Fri, 2025-03-14 at 13:02 +0100, Maxime Ripard wrote:
> > > On Wed, Mar 05, 2025 at 05:59:26PM -0500, Lyude Paul wrote:
> > > > A simple binding for drm_add_modes_noedid() using
On Thu, 20 Mar 2025 11:17:38 +
Karunika Choo wrote:
> Mali-G715 introduces a new GPU_FEATURES register that provides
> information about GPU-wide supported features. The register value will
> be passed on to userspace via gpu_info. It also adds the following
> registers that are specific to t
On 2025/3/22 10:49, Yue Haibing wrote:
> If CONFIG_I2C is not set, build fails:
>
> drivers/media/cec/i2c/tda9950.c: In function ‘tda9950_probe’:
> drivers/media/cec/i2c/tda9950.c:391:14: error: implicit declaration of
> function ‘i2c_check_functionality’ [-Werror=implicit-function-declaration]
>
If CONFIG_I2C is not set, build fails:
drivers/media/cec/i2c/tda9950.c: In function ‘tda9950_probe’:
drivers/media/cec/i2c/tda9950.c:391:14: error: implicit declaration of function
‘i2c_check_functionality’ [-Werror=implicit-function-declaration]
if (!i2c_check_functionality(client->adapt
On Thu, Mar 20, 2025 at 03:26:15PM +, Jonathan Cavitt wrote:
> Add support for userspace to request a list of observed faults
> from a specified VM.
...
> +static int xe_vm_get_property_size(struct xe_vm *vm, u32 property)
> +{
> + int size = -EINVAL;
Mixing size and error codes is usual
On Fri, 2025-03-14 at 12:57 +0100, Maxime Ripard wrote:
> It's kind of what I wanted to express in my earlier statements I guess,
> but I'm not really sure we should force down helpers on drivers. The
> larger approach KMS has taken over the years was to provide hooks and
> default implementations,
On Fri, 2025-03-14 at 13:02 +0100, Maxime Ripard wrote:
> On Wed, Mar 05, 2025 at 05:59:26PM -0500, Lyude Paul wrote:
> > A simple binding for drm_add_modes_noedid() using the ConnectorGuard type
> > we just added.
> >
> > Signed-off-by: Lyude Paul
> > ---
> > rust/bindings/bindings_helper.h |
On Fri, 2025-03-14 at 12:48 +0100, Maxime Ripard wrote:
> On Wed, Mar 05, 2025 at 05:59:23PM -0500, Lyude Paul wrote:
> > +unsafe extern "C" fn encoder_destroy_callback(
> > +encoder: *mut bindings::drm_encoder,
> > +) {
> > +// SAFETY: DRM guarantees that `encoder` points to a valid initia
On Fri, 2025-03-14 at 12:02 +0100, Maxime Ripard wrote:
> On Wed, Mar 05, 2025 at 05:59:20PM -0500, Lyude Paul wrote:
> > We start off by introducing wrappers for the first important type of mode
> > object: a DRM display connector. This introduces Connector > DriverConnector> and ConnectorState. B
On Fri, 2025-03-14 at 11:44 +0100, Maxime Ripard wrote:
> On Wed, Mar 05, 2025 at 05:59:19PM -0500, Lyude Paul wrote:
> > The KMS API has a very consistent idea of a "mode config object", which
> > includes any object with a drm_mode_object struct embedded in it. These
> > objects have their own ob
This is a pointer in the gpu's virtual address space. It must be
aligned according to ctxsw_align and be at least ctxsw_size bytes
(where those values come from the nouveau_abi16_ioctl_get_zcull_info
structure). I'll change the description to say that much.
Yes, this is GEM-backed. I'm actually no
Hi Kieran,
Thank you for the patch.
On Fri, Mar 21, 2025 at 05:22:19PM +, Kieran Bingham wrote:
> From: Kieran Bingham
>
> The RZ/G2L driver utilises the VSPD to read data from input sources.
>
> The rzg2l_du_kms component lists a restricted subset of the capabilities
> of the VSPd which p
On Thu, Mar 20, 2025 at 2:18 PM Danilo Krummrich wrote:
>
> Hi Mel,
Hi, thanks for the review.
> On Wed, Mar 12, 2025 at 05:36:14PM -0400, Mel Henning wrote:
> > Userspace needs this information to set up zcull correctly.
>
> This is a very brief motivation for the commit, please also describe w
On Fri, 2025-03-14 at 11:05 +0100, Maxime Ripard wrote:
> Hi Lyude,
>
> First off, thanks for keeping up with this series.
>
> I'm quite familiar with Rust in userspace, but not so much in the
> kernel, so I might have stupid questions or points, sorry I advance :)
Absolutely not a problem! I'm
The driver code power domain binding to driver instances only works
for single power domain, in case there are multiple power domains,
it is necessary to explicitly attach via dev_pm_domain_attach*().
As DT bindings list support for up to 5 power domains, add support
for attaching them all. This is
On Fri, 21 Mar 2025 21:05:51 +0100, Marek Vasut wrote:
> The instance of the GPU populated in Freescale i.MX95 does require
> release from reset by writing into a single GPUMIX block controller
> GPURESET register bit 0. Document support for this reset register.
>
> Signed-off-by: Marek Vasut
>
Hi Dave, Simona,
Fixes for 6.15.
The following changes since commit eb6cdfb807d038d9b9986b5c87188f28a4071eae:
drm/amdgpu: Restore uncached behaviour on GFX12 (2025-03-13 23:18:02 -0400)
are available in the Git repository at:
https://gitlab.freedesktop.org/agd5f/linux.git
tags/amd-drm-nex
Hello Guenter,
Sorry for being late to the party.
On Fri, Mar 21, 2025 at 6:06 PM Guenter Roeck wrote:
>
> On 3/13/25 04:43, Alessandro Carminati wrote:
> > From: Guenter Roeck
> >
> > Add name of functions triggering warning backtraces to the __bug_table
> > object section to enable support for
The instance of the GPU populated in Freescale i.MX95 does require
release from reset by writing into a single GPUMIX block controller
GPURESET register bit 0. Document support for one optional reset.
Acked-by: Rob Herring (Arm)
Reviewed-by: Frank Li
Signed-off-by: Marek Vasut
---
Cc: Boris Bre
The instance of the GPU populated in i.MX95 is the G310.
Add support for the GPUMIX reset via simple-reset driver,
add reset and multiple power domains support into panthor
GPU driver, add iMX95 GPU support into panthor driver and
describe the iMX95 GPU in imx95.dtsi DT.
Marek Vasut (9):
dt-bind
The instance of the GPU populated in Freescale i.MX95 does require
release from reset by writing into a single GPUMIX block controller
GPURESET register bit 0. Implement support for one optional reset.
Signed-off-by: Marek Vasut
---
Cc: Boris Brezillon
Cc: Conor Dooley
Cc: David Airlie
Cc: Fab
On 3/21/2025 4:47 PM, Dmitry Baryshkov wrote:
> On Fri, 21 Mar 2025 at 12:18, Ekansh Gupta
> wrote:
>>
>>
>> On 3/20/2025 9:27 PM, Ekansh Gupta wrote:
>>> On 3/20/2025 7:45 PM, Dmitry Baryshkov wrote:
On Thu, Mar 20, 2025 at 07:19:31PM +0530, Ekansh Gupta wrote:
> On 1/29/2025 4:10 PM,
The instance of the GPU populated in Freescale i.MX95 does require
release from reset by writing into a single GPUMIX block controller
GPURESET register bit 0. Implement support for this reset register.
Signed-off-by: Marek Vasut
---
Cc: Boris Brezillon
Cc: Conor Dooley
Cc: David Airlie
Cc: Fa
On Fri, Mar 21, 2025 at 04:53:38PM +0800, Andy Yan wrote:
> From: Andy Yan
>
> In some application scenarios, we hope to get the corresponding
> connector when the bridge's detect hook is invoked.
>
> In most cases, we can get the connector by
> drm_atomic_get_connector_for_encoder
> if the enc
The instance of the GPU populated in i.MX95 is the G310,
describe this GPU in the DT. Include description of the
GPUMIX block controller, which can be operated as a simple
reset. Include dummy GPU voltage regulator and OPP tables.
Signed-off-by: Marek Vasut
---
Cc: Boris Brezillon
Cc: Conor Dool
This seems necessary on Freescale i.MX95 Mali G310 to reliably resume
from runtime PM suspend. Without this, if only the L2 is powered down
on RPM entry, the GPU gets stuck and does not indicate the firmware is
booted after RPM resume.
Signed-off-by: Marek Vasut
---
Cc: Boris Brezillon
Cc: Conor
The instance of the GPU populated in Freescale i.MX95 is the
Mali G310, add support for this variant.
Reviewed-by: Frank Li
Signed-off-by: Marek Vasut
---
Cc: Boris Brezillon
Cc: Conor Dooley
Cc: David Airlie
Cc: Fabio Estevam
Cc: Krzysztof Kozlowski
Cc: Liviu Dudau
Cc: Maarten Lankhorst
The instance of the GPU populated in Freescale i.MX95 is the
Mali G310, document support for this variant.
Reviewed-by: Alexander Stein
Reviewed-by: Frank Li
Signed-off-by: Marek Vasut
---
Cc: Boris Brezillon
Cc: Conor Dooley
Cc: David Airlie
Cc: Fabio Estevam
Cc: Krzysztof Kozlowski
Cc: L
On 3/3/25 4:04 PM, Liviu Dudau wrote:
[...]
+ #reset-cells = <1>;
+ clocks = <&scmi_clk IMX95_CLK_GPUAPB>;
+ assigned-clocks = <&scmi_clk IMX95_CLK_GPUAPB>;
+ assigned-clock-parents = <&scmi_clk
IMX95_CLK_S
On 3/3/25 1:35 PM, Boris Brezillon wrote:
Hi,
This looks like it has been part of a R50 release of the DDK, which is recent
enough to consider it up-to-date. The issues you're seeing with fast resume are
probably due to some integration issues or other quirks.
Boris has the most recent experie
Hi Biju,
Quoting Biju Das (2025-03-21 18:40:50)
> Hi Kieran,
>
> Thanks for the patch.
>
> > -Original Message-
> > From: Kieran Bingham
> > Sent: 21 March 2025 17:22
> > Subject: [PATCH] drm: renesas: Extend RZ/G2L supported KMS formats
> >
> > From: Kieran Bingham
> >
> > The RZ/G2
From: Rob Clark
Really the only purpose of this was to limit the address space size to
4GB to avoid 32b rollover problems in 64b pointer math in older sqe fw.
So replace the address_space_size with a quirk limiting the address
space to 4GB. In all other cases, use the SMMU input address size (IA
Hi Kieran,
Thanks for the patch.
> -Original Message-
> From: Kieran Bingham
> Sent: 21 March 2025 17:22
> Subject: [PATCH] drm: renesas: Extend RZ/G2L supported KMS formats
>
> From: Kieran Bingham
>
> The RZ/G2L driver utilises the VSPD to read data from input sources.
>
> The rzg2
On 3/6/2025 5:25 AM, Dmitry Baryshkov wrote:
> On Wed, Mar 05, 2025 at 06:20:45PM +0800, Xiangxu Yin wrote:
>>
>>
>> On 12/20/2024 8:01 AM, Dmitry Baryshkov wrote:
>>> On Wed, Dec 18, 2024 at 08:55:54PM +0800, Xiangxu Yin wrote:
On 12/12/2024 3:15 AM, Dmitry Baryshkov wrote:
>
On Fri, 2025-03-21 at 16:58 +0100, Christian König wrote:
> Sometimes drivers need to be able to submit multiple jobs which
> depend on
> each other to different schedulers at the same time, but using
> drm_sched_job_add_dependency() can't fail any more after the first
> job is
> initialized.
>
>
On Fri, Mar 21, 2025 at 01:12:30PM +0100, Danilo Krummrich wrote:
> Not all device resources are managed in the context of the subsystem, so
> subsystem-level revokes do not apply.
They could, you could say that these rust APIs are only safe to use
for device drivers with C code providing a fence
On Fri, Mar 21, 2025 at 02:36:21AM +0530, Ayushi Makhija wrote:
> On 3/11/2025 9:09 PM, Dmitry Baryshkov wrote:
> > On Tue, Mar 11, 2025 at 05:54:43PM +0530, Ayushi Makhija wrote:
> >> When device enters the suspend state, it prevents
> >> HPD interrupts from occurring. To address this,
> >> add an
On Fri, Mar 21, 2025, at 18:05, Guenter Roeck wrote:
> On 3/13/25 04:43, Alessandro Carminati wrote:
>
> gcc 10.3.0 and later do not have this problem. I also tried s390 builds
> with gcc 9.4
> and 9.5 but they both crash for unrelated reasons.
>
> If this is a concern, the best idea I have is to
From: Kieran Bingham
The RZ/G2L driver utilises the VSPD to read data from input sources.
The rzg2l_du_kms component lists a restricted subset of the capabilities
of the VSPd which prevents additional formats from being used for
display planes.
The supported display plane formats are mapped in
Hi Laurent,
Thanks for your patch!
On Fri, Mar 21, 2025 at 12:46:15PM +0200, Laurent Pinchart wrote:
> The rz-du driver uses GEM DMA helpers, but does not implement the
> drm_driver .gem_prime_import_sg_table operation. This prevents
> importing dmabufs. Fix it by implementing the missing operati
Remove support for fb events from the lcd subsystem. Provide the
helper lcd_notify_blank_all() instead. In fbdev, call
lcd_notify_blank_all() to inform the lcd subsystem of changes
to a display's blank state.
Fbdev maintains a list of all installed notifiers. Instead of fbdev
notifiers, maintain a
Move the handling of blank-state updates into a separate helper,
so that is can be called without the fbdev event. No functional
changes.
As a minor improvement over the original code, the update replaces
manual locking with a guard.
Signed-off-by: Thomas Zimmermann
Reviewed-by: Daniel Thompson
On Thu, Mar 20, 2025 at 11:32:12AM +, Matt Coster wrote:
> + - if:
> + properties:
> +compatible:
> + contains:
> +const: img,img-bxs-4-64
> +then:
> + properties:
> +power-domains:
> + minItems: 2
> +power-domain-names:
> +
On 3/13/25 04:43, Alessandro Carminati wrote:
From: Guenter Roeck
Add name of functions triggering warning backtraces to the __bug_table
object section to enable support for suppressing WARNING backtraces.
To limit image size impact, the pointer to the function name is only added
to the __bug_
On Wed, Mar 19, 2025 at 09:43:06AM +0530, Anshuman Khandual wrote:
>
>
> On 3/19/25 09:04, Anshuman Khandual wrote:
> > On 3/19/25 07:16, Yury Norov wrote:
> >> + Catalin Marinas, ARM maillist
> >>
> >> Hi Catalin and everyone,
> >
> > Hello Yury,
> >
> >>
> >> Anshuman Khandual asked me to mer
The user can set any speed value.
If speed is greater than UINT_MAX/8, division by zero is possible.
Found by Linux Verification Center (linuxtesting.org) with SVACE.
Fixes: c52dcf49195d ("drm/amd/pp: Avoid divide-by-zero in
fan_ctrl_set_fan_speed_rpm")
Signed-off-by: Denis Arefev
---
drivers/
From: Xiaogang Chen
by casting size_limit_mb to u64 when calculate pglimit.
Signed-off-by: Xiaogang Chen
---
drivers/dma-buf/udmabuf.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/dma-buf/udmabuf.c b/drivers/dma-buf/udmabuf.c
index 8ce1f074c2d3..e99e3a65a470 1006
For the unlikely case that we ran into an ENOMEM while fixing up the gang
submission dependencies we can't clean up any more since the gang
members are already armed.
Fix this by using pre-allocated dependency slots and re-ordering the
code, also fix a double unref since the fence reference is als
On 2/25/2025 12:55 AM, Tomeu Vizoso wrote:
+int rocket_ioctl_fini_bo(struct drm_device *dev, void *data, struct drm_file
*file)
+{
+ struct drm_rocket_fini_bo *args = data;
+ struct drm_gem_object *gem_obj;
+ struct rocket_gem_object *rkt_obj;
+ struct drm_gem_shmem_objec
To enable or disable the sharpness check the
casf_enable flag. While enabling the sharpness
write the programmable coefficients, sharpness
register bits and also enable the scaler.
Load the filter lut value which needs to be done
one time while enabling the sharpness.
v2: Introduce casf_enable her
sharpness
As only second scaler can be used for sharpness check if it
is available and also check if panel fitting is not enabled,
then set the sharpness as both uses pipe scaler so only one
can be enabled at a time.
v2: Add the panel fitting check before enabling sharpness
v3: Reframe commit mes
Set the mode of scaler to HQ for casf.
Signed-off-by: Nemesa Garg
---
drivers/gpu/drm/i915/display/skl_scaler.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/skl_scaler.c
b/drivers/gpu/drm/i915/display/skl_scaler.c
index d816dae9cec4..93a847c05535 100644
--
Write the casf registers bits to enable the sharpness
and to compute the strength of casf using casf_compute_config.
Also verify whether the enable bit is set or not and strength
value is correctly updated.
v2: Update subject[Ankit]
Signed-off-by: Nemesa Garg
---
drivers/gpu/drm/i915/display/in
coefficients
The sharpness property requires the use of one of the scaler
so need to set the sharpness scaler coefficient values.
These values are based on experiments and vary for different
tap value/win size. These values are normalized by taking the
sum of all values and then dividing each valu
Many a times images are blurred or upscaled content is also not as
crisp as original rendered image. Traditional sharpening techniques often
apply a uniform level of enhancement across entire image, which sometimes
result in over-sharpening of some areas and potential loss of natural details.
In
HAS_CASF macro will be used to check whether platform
support the content adaptive sharpness capability or
not.
v2: Update commit message[Ankit]
Signed-off-by: Nemesa Garg
---
drivers/gpu/drm/i915/display/intel_display_device.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm
On Tue, 25 Feb 2025, Easwar Hariharan wrote:
> Commit b35108a51cf7 ("jiffies: Define secs_to_jiffies()") introduced
> secs_to_jiffies(). As the value here is a multiple of 1000, use
> secs_to_jiffies() instead of msecs_to_jiffies() to avoid the multiplication
>
> This is converted using scripts/
On 2/25/2025 12:55 AM, Tomeu Vizoso wrote:
+/**
+ * struct drm_rocket_task - A task to be run on the NPU
+ *
+ * A task is the smallest unit of work that can be run on the NPU.
+ */
+struct drm_rocket_task {
+ /** DMA address to NPU mapping of register command buffer */
+ __u64 regcmd
On Sun, Mar 16, 2025 at 12:51:29PM +0100, Krzysztof Kozlowski wrote:
> On 15/03/2025 16:20, Alex Lanzano wrote:
> > Hi all,
> >
> > There is a bug in the mipi_dbi_hw_reset() function that handles the
> > reset logic of the controller. Currently, it will set the reset gpio
> > value to 0, wait a sp
On Tue, 25 Feb 2025, Easwar Hariharan wrote:
> Commit b35108a51cf7 ("jiffies: Define secs_to_jiffies()") introduced
> secs_to_jiffies(). As the value here is a multiple of 1000, use
> secs_to_jiffies() instead of msecs_to_jiffies() to avoid the multiplication
>
> This is converted using scripts/
Sometimes drivers need to be able to submit multiple jobs which depend on
each other to different schedulers at the same time, but using
drm_sched_job_add_dependency() can't fail any more after the first job is
initialized.
This function preallocate memory for dependency slots so that no ENOMEM
ca
On 2/25/2025 12:55 AM, Tomeu Vizoso wrote:
diff --git a/Documentation/accel/rocket/index.rst b/Documentation/accel/rocket/index.rst
new file mode 100644
index
..ad33194dec0325d0dab362768fd349e8dc286970
--- /dev/null
+++ b/Documentation/accel/rocket/inde
From: Nancy Lin
Add mutex support for the main and external displays in MT8196:
- Introduce a new DVO0 output component for the new mutex
settings of MT8196.
- Add a need_sof_mof flag to configure both SOF and MOD settings
for the output component.
Signed-off-by: Nancy Lin
Signed-off-by: Pa
From: Honglei Huang
Hello,
This series add virtio gpu userptr support and add libhsakmt capset.
The userptr feature is used for let host access guest user space memory,
this feature is used for GPU compute use case, to enable ROCm/OpenCL native
context. It should be pointed out that we are not t
On 3/6/2025 11:03 AM, Lizhi Hou wrote:
+struct drm_gem_object *
+amdxdna_gem_prime_import(struct drm_device *dev, struct dma_buf *dma_buf)
+{
+ struct dma_buf_attachment *attach;
+ struct drm_gem_object *gobj;
+ struct sg_table *sgt;
+ int ret;
+
+ attach = dma_buf_a
On Fri, Mar 21, 2025 at 11:35:40AM +0100, Simona Vetter wrote:
> On Wed, Mar 19, 2025 at 02:21:32PM -0300, Jason Gunthorpe wrote:
> > On Thu, Mar 13, 2025 at 03:32:14PM +0100, Simona Vetter wrote:
> >
> > > So I think you can still achieve that building on top of revocable and a
> > > few more abs
On Fri, 14 Mar 2025 at 11:16, Jacek Lawrynowicz
wrote:
>
> Hi,
>
> On 3/4/2025 6:06 PM, Simona Vetter wrote:
> > Hi Jacek!
> >
> > Bit late reply, was sick last week and still recovering from missed mails.
> >
> > On Thu, Feb 20, 2025 at 11:50:10AM +0100, Jacek Lawrynowicz wrote:
> >> On 2/19/2025
On Thu, Mar 20, 2025 at 05:59:58PM +0200, Tomi Valkeinen wrote:
> At the moment the driver just sets the clock rate with clk_set_rate(),
> and if the resulting rate is not the same as requested, prints a debug
> print, but nothing else.
>
> Add mode_fixup(), in which the clk_round_rate() is used t
On Fri, Mar 21, 2025 at 12:23:15PM +, Srinivas Kandagatla wrote:
>
>
> On 20/03/2025 18:43, Dmitry Baryshkov wrote:
> > On Thu, Mar 20, 2025 at 05:11:20PM +, Srinivas Kandagatla wrote:
> > >
> > >
> > > On 20/03/2025 09:14, Ling Xu wrote:
> > > > The fastrpc driver has support for 5 typ
On Fri, Mar 21, 2025 at 6:53 AM Denis Arefev wrote:
>
> This series of patches prevents possible division by zero.
>
> The user can set any speed value.
> If speed is greater than UINT_MAX/8, division by zero is possible.
>
> Found by Linux Verification Center (linuxtesting.org) with SVACE.
Appli
Hi
> On 13 Mar 2025, at 4:48 PM, Aditya Garg wrote:
>
> The vsprint patch was originally being sent as a seperate patch [1], and
> I was waiting it to be taken up. But since 6.15 merge window is near, a
> potential delay between the drm and vsprintf patch might make the vsprint
> patch as an un
On Mon, 17 Mar 2025, Thomas Zimmermann wrote:
> Am 15.03.25 um 13:01 schrieb Yue Haibing:
>> In file included from :
>> ./drivers/gpu/drm/i915/display/intel_fbdev.h: In function
>> ‘intel_fbdev_framebuffer’:
>> ./drivers/gpu/drm/i915/display/intel_fbdev.h:32:16: error: ‘NULL’ undeclared
>> (firs
On 20/03/2025 18:43, Dmitry Baryshkov wrote:
On Thu, Mar 20, 2025 at 05:11:20PM +, Srinivas Kandagatla wrote:
On 20/03/2025 09:14, Ling Xu wrote:
The fastrpc driver has support for 5 types of remoteprocs. There are
some products which support GPDSP remoteprocs. Add changes to support
G
On 20/03/2025 20:40, Matthew Brost wrote:
On Thu, Mar 20, 2025 at 05:29:58PM +, Matthew Auld wrote:
Handle the case where the hmm range partially covers a huge page (like
2M), otherwise we can potentially end up doing something nasty like
mapping memory which potentially is outside the range
On Fri, Mar 21, 2025 at 06:17:39PM +0800, Xiangxu Yin wrote:
>
>
> On 3/6/2025 5:25 AM, Dmitry Baryshkov wrote:
> > On Wed, Mar 05, 2025 at 06:20:45PM +0800, Xiangxu Yin wrote:
> >>
> >>
> >> On 12/20/2024 8:01 AM, Dmitry Baryshkov wrote:
> >>> On Wed, Dec 18, 2024 at 08:55:54PM +0800, Xiangxu Yi
On Fri, Mar 21, 2025 at 09:04:16AM -0300, Jason Gunthorpe wrote:
> On Fri, Mar 21, 2025 at 11:35:40AM +0100, Simona Vetter wrote:
> > On Wed, Mar 19, 2025 at 02:21:32PM -0300, Jason Gunthorpe wrote:
> > > On Thu, Mar 13, 2025 at 03:32:14PM +0100, Simona Vetter wrote:
> > >
> > > > So I think you c
On 20/03/2025 19:33, Matthew Brost wrote:
On Thu, Mar 20, 2025 at 08:29:42PM +0100, Thomas Hellström wrote:
On Thu, 2025-03-20 at 17:30 +, Matthew Auld wrote:
If the memory is going to be accessed by the device, make sure we
mark
the pages accordingly such that the kernel knows this. This a
On Fri, 21 Mar 2025 at 12:18, Ekansh Gupta
wrote:
>
>
>
> On 3/20/2025 9:27 PM, Ekansh Gupta wrote:
> >
> > On 3/20/2025 7:45 PM, Dmitry Baryshkov wrote:
> >> On Thu, Mar 20, 2025 at 07:19:31PM +0530, Ekansh Gupta wrote:
> >>> On 1/29/2025 4:10 PM, Dmitry Baryshkov wrote:
> On Wed, Jan 29, 20
On Fri, Mar 21, 2025 at 10:54:01AM +0100, Thomas Zimmermann wrote:
> Remove support for fb events from the lcd subsystem. Provide the
> helper lcd_notify_blank_all() instead. In fbdev, call
> lcd_notify_blank_all() to inform the lcd subsystem of changes
> to a display's blank state.
>
> Fbdev maint
On Fri, Mar 21, 2025 at 10:53:59AM +0100, Thomas Zimmermann wrote:
> Remove support for fb events from backlight subsystem. Provide the
> helper backlight_notify_blank_all() instead. Also export the existing
> helper backlight_notify_blank() to update a single backlight device.
>
> In fbdev, call e
Some drivers like virtio-gpu, don't map the scanout buffer in the
kernel. Calling vmap() in a panic handler is not safe, and writing an
atomic_vmap() API is more complex than expected [1].
So instead, pass the array of pages of the scanout buffer to the
panic handler, and map only one page at a tim
The user can set any speed value.
If speed is greater than UINT_MAX/8, division by zero is possible.
Found by Linux Verification Center (linuxtesting.org) with SVACE.
Fixes: c52dcf49195d ("drm/amd/pp: Avoid divide-by-zero in
fan_ctrl_set_fan_speed_rpm")
Signed-off-by: Denis Arefev
---
drivers/
The user can set any speed value.
If speed is greater than UINT_MAX/8, division by zero is possible.
Found by Linux Verification Center (linuxtesting.org) with SVACE.
Fixes: 031db09017da ("drm/amd/powerplay/vega20: enable fan RPM and pwm settings
V2")
Signed-off-by: Denis Arefev
---
drivers/gp
The user can set any speed value.
If speed is greater than UINT_MAX/8, division by zero is possible.
Found by Linux Verification Center (linuxtesting.org) with SVACE.
Fixes: c05d1c401572 ("drm/amd/swsmu: add aldebaran smu13 ip support (v3)")
Signed-off-by: Denis Arefev
---
drivers/gpu/drm/amd/p
The user can set any speed value.
If speed is greater than UINT_MAX/8, division by zero is possible.
Found by Linux Verification Center (linuxtesting.org) with SVACE.
Fixes: b64625a303de ("drm/amd/pm: correct the address of Arcturus fan related
registers")
Signed-off-by: Denis Arefev
---
drive
On Wed, Mar 19, 2025 at 02:21:32PM -0300, Jason Gunthorpe wrote:
> On Thu, Mar 13, 2025 at 03:32:14PM +0100, Simona Vetter wrote:
>
> > So I think you can still achieve that building on top of revocable and a
> > few more abstractions that are internally unsafe. Or are you thinking of
> > differen
Remove support for fb events from the led backlight trigger. Provide
the helper ledtrig_backlight_blank() instead. Call it from fbdev to
inform the trigger of changes to a display's blank state.
Fbdev maintains a list of all installed notifiers. Instead of the fbdev
notifiers, maintain an internal
Move the handling of display updates to separate helper functions.
There is code for handling fbdev blank events and fbdev mode changes.
The code currently runs from fbdev event notifiers, which will be
replaced.
Signed-off-by: Thomas Zimmermann
Reviewed-by: Daniel Thompson (RISCstar)
Acked-by:
From: Nancy Lin
EXDMA is a DMA engine for reading data from DRAM with
various DRAM footprints and data formats. For input
sources in certain color formats and color domains,
EXDMA also includes a color transfer function to
process pixels into a consistent color domain.
New Add: 6320385 Fix RG16 a
From: Nancy Lin
Add code to support MT8196 SOC Multi MMSYS Driver
Signed-off-by: Nancy Lin
Signed-off-by: Paul-pl Chen
---
drivers/gpu/drm/mediatek/mtk_drm_drv.c | 119 -
1 file changed, 115 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_d
From: Nancy Lin
To support multiple mmsys instances in the one mediatek-drm instance,
providing improved flexibility and scalability by the following changes:
1. Add DDP_COMPONENT_DRM_OVLSYS_ADAPTOR* to probe the
ovlsys_adaptor drivers and support different mmsys composition.
2. Added new comp
From: Nancy Lin
OUTPROC handles the post-stage of pixel processing in
the overlapping procedure.OUTPROC manages pixels for
gamma correction and ensures that pixel values are
within the correct range.
Signed-off-by: Nancy Lin
Signed-off-by: Paul-pl Chen
---
drivers/gpu/drm/mediatek/Makefile
From: Nancy Lin
1. Defining driver data and adding compatible string
for different subsystems
(DISPSYS0, DISPSYS1, OVLSYS0, OVLSYS1, VDISP_AO)
2. Adding functions to control top clocks and ddp clocks.
3. Updating the probe function to initialize clocks and
enable runtime PM if its node has the po
From: Paul-pl Chen
Add compatible string to support mutex for MT8196.
Signed-off-by: Paul-pl Chen
---
.../devicetree/bindings/soc/mediatek/mediatek,mutex.yaml| 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/soc/mediatek/mediatek,mutex.yaml
b/Docu
From: Paul-pl Chen
In previous SoCs, a single HW pipeline was an independent mmsys,
which included the OVL module, PQ module, and display interface
module.
In the 8196, to increase the flexibility of pipeline connection
and control, the OVL module on a single HW pipeline was separated
into two m
On Thu, 20 Mar 2025 11:17:35 +
Karunika Choo wrote:
> This patch aims to lay the foundation to provide support for multiple
> Mali GPUs through a framework by which differences in registers,
> functionality, and features can be managed.
>
> It introduces the concept of the arch_id which is a
1 - 100 of 108 matches
Mail list logo
