On 06.09.25 03:05, John Hubbard wrote:
On 9/1/25 8:03 AM, David Hildenbrand wrote:
We can just cleanup the code by calculating the #refs earlier,
so we can just inline what remains of record_subpages().
Calculate the number of references/pages ahead of times, and record them
only once all our t
On Tue, Sep 02, 2025 at 12:53:32PM -0400, Alex Deucher wrote:
> Older GPUs did not support memory protection, so the kernel
> driver would validate the command submissions (CS) from userspace
> to avoid the GPU accessing any memory it shouldn't.
>
> Change any error messages in that validatio to d
On Fri, Sep 5, 2025 at 3:25 PM Zihuan Zhang wrote:
>
> Replace the manual cpufreq_cpu_put() with __free(put_cpufreq_policy)
> annotation for policy references. This reduces the risk of reference
> counting mistakes and aligns the code with the latest kernel style.
>
> No functional change intended
Le 22/08/2025 à 20:36, Nícolas F. R. A. Prado a écrit :
Export drm_colorop_cleanup() so drivers subclassing drm_colorop can
reuse this function in subclass cleanup routines.
Signed-off-by: Nícolas F. R. A. Prado
Reviewed-by: Louis Chauvet
---
drivers/gpu/drm/drm_colorop.c | 3 ++-
in
Reload late binding fw during resume from system suspend
v2:
- Unconditionally reload late binding fw (Rodrigo)
- Flush worker during system suspend
Cc: Rodrigo Vivi
Signed-off-by: Badal Nilawar
Reviewed-by: Rodrigo Vivi
Signed-off-by: Rodrigo Vivi
---
drivers/gpu/drm/xe/xe_pm.c | 4
Replace the manual cpufreq_cpu_put() with __free(put_cpufreq_policy)
annotation for policy references. This reduces the risk of reference
counting mistakes and aligns the code with the latest kernel style.
No functional change intended.
Signed-off-by: Zihuan Zhang
Reviewed-by: Jonathan Cameron
Applied. Thanks!
On Fri, Sep 5, 2025 at 8:59 AM Francis, David wrote:
>
> [AMD Official Use Only - AMD Internal Distribution Only]
>
> Whoops. Yep, story checks out.
>
> This is
> Reviewed-By: David Francis
>
> From: Dan Carpenter
> Sent: Thursday, September 4,
On Fri, 05 Sep 2025 12:11:29 +
Alice Ryhl wrote:
> static void panthor_vm_cleanup_op_ctx(struct panthor_vm_op_ctx *op_ctx,
> struct panthor_vm *vm)
> {
> - struct panthor_vma *vma, *tmp_vma;
> -
> u32 remaining_pt_count = op_ctx->rsvd_page_table
On Mon, Mar 24, 2025 at 08:02:06AM +0100, Alexander Stein wrote:
>Am Freitag, 21. M?rz 2025, 21:05:59 CET schrieb Marek Vasut:
>> The instance of the GPU populated in i.MX95 is the G310,
>> describe this GPU in the DT. Include description of the
>> GPUMIX block controller, which can be operated as
Le 22/08/2025 à 20:36, Nícolas F. R. A. Prado a écrit :
Introduce support for a post-blend color pipeline API analogous to the
pre-blend color pipeline API. While the pre-blend color pipeline was
configured through a COLOR_PIPELINE property attached to a drm_plane,
the post-blend color pipelin
On 2025-09-04 10:07, Alex Deucher wrote:
Applied. Thanks!
Thank you, Alex!
Alex
On Thu, Sep 4, 2025 at 8:54 AM Qianfeng Rong wrote:
Use negative error code -EINVAL instead of positive EINVAL in the default
case of svm_ioctl() to conform to Linux kernel error code conventions.
Fixes: 42
On Wed, 3 Sep 2025 21:17:24 +0800
Zihuan Zhang wrote:
> Replace the manual cpufreq_cpu_put() with __free(put_cpufreq_policy)
> annotation for policy references. This reduces the risk of reference
> counting mistakes and aligns the code with the latest kernel style.
>
> No functional change inte
On 9/5/25 9:59 AM, Aleksandrs Vinarskis wrote:
> Introduce common generic led consumer binding, where consumer defines
> led(s) by phandle, as opposed to trigger-source binding where the
> trigger source is defined in led itself.
>
> Add already used in some schemas 'leds' parameter which expects
This controller can have both bridges and panels connected to it. In
order to describe panels properly in DT, pull in dsi-controller.yaml
and disallow only unevaluatedProperties, because the panel node is
optional. Include example binding with panel.
Signed-off-by: Marek Vasut
---
Cc: Conor Doole
Hi,
On Fri, Sep 5, 2025 at 12:51 AM Zhongtian Wu
wrote:
>
> Add a few generic edp panels used by mt8189 chromebooks. For
> BOE-NV140WUM-N44 V8.2 , the enable timing required 80ms. For
> CSW-MNE007QB3-1, the hpd_absent timing rquired 80ms, the enable timing
> required 50ms, the disable timing requ
With CONFIG_HYPERV and CONFIG_HYPERV_VMBUS separated, change CONFIG_HYPERV
to bool from tristate. CONFIG_HYPERV now becomes the core Hyper-V
hypervisor support, such as hypercalls, clocks/timers, Confidential
Computing setup, PCI passthru, etc. that doesn't involve VMBus or VMBus
devices.
Signed-o
At present VMBus driver is hinged off of CONFIG_HYPERV which entails
lot of builtin code and encompasses too much. It's not always clear
what depends on builtin hv code and what depends on VMBus. Setting
CONFIG_HYPERV as a module and fudging the Makefile to switch to builtin
adds even more confusio
At present, drivers/Makefile will subst =m to =y for CONFIG_HYPERV
for hv subdir. Also, drivers/hv/Makefile replaces =m to =y to build in
hv_common.c that is needed for the drivers. Moreover, vmbus driver is
built if CONFIG_HYPER is set, either loadable or builtin.
This is not a good approach. CON
On 9/1/25 8:03 AM, David Hildenbrand wrote:
> We can just cleanup the code by calculating the #refs earlier,
> so we can just inline what remains of record_subpages().
>
> Calculate the number of references/pages ahead of times, and record them
> only once all our tests passed.
>
> Signed-off-by:
The pull request you sent on Fri, 5 Sep 2025 14:12:52 +1000:
> https://gitlab.freedesktop.org/drm/kernel.git tags/drm-fixes-2025-09-05
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/c8ed9b5c02a5ceb3d8244f3862a7e64cf0b5648e
Thank you!
--
Deet-doot-dot, I am a bot.
ht
On Thu, Sep 04, 2025 at 10:01:54PM +0200, Marek Vasut wrote:
> Document the 5" Raspberry Pi 720x1280 DSI panel based on ili9881.
>
> Signed-off-by: Marek Vasut
Acked-by: Conor Dooley
signature.asc
Description: PGP signature
On 9/5/25 14:41, Mukesh R wrote:
> On 9/5/25 13:08, Nuno Das Neves wrote:
>> On 9/4/2025 11:18 AM, Mukesh R wrote:
>>> On 9/4/25 09:26, Michael Kelley wrote:
From: Mukesh R Sent: Wednesday, September 3,
2025 7:17 PM
>
> On 9/2/25 07:42, Michael Kelley wrote:
>> From: Mukesh
On Fri, Sep 5, 2025 at 3:25 PM Zihuan Zhang wrote:
>
> Replace the manual cpufreq_cpu_put() with __free(put_cpufreq_policy)
> annotation for policy references. This reduces the risk of reference
> counting mistakes and aligns the code with the latest kernel style.
>
> No functional change intended
On Fri, 05 Sep 2025 12:22:59 +0200, Nicolas Frattaroli wrote:
> This compatible is used for an SRAM section that's shared between the
> MT8196's application processor cores and the embedded GPUEB MCU that
> controls the GPU frequency.
>
> Through this SRAM section, things about the GPU frequency
On Fri, Sep 05, 2025 at 12:23:00PM +0200, Nicolas Frattaroli wrote:
> The MediaTek MT8196 SoC includes an embedded MCU referred to as "GPUEB",
> acting as glue logic to control power and frequency of the Mali GPU.
> This MCU runs proprietary firmware for this purpose, and the main
> application pro
On Fri, Sep 05, 2025 at 12:22:57PM +0200, Nicolas Frattaroli wrote:
> The Mali-based GPU on the MediaTek MT8196 SoC is shackled to its concept
> of "MFlexGraphics", which in this iteration includes an embedded MCU
> that needs to be poked to power on the GPU, and is in charge of
> controlling all t
On Fri, Sep 05, 2025 at 04:48:52PM +, Aleksandrs Vinarskis wrote:
> On Friday, September 5th, 2025 at 17:24, Rob Herring wrote:
>
> >
> >
> > On Fri, Sep 05, 2025 at 09:59:30AM +0200, Aleksandrs Vinarskis wrote:
> >
> > > A number of existing schemas use 'leds' property to provide
> > > ph
On Fri, Sep 05, 2025 at 08:41:23AM +0200, David Hildenbrand wrote:
> On 01.09.25 17:03, David Hildenbrand wrote:
> > We can just cleanup the code by calculating the #refs earlier,
> > so we can just inline what remains of record_subpages().
> >
> > Calculate the number of references/pages ahead of
On Fri Sep 5, 2025 at 8:18 PM CEST, Alice Ryhl wrote:
> On Fri, Sep 5, 2025 at 3:25 PM Boris Brezillon
> wrote:
>> On Fri, 05 Sep 2025 12:11:28 +
>> Alice Ryhl wrote:
>> > +static bool
>> > +drm_gpuvm_bo_is_dead(struct drm_gpuvm_bo *vm_bo)
>> > +{
>> > + return !kref_read(&vm_bo->kref);
>
On 9/4/25 4:06 AM, Alexandre Courbot wrote:
> On Thu Sep 4, 2025 at 4:16 PM JST, Danilo Krummrich wrote:
>> On Thu Sep 4, 2025 at 5:16 AM CEST, Alexandre Courbot wrote:
>>> On Thu Sep 4, 2025 at 12:15 AM JST, Joel Fernandes wrote:
>>>
>> pub struct PageTableEntry {
>> 63:63 nx
On Fri, Sep 05, 2025 at 09:24:07PM +0800, Zihuan Zhang wrote:
> This patchset converts all remaining cpufreq users to rely on the
> __free(put_cpufreq_policy) annotation for policy references, instead of
> calling cpufreq_cpu_put() manually.
Sep 01 Zihuan Zhang ( :8.6K|) [PATCH v3 00/12] cpufreq:
On 9/4/2025 5:35 PM, Yury Norov wrote:
> Hi Joel,
>
> (Thanks to John for referencing this.)
>
> On Sun, Aug 24, 2025 at 09:59:52AM -0400, Joel Fernandes wrote:
>> Add a minimal bitfield library for defining in Rust structures (called
>> bitstruct), similar in concept to bit fields in C struct
Hi Thomas.
(I needed a distraction - this patchset was my excuse).
On Mon, Aug 18, 2025 at 12:36:37PM +0200, Thomas Zimmermann wrote:
> The type struct fbcon_ops contains fbcon state and callbacks. As the
> callbacks will be removed from struct fbcon_ops, rename the data type
> to struct fbcon. A
Le 15/08/2025 à 05:50, Alex Hung a écrit :
The functions are to clean up color pipeline when a device driver
fails to create its color pipeline.
Signed-off-by: Alex Hung
Reviewed-by: Daniel Stone
Reviewed-by: Simon Ser
Reviewed-by: Melissa Wen
---
v11:
- destroy function takes drm_devic
Hi Dave and Sima,
Here goes our first drm-intel-next pull request towards 6.18.
I'm planning to send another pull request in the end of next week.
It is important to highlight the iopoll.h work that is pushed here without
any ack since it lacks MAINTAINERS and previous changes apparently gets
thr
OK - sorry for the delay! Note: I haven't been able to test this on an actual
platform
Comments down below
On Sun, 2025-08-31 at 22:22 -0500, Aaron Kling via B4 Relay wrote:
> From: Aaron Kling
>
> Using pmu counters for usage stats. This enables dynamic frequency
> scaling on all of the curren
Hi Liu,
kernel test robot noticed the following build errors:
[auto build test ERROR on 4ac65880ebca1b68495bd8704263b26c050ac010]
url:
https://github.com/intel-lab-lkp/linux/commits/Liu-Ying/drm-bridge-ite-it6263-Support-HDMI-vendor-specific-infoframe/20250904-171143
base: 4ac65880ebca1b68
On 9/5/25 13:08, Nuno Das Neves wrote:
> On 9/4/2025 11:18 AM, Mukesh R wrote:
>> On 9/4/25 09:26, Michael Kelley wrote:
>>> From: Mukesh R Sent: Wednesday, September 3,
>>> 2025 7:17 PM
On 9/2/25 07:42, Michael Kelley wrote:
> From: Mukesh Rathor Sent: Wednesday, August
> 27,
Le 03/08/2025 à 05:57, Jim Cromie a écrit :
Add a selftest script for dynamic-debug. The config requires
CONFIG_TEST_DYNAMIC_DEBUG=m and CONFIG_TEST_DYNAMIC_DEBUG_SUBMOD=m,
which tacitly requires either CONFIG_DYNAMIC_DEBUG=y or
CONFIG_DYNAMIC_DEBUG_CORE=y
ATM this has just basic_tests(), wh
Le 03/08/2025 à 05:57, Jim Cromie a écrit :
Remove the DD_CLASS_TYPE_*_NAMES classmap types and code.
These 2 classmap types accept class names at the PARAM interface, for
example:
echo +DRM_UT_CORE,-DRM_UT_KMS > /sys/module/drm/parameters/debug_names
The code works, but its only used by
Le 03/08/2025 à 05:57, Jim Cromie a écrit :
Classmaps are stored in an elf section/array, but currently are
individually list-linked onto dyndbg's per-module ddebug_table for
operation. This is unnecessary.
Just like dyndbg's descriptors, classes are packed in compile order;
so even with many
Hi Liu,
kernel test robot noticed the following build warnings:
[auto build test WARNING on 4ac65880ebca1b68495bd8704263b26c050ac010]
url:
https://github.com/intel-lab-lkp/linux/commits/Liu-Ying/drm-bridge-ite-it6263-Support-HDMI-vendor-specific-infoframe/20250904-171143
base: 4ac65880ebca
Le 03/08/2025 à 05:57, Jim Cromie a écrit :
recompose struct _ddebug_info, inserting proper sub-structs.
The struct currently has 2 pairs of fields: descs, num_descs and
classes, num_classes. Several for-loops operate on these field pairs,
soon many more will be added.
Looping over these bl
Le 03/08/2025 à 05:57, Jim Cromie a écrit :
Disambiguate pr_fmt(fmt) arg, by changing it to _FMT_, to avoid naming
confusion with many later macros also using that argname.
no functional change
Signed-off-by: Jim Cromie
Reviewed-by: Louis Chauvet
---
lib/dynamic_debug.c | 2 +-
1 fi
This patchset converts all remaining cpufreq users to rely on the
__free(put_cpufreq_policy) annotation for policy references, instead of
calling cpufreq_cpu_put() manually.
Motivation:
- Reduce the chance of reference counting mistakes
- Make the code more consistent with the latest kernel style
On Thu, Sep 4, 2025 at 8:07 AM John Stultz wrote:
>
> On Sat, Aug 30, 2025 at 4:58 PM Barry Song <21cn...@gmail.com> wrote:
> >
> > From: Barry Song
> >
> > We can allocate high-order pages, but mapping them one by
> > one is inefficient. This patch changes the code to map
> > as large a chunk as
In amdxdna_gem_obj_vmap(), calling dma_buf_vmap() triggers a kernel
warning if LOCKDEP is enabled. So for imported object, use
dma_buf_vmap_unlocked(). Then, use drm_gem_vmap() for other objects.
The similar change applies to vunmap code.
Fixes: bd72d4acda10 ("accel/amdxdna: Support user space all
On Fri, Sep 5, 2025 at 3:24 PM Zihuan Zhang wrote:
>
> Replace the manual cpufreq_cpu_put() with __free(put_cpufreq_policy)
> annotation for policy references. This reduces the risk of reference
> counting mistakes and aligns the code with the latest kernel style.
>
> No functional change intended
On 9/4/2025 11:18 AM, Mukesh R wrote:
> On 9/4/25 09:26, Michael Kelley wrote:
>> From: Mukesh R Sent: Wednesday, September 3,
>> 2025 7:17 PM
>>>
>>> On 9/2/25 07:42, Michael Kelley wrote:
From: Mukesh Rathor Sent: Wednesday, August
27, 2025 6:00 PM
>
> At present, drivers/Ma
On Tue, 02 Sep 2025 11:35:02 +0200
Maxime Ripard wrote:
> While the old and new state pointers are somewhat self-explanatory, the
> state pointer and its relation to the other two really isn't.
>
> Now that we've cleaned up everything and it isn't used in any
> modesetting path, we can document
On Tue, 02 Sep 2025 11:35:36 +0200
Maxime Ripard wrote:
> While the old and new state pointers are somewhat self-explanatory, the
> state pointer and its relation to the other two really isn't.
>
> Now that we've cleaned up everything and it isn't used in any
> modesetting path, we can document
On Fri, Sep 05, 2025 at 04:58:59PM +0800, 杨孙运 wrote:
> HI，
>
> As a vendors , we have begun to attempt to contribute to the Linux,
> and we are very willing to do so.
> there are still many rules that we don't understand and need to learn.
Not top-posting and trimming your emails would be nice th
Hi Dmitry,
On 8/29/2025 4:48 PM, Dmitry Baryshkov wrote:
On Wed, Aug 20, 2025 at 05:18:13PM +0800, Damon Ding wrote:
Hi Dmitry,
On 8/17/2025 12:43 AM, Dmitry Baryshkov wrote:
On Thu, Aug 14, 2025 at 06:47:47PM +0800, Damon Ding wrote:
Apply drm_bridge_connector helper for Analogix DP driver.
On Mon, Aug 18, 2025 at 12:36:41PM +0200, Thomas Zimmermann wrote:
> The callbacks in struct fbcon_bitops are for struct fbcon. Pass an
> instance to the callbacks; instead of the respective struct fb_info.
This looks looks like a pointless change.
All the operations requires fb_info and needs to
Hi Thomas.
On Mon, Aug 18, 2025 at 12:36:39PM +0200, Thomas Zimmermann wrote:
> Depending on rotation settings, fbcon sets different callback
> functions in struct fbcon from within fbcon_set_bitops(). Declare
> the callback functions in the new type struct fbcon_bitops. Then
> only replace the si
On 9/5/25 5:02 PM, Rob Herring (Arm) wrote:
On Thu, 04 Sep 2025 23:01:21 +0200, Marek Vasut wrote:
This controller can have both bridges and panels connected to it. In
order to describe panels properly in DT, pull in dsi-controller.yaml
and disallow only unevaluatedProperties, because the panel
On Thu, Sep 04, 2025 at 10:01:08PM +0200, Marek Vasut wrote:
> The ILI9881C is a DSI panel, which can be tied to a DSI controller
> using OF graph port/endpoint. Allow the port subnode in the binding.
>
> Signed-off-by: Marek Vasut
Acked-by: Conor Dooley
signature.asc
Description: PGP signatu
On Mon, Aug 18, 2025 at 12:36:38PM +0200, Thomas Zimmermann wrote:
> The field struct fbcon.rotate_font points to fbcon_rotate_font() if
> the console is rotated. Set the callback in the same place as the other
> callbacks. Prepares for declaring all fbcon callbacks in a dedicated
> struct type.
>
On Fri, Sep 5, 2025 at 3:25 PM Boris Brezillon
wrote:
>
> On Fri, 05 Sep 2025 12:11:28 +
> Alice Ryhl wrote:
>
> > When using GPUVM in immediate mode, it is necessary to call
> > drm_gpuvm_unlink() from the fence signalling critical path. However,
> > unlink may call drm_gpuvm_bo_put(), which
Le 15/08/2025 à 05:50, Alex Hung a écrit :
From: Harry Wentland
This patch introduces a VKMS color pipeline that includes two
drm_colorops for named transfer functions. For now the only ones
supported are sRGB EOTF, sRGB Inverse EOTF, and a Linear TF.
We will expand this in the future but I
On 9/5/25 3:18 PM, Devarsh Thakkar wrote:
Hi Marek,
Hi,
Thanks for the patch.
On 05/09/25 02:26, Marek Vasut wrote:
Add configuration for the 5" Raspberry Pi 720x1280 DSI panel
based on ili9881. This uses 10px longer horizontal sync pulse
and 10px shorter HBP to avoid very short hsync pulse
On 9/4/25 03:33, Rob Herring wrote:
On Wed, Sep 03, 2025 at 04:43:57PM +0530, Harikrishna Shenoy wrote:
From: Swapnil Jakhade
Add binding changes for DSC(Display Stream Compression) in the MHDP8546
DPI/DP bridge.
Signed-off-by: Swapnil Jakhade
Signed-off-by: Harikrishna Shenoy
---
.../b
Hi Lyude,
> On 29 Aug 2025, at 19:35, Lyude Paul wrote:
>
> From: Asahi Lina
>
> The DRM shmem helper includes common code useful for drivers which
> allocate GEM objects as anonymous shmem. Add a Rust abstraction for
> this. Drivers can choose the raw GEM implementation or the shmem layer,
>
On Fri, Sep 5, 2025 at 2:18 AM Florent Tomasin wrote:
>
>
>
> On 05/09/2025 00:06, Chia-I Wu wrote:
> > On Wed, Sep 3, 2025 at 11:02 PM Boris Brezillon
> > wrote:
> >>
> >> On Wed, 3 Sep 2025 15:55:04 -0700
> >> Chia-I Wu wrote:
> >>
> >>> diff --git a/drivers/gpu/drm/panthor/Makefile
> >>> b/
On Fri, Aug 15, 2025 at 06:11:57PM +0300, Dmitry Baryshkov wrote:
> On Sat, Jul 05, 2025 at 01:05:13PM +0300, Dmitry Baryshkov wrote:
> > Switch VC4 driver to using CEC helpers code, simplifying hotplug and
> > registration / cleanup. The existing vc4_hdmi_cec_release() is kept for
> > now.
> >
>
On Fri, Sep 05, 2025 at 08:41:23AM +0200, David Hildenbrand wrote:
> On 01.09.25 17:03, David Hildenbrand wrote:
> > We can just cleanup the code by calculating the #refs earlier,
> > so we can just inline what remains of record_subpages().
> >
> > Calculate the number of references/pages ahead of
The MediaTek MT8196 SoC includes an embedded MCU referred to as "GPUEB",
acting as glue logic to control power and frequency of the Mali GPU.
This MCU runs proprietary firmware for this purpose, and the main
application processor communicates with it through a mailbox.
Add a binding that describes
Load late binding firmware
v2:
- s/EAGAIN/EBUSY/
- Flush worker in suspend and driver unload (Daniele)
v3:
- Use retry interval of 6s, in steps of 200ms, to allow
other OS components release MEI CL handle (Sasha)
v4:
- return -ENODEV if component not added (Daniele)
- parse and print statu
Introducing firmware late binding feature to enable firmware loading
for the devices, such as the fan controller and voltage regulator,
during the driver probe.
Typically, firmware for these devices are part of IFWI flash image but
can be replaced at probe after OEM tuning.
v2:
- Dropped voltage
This series, currently an RFC, introduces two new drivers to accomplish
controlling the frequency and power of the Mali GPU on MediaTek MT8196
SoCs.
It's marked as an RFC as I want feedback on the general approach, and
because there is a clock series I need to send out first but that's
waiting for
The Mali-based GPU on the MediaTek MT8196 SoC is shackled to its concept
of "MFlexGraphics", which in this iteration includes an embedded MCU
that needs to be poked to power on the GPU, and is in charge of
controlling all the clocks and regulators.
In return, it lets us omit the OPP tables from th
On Fri, Sep 5, 2025 at 12:02 PM Dmitry Torokhov
wrote:
> On Thu, Aug 21, 2025 at 01:56:24PM +0200, Linus Walleij wrote:
> > Hi Ariel,
> >
> > thanks for your patch!
> >
> > On Wed, Aug 20, 2025 at 7:17 PM Ariel D'Alessandro
> > wrote:
> >
> > > + ce-gpios:
> > > +description: GPIO connected
On Fri, Sep 05, 2025 at 04:49:01PM +0300, Dmitry Baryshkov wrote:
> On Fri, Sep 05, 2025 at 11:55:52AM +0800, Yongxing Mou wrote:
> >
> >
> > On 9/4/2025 9:41 PM, Dmitry Baryshkov wrote:
> > > On Thu, Sep 04, 2025 at 05:31:01PM +0800, Yongxing Mou wrote:
> > > >
> > > >
> > > > On 9/4/2025 4:21
пт, 5 вер. 2025 р. о 18:59 Luca Ceresoli пише:
>
> Hello Svyatoslav,
>
> On Tue, 19 Aug 2025 15:16:21 +0300
> Svyatoslav Ryhel wrote:
>
> > Add HFLIP and VFLIP from SoC only if camera sensor does not provide those
> > controls.
> >
> > Signed-off-by: Svyatoslav Ryhel
> > ---
> > drivers/staging
On Fri, Sep 05, 2025 at 07:07:40AM +0200, Greg Kroah-Hartman wrote:
> On Fri, Sep 05, 2025 at 12:48:11AM +0300, Imre Deak wrote:
> > Hi Greg,
> >
> > On Tue, Sep 02, 2025 at 03:20:41PM +0200, Greg Kroah-Hartman wrote:
> > > 6.16-stable review patch. If anyone has any objections, please let me
>
пт, 5 вер. 2025 р. о 19:08 Luca Ceresoli пише:
>
> On Tue, 19 Aug 2025 15:16:25 +0300
> Svyatoslav Ryhel wrote:
>
> > Tegra20, Tegra30 and Tegra114 have VI revision 1.
>
> Why? You should mention the reason in the commit message.
>
Because TRM states that Tegra20, Tegra30 and Tegra114 have VI re
On Tue, 19 Aug 2025 15:16:25 +0300
Svyatoslav Ryhel wrote:
> Tegra20, Tegra30 and Tegra114 have VI revision 1.
Why? You should mention the reason in the commit message.
But I don't see hw_revision used in the series, so unless I missed
something you should drop this patch.
Luca
--
Luca Ceres
commit d34d6feaf4a76833effcec0b148b65946b04cde8 upstream.
Change the AUX DPCD probe address to DP_TRAINING_PATTERN_SET. Using
DP_DPCD_REV for this is not compliant with the DP Standard and it leads
to link training failures at least on a DP2.0 docking station when using
UHBR link rates.
This patc
On Wed, 03 Sep 2025 14:58:18 +0300, Dmitry Baryshkov wrote:
> From: Abhinav Kumar
>
> On a vast majority of Qualcomm chipsets DisplayPort controller can
> support several MST streams (up to 4x). To support MST these chipsets
> use up to 4 stream pixel clocks for the DisplayPort controller and
>
Reload late binding fw during runtime resume.
Signed-off-by: Badal Nilawar
Reviewed-by: Rodrigo Vivi
Signed-off-by: Rodrigo Vivi
---
drivers/gpu/drm/xe/xe_late_bind_fw.c | 2 +-
drivers/gpu/drm/xe/xe_late_bind_fw.h | 1 +
drivers/gpu/drm/xe/xe_pm.c | 4
3 files changed, 6 insert
On Wed, 3 Sep 2025 21:17:29 +0800
Zihuan Zhang wrote:
> Replace the manual cpufreq_cpu_put() with __free(put_cpufreq_policy)
> annotation for policy references. This reduces the risk of reference
> counting mistakes and aligns the code with the latest kernel style.
>
> No functional change inte
On Fri, Sep 05, 2025 at 01:46:56PM +0800, Liu Ying wrote:
> On 09/05/2025, Dmitry Baryshkov wrote:
> > On Thu, Sep 04, 2025 at 05:10:02PM +0800, Liu Ying wrote:
> >> IT6263 supports HDMI vendor specific infoframe. The infoframe header
> >> and payload are configurable via NULL packet registers. T
On Thu, 04 Sep 2025 23:01:21 +0200, Marek Vasut wrote:
> This controller can have both bridges and panels connected to it. In
> order to describe panels properly in DT, pull in dsi-controller.yaml
> and disallow only unevaluatedProperties, because the panel node is
> optional. Include example bin
Hello Svyatoslav,
On Tue, 19 Aug 2025 15:16:21 +0300
Svyatoslav Ryhel wrote:
> Add HFLIP and VFLIP from SoC only if camera sensor does not provide those
> controls.
>
> Signed-off-by: Svyatoslav Ryhel
> ---
> drivers/staging/media/tegra-video/vi.c | 9 ++---
> 1 file changed, 6 insertions
On Fri, Sep 05, 2025 at 04:55:50PM +0200, Greg Kroah-Hartman wrote:
> On Fri, Sep 05, 2025 at 04:45:34PM +0300, Imre Deak wrote:
> > On Fri, Sep 05, 2025 at 07:07:40AM +0200, Greg Kroah-Hartman wrote:
> > > On Fri, Sep 05, 2025 at 12:48:11AM +0300, Imre Deak wrote:
> > > > Hi Greg,
> > > >
> > > >
Introduce xe_late_bind_fw to enable firmware loading for the devices,
such as the fan controller, during the driver probe. Typically,
firmware for such devices are part of IFWI flash image but can be
replaced at probe after OEM tuning.
This patch binds mei late binding component to enable firmware
Search for late binding firmware binaries and populate the meta data of
firmware structures.
v2 (Daniele):
- drm_err if firmware size is more than max pay load size
- s/request_firmware/firmware_request_nowarn/ as firmware will
not be available for all possible cards
v3 (Daniele):
- init fir
From: Alexander Usyskin
Introduce a new MEI client driver to support Late Binding firmware
upload/update for Intel discrete graphics platforms.
Late Binding is a runtime firmware upload/update mechanism that allows
payloads, such as fan control and voltage regulator, to be securely
delivered and
On 01-08-2025 20:47, Rodrigo Vivi wrote:
On Thu, Jul 31, 2025 at 08:03:36PM +, Summers, Stuart wrote:
On Thu, 2025-07-10 at 11:08 -0400, Rodrigo Vivi wrote:
From: Badal Nilawar
Introduce a debug filesystem node to disable late binding fw reload
during the system or runtime resume. This
Hi Alistair,
Here is a second pass on things not directly related to bindings.
One general comment is that we will want more documentation about how
the command queue operates; without it it is a bit difficult to
understand how things run and who can read or write what. I hope we can
improve the
> On 29 Aug 2025, at 19:35, Lyude Paul wrote:
>
> We just added an export() callback that GEM objects can implement, but
> without any way of actually exporting a DmaBuf. So let's add one by
> introducing bindings for drm_gem_prime_export().
>
> Signed-off-by: Lyude Paul
> ---
> rust/kernel/
On Fri, Sep 05, 2025 at 09:59:29AM +0200, Aleksandrs Vinarskis wrote:
> Introduce common generic led consumer binding, where consumer defines
> led(s) by phandle, as opposed to trigger-source binding where the
> trigger source is defined in led itself.
>
> Add already used in some schemas 'leds' p
> On 29 Aug 2025, at 19:35, Lyude Paul wrote:
>
> This introduces an optional export() callback for GEM objects, which is
> used to implement the drm_gem_object_funcs->export function.
>
> Signed-off-by: Lyude Paul
> ---
> drivers/gpu/drm/nova/gem.rs | 1 +
> rust/kernel/drm/gem/mod.rs |
s/leds/leds-consumer.example.dtb:
camera@36 (ovti,ov02c10): Unevaluated properties are not allowed ('led-names',
'leds' were unexpected)
from schema $id:
http://devicetree.org/schemas/media/i2c/ovti,ov02e10.yaml#
doc reference errors (make refcheckdocs):
See
On Fri, Sep 05, 2025 at 04:45:34PM +0300, Imre Deak wrote:
> On Fri, Sep 05, 2025 at 07:07:40AM +0200, Greg Kroah-Hartman wrote:
> > On Fri, Sep 05, 2025 at 12:48:11AM +0300, Imre Deak wrote:
> > > Hi Greg,
> > >
> > > On Tue, Sep 02, 2025 at 03:20:41PM +0200, Greg Kroah-Hartman wrote:
> > > > 6.1
On 22.08.25 15:43, Pierre-Eric Pelloux-Prayer wrote:
> For hw engines that can't load balance jobs, entities are
> "statically" load balanced: on their first submit, they select
> the best scheduler based on its score.
> The score is made up of 2 parts:
> * the job queue depth (how much jobs are ex
On Fri, Sep 05, 2025 at 08:40:31AM +0800, Andy Yan wrote:
>
> Hello Dmitry，
>
> At 2025-09-05 08:05:06, "Dmitry Baryshkov"
> wrote:
> >On Wed, Sep 03, 2025 at 07:07:38PM +0800, Andy Yan wrote:
> >> From: Andy Yan
> >>
> >> Convert it to drm bridge driver, it will be convenient for us to
> >>
On Fri, Sep 05, 2025 at 09:32:36AM +0300, Cristian Ciocaltea wrote:
> Hi Dmitry,
>
> On 9/5/25 2:48 AM, Dmitry Baryshkov wrote:
> > On Wed, Sep 03, 2025 at 09:50:58PM +0300, Cristian Ciocaltea wrote:
> >> The first patch in the series implements the CEC capability of the
> >> Synopsys DesignWare H
[AMD Official Use Only - AMD Internal Distribution Only]
Whoops. Yep, story checks out.
This is
Reviewed-By: David Francis
From: Dan Carpenter
Sent: Thursday, September 4, 2025 2:58 PM
To: Francis, David
Cc: Deucher, Alexander ; Koenig, Christian
; David Airli
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