Applied to drm-misc-next
On 9/17/2025 5:21 PM, Lizhi Hou wrote:
>
> On 9/17/25 00:24, Karol Wachowski wrote:
>> On 9/16/2025 5:29 PM, Lizhi Hou wrote:
>>> On 9/16/25 01:25, Karol Wachowski wrote:
On 9/15/2025 10:33 PM, Lizhi Hou wrote:
> On 9/15/25 03:34, Karol Wachowski wrote:
>> Fro
Hi Dave, Sima,
getting closer to the next merge window, here's the first PR from
drm-misc-next-fixes.
Best regards
Thomas
drm-misc-next-fixes-2025-09-18:
Short summary of fixes pull:
pixpaper:
- Fix mode_valid function signature
The following changes since commit 0d9f0083f7a5a31d91d501467b499bb
On Wed, 10 Sep 2025 16:56:43 +0100
Steven Price wrote:
> On 10/09/2025 16:52, Boris Brezillon wrote:
> > On Wed, 10 Sep 2025 16:42:32 +0100
> > Steven Price wrote:
> >
> >>> +int panfrost_jm_ctx_create(struct drm_file *file,
> >>> +struct drm_panfrost_jm_ctx_create *args)
From: Aradhya Bhatia
The AM625 SoC has 2 OLDI TXes under the DSS. Add their support.
Signed-off-by: Aradhya Bhatia
Signed-off-by: Swamil Jain
---
arch/arm64/boot/dts/ti/k3-am62-main.dtsi | 47
1 file changed, 47 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am
In the tilcdc_crtc_atomic_check(), the tilcdc driver hand-crafts its own
implementation of drm_atomic_helper_check_crtc_primary_plane(). And it
does so by accessing the state pointer in drm_atomic_state->planes which
is deprecated.
Let's use the right helper here.
Reviewed-by: Ville Syrjälä
Sign
Brett A C Sheffield writes:
> On 2025-09-10 12:46, Javier Martinez Canillas wrote:
>> Brett A C Sheffield writes:
>>
>> Hello Brett,
>>
>> > This reverts commit 13d28e0c79cbf69fc6f145767af66905586c1249.
>> >
>> > Commit ee7a69aa38d8 ("fbdev: Disable sysfb device registration when
>> > removing
From: Werner Sembach
Remove unnecessary SIGNAL_TYPE_HDMI_TYPE_A check that was performed in the
drm_mode_is_420_only() case, but not in the drm_mode_is_420_also() &&
force_yuv420_output case.
Without further knowledge if YCbCr 4:2:0 is supported outside of HDMI,
there is no reason to use RGB whe
On 9/12/2025 6:42 PM, Dmitry Baryshkov wrote:
> On Thu, Sep 11, 2025 at 10:55:10PM +0800, Xiangxu Yin wrote:
>> QCS615 platform requires non-default logical-to-physical lane mapping due
>> to its unique hardware routing. Unlike the standard mapping sequence
>> <0 1 2 3>, QCS615 uses <3 2 0 1>, wh
On Sun, Aug 17, 2025 at 09:00:59PM -0500, Mario Limonciello (AMD) wrote:
> For the suspend flow PCIe bridges that have downstream devices are put into
> the appropriate low power state (D3hot or D3cold depending upon specific
> devices). For the hibernate flow, PCIe bridges with downstream devices
On 9/12/2025 7:47 PM, Dmitry Baryshkov wrote:
> On Fri, Sep 12, 2025 at 07:39:17PM +0800, Xiangxu Yin wrote:
>> Add support for SM6150 DisplayPort controller, which shares base offset
>> and configuration with SC7180. While SM6150 lacks some SC7180 features
>> (e.g. HBR3, MST), current msm_dp_des
On Wed, Sep 03, 2025 at 02:08:28PM +0530, Swamil Jain wrote:
> Hi Tomi, Maxime,
>
> On 8/27/25 15:19, Tomi Valkeinen wrote:
> > Hi,
> >
> > On 27/08/2025 12:27, Maxime Ripard wrote:
> > > On Wed, Aug 27, 2025 at 11:49:22AM +0300, Tomi Valkeinen wrote:
> > > > On 19/08/2025 22:21, Swamil Jain wrot
Applied to drm-misc-next
On 9/16/2025 5:22 PM, Lizhi Hou wrote:
> Reviewed-by: Lizhi Hou
>
> On 9/16/25 01:41, Karol Wachowski wrote:
>> Synchronize the JSM API header file with the latest 3.32.5 version
>> to reflect all changes introduced in the new firmware API
>>
>> Signed-off-by: Karol Wacho
The drm_atomic_get_crtc_state() function calls the deprecated
drm_atomic_get_existing_crtc_state() helper to get find if a crtc state
had already been allocated and was part of the given drm_atomic_state.
At the point in time where drm_atomic_get_crtc_state() can be
called (ie, during atomic_check
Applied to drm-misc-next
On 9/16/2025 5:22 PM, Lizhi Hou wrote:
> Reviewed-by: Lizhi Hou
>
> On 9/16/25 01:48, Karol Wachowski wrote:
>> Previously, aborting work could return early after engine reset or
>> resume
>> failure, skipping the necessary runtime_put cleanup leaving the device
>> with i
Applied to drm-misc-next
On 9/15/2025 7:13 PM, Lizhi Hou wrote:
> Reviewed-by: Lizhi Hou
>
> On 9/15/25 03:35, Karol Wachowski wrote:
>> From: Andrzej Kacprowski
>>
>> Remove references to firmware boot parameters that were never used
>> by any production version of device firmware.
>>
>> Signed
Hi Jason,
> Subject: Re: [PATCH v4 1/5] PCI/P2PDMA: Don't enforce ACS check for device
> functions of Intel GPUs
>
> On Mon, Sep 15, 2025 at 12:21:05AM -0700, Vivek Kasireddy wrote:
> > Typically, functions of the same PCI device (such as a PF and a VF)
> > share the same bus and have a common ro
On 16 Sep 2025, at 8:21, Balbir Singh wrote:
> Add routines to support allocation of large order zone device folios
> and helper functions for zone device folios, to check if a folio is
> device private and helpers for setting zone device data.
>
> When large folios are used, the existing page_fre
Applied to drm-misc-next
On 9/15/2025 10:38 PM, Lizhi Hou wrote:
> Reviewed-by: Lizhi Hou
>
> On 9/15/25 03:34, Karol Wachowski wrote:
>> From: Jacek Lawrynowicz
>>
>> Reduce code duplication and improve the overall readability of the
>> debugfs
>> output for job scheduling priority bands.
>>
>>
Applied to drm-misc-next
On 9/15/2025 10:36 PM, Lizhi Hou wrote:
> Reviewed-by: Lizhi Hou
>
> On 9/15/25 03:34, Karol Wachowski wrote:
>> Ensure that cmdq->db_id is reset to 0 if ivpu_jsm_register_db fails,
>> preventing potential reuse of invalid command queue with
>> unregistered doorbell.
>>
>
The Qualcomm Glymur platform comes with 4 DisplayPort controllers, which
have different offsets than all previous platforms. Describe them and add
the compatible.
Signed-off-by: Abel Vesa
---
drivers/gpu/drm/msm/dp/dp_display.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/drivers
On 09/05/2025, Liu Ying wrote:
> On 8/6/25 16:41, Liu Ying wrote:
>> devm_drm_bridge_alloc() returns ERR_PTR on failure instead of a
>> NULL pointer, so use IS_ERR() to check the returned pointer and
>> turn proper error code on failure by using PTR_ERR().
>>
>> Fixes: dbdea37add13 ("drm: bridge: A
On 2025-09-10 12:46, Javier Martinez Canillas wrote:
> Brett A C Sheffield writes:
>
> Hello Brett,
>
> > This reverts commit 13d28e0c79cbf69fc6f145767af66905586c1249.
> >
> > Commit ee7a69aa38d8 ("fbdev: Disable sysfb device registration when
> > removing conflicting FBs") was backported to 5.1
Some drivers cannot work with the current design where the connector
is embedded within the drm_writeback_connector such as Intel and
some drivers that can get it working end up adding a lot of checks
all around the code to check if it's a writeback conenctor or not,
this is due to the limitation o
On 9/8/2025 4:34 PM, Bjorn Helgaas wrote:
In subject, s|PCI: PM:|PCI/PM:| to follow previous practice.
👍
On Sun, Aug 17, 2025 at 09:00:55PM -0500, Mario Limonciello (AMD) wrote:
PCI devices can be programmed as a wakeup source from low power states
by sysfs. However when using the S4 fl
In order to implement the gem export callback, we need a type to represent
struct dma_buf. So - this commit introduces a set of stub bindings for
dma_buf. These bindings provide a ref-counted DmaBuf object, but don't
currently implement any functionality for using the DmaBuf.
Signed-off-by: Lyude
Le 11/09/2025 à 11:50, Maxime Ripard a écrit :
On Thu, Sep 11, 2025 at 10:51:06AM +0200, Miguel Gazquez wrote:
Le 10/09/2025 à 04:28, Dmitry Baryshkov a écrit :
On Tue, Sep 09, 2025 at 06:16:43PM +0200, Miguel Gazquez wrote:
From: Aradhya Bhatia
Add support for DRM connector and make th
MediaTek uses some glue logic to control frequency and power on some of
their GPUs. This is best exposed as a devfreq driver, as it saves us
from having to hardcode OPPs into the device tree, and can be extended
with additional devfreq-y logic like more clever governors that use the
hardware's GPUE
Maintain two separate RB trees per order - one for clear (zeroed) blocks
and another for dirty (uncleared) blocks. This separation improves
code clarity and makes it more obvious which tree is being searched
during allocation. It also improves scalability and efficiency when
searching for a specifi
On Tue, 2025-09-16 at 15:38 +0200, Christian König wrote:
> On 11.09.25 19:20, Thomas Hellström wrote:
> > Hi, Christian,
> >
> > On Thu, 2025-09-11 at 12:56 +0200, Christian König wrote:
> > > Gentle ping. Thomas can I get an ack on this?
> > >
> >
> > Sorry for the delay. When I initially saw
On Mon, 11 Aug 2025 06:56:04 -0400, Brian Masney wrote:
> The round_rate() clk ops is deprecated in the clk framework in favor
> of the determine_rate() clk ops, so let's go ahead and convert the
> drivers in the drm subsystem using the Coccinelle semantic patch
> posted below. I did a few minor
To properly import a dmabuf that is associated with a VF (or that
originates in a Guest VM that includes a VF), we need to know where
in LMEM the VF's allocated regions exist. Therefore, introduce a
new helper to return the object that backs the VF's regions in LMEM.
v2:
- Make the helper return t
On Wed, 3 Sep 2025 19:21:28 +0300, Dmitry Baryshkov wrote:
> Instead of disabling and then reenabling AVI infoframe, use the
> recommended way of updating it on the fly: latch current values using
> the ADV7511_REG_INFOFRAME_UPDATE register.
>
> Signed-off-by: Dmitry Baryshkov
>
> [ ... ]
Acked
From: Andri Yngvason
This includes YUV420 as well YUV444 and Auto. Auto will fallback to RGB
to keep things sane and still working.
Signed-off-by: Werner Sembach
Signed-off-by: Andri Yngvason
Signed-off-by: Marius Vlad
Co-Developed-by: Andri Yngvason
Co-Developed-by: Marius Vlad
---
.../gp
A750 GPU has similar IFPC related configurations like X1-85. Add
the IFPC QUIRK to enable IFPC feature.
Signed-off-by: Akhil P Oommen
---
drivers/gpu/drm/msm/adreno/a6xx_catalog.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/adreno/a6xx_catalog.c
b/d
The drm_atomic_connector_check() function uses the deprecated
drm_atomic_get_existing_crtc_state() helper.
This hook is called as part of the global atomic_check, thus before the
states are swapped. The existing state thus points to the new state, and
we can use drm_atomic_get_new_crtc_state() ins
The __drm_atomic_get_current_plane_state() function tries to get and
return the existing plane state, and if it doesn't exist returns the one
stored in the drm_plane->state field.
Using the current nomenclature, it tries to get the existing plane state
with an ad-hoc implementation of drm_atomic_g
Hi Rob,
On 8/21/25 11:28 AM, Rob Herring wrote:
On Wed, Aug 20, 2025 at 12:15 PM Ariel D'Alessandro
wrote:
Convert the existing text-based DT bindings for Marvell 8897/8997
(sd8897/sd8997) bluetooth devices controller to a YAML schema.
While here, bindings for "usb1286,204e" (USB interface)
There are some special registers which are accessible even when GX power
domain is collapsed during an IFPC sleep. Accessing these registers
wakes up GPU from power collapse and allow programming these registers
without additional handshake with GMU. This patch adds support for this
special registe
On Mon, Sep 8, 2025 at 4:27 AM Akhil P Oommen wrote:
>
> There are some special registers which are accessible even when GX power
> domain is collapsed during an IFPC sleep. Accessing these registers
> wakes up GPU from power collapse and allow programming these registers
> without additional hand
Hi,
Bumping to collect some reviews on this series. Thanks!
On 2025-08-20 14:24, Kaustabh Chakraborty wrote:
Synaptics' Touch and Display Driver Integration (TDDI) technology [1]
employs a single chip for both touchscreen and display capabilities.
Such designs reportedly help reducing costs and
The IOCTL interface is only used for interfacing the GPU parts of the
driver. In preparation to disabling GPU functionality split MSM IOCTLs
to a separate source file.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/Makefile| 1 +
drivers/gpu/drm/msm/msm_drv.c | 489 +
In preparation for sharing the initialization code for the color
pipeline property between pre- and post-blend color pipelines, factor
out the common initialization to a separate function.
Signed-off-by: Nícolas F. R. A. Prado
---
drivers/gpu/drm/drm_crtc.c | 44
On 9/17/25 09:31, Nícolas F. R. A. Prado wrote:
On Tue, 2025-09-16 at 20:01 -0600, Alex Hung wrote:
On 9/5/25 11:12, Louis Chauvet wrote:
Le 15/08/2025 à 05:50, Alex Hung a écrit :
The functions are to clean up color pipeline when a device driver
fails to create its color pipeline.
Sig
Factor out the common code paths from the colorop helpers so they can be
reused by the post-blend colorop helpers.
Signed-off-by: Nícolas F. R. A. Prado
---
drivers/gpu/drm/drm_colorop.c | 145 --
1 file changed, 99 insertions(+), 46 deletions(-)
diff --g
From: Prasanna Kumar T S M Sent: Wednesday,
September 17, 2025 7:03 AM
>
> The Hyper-V DRM driver is available since kernel version 5.14 and it
> provides full KMS support and fbdev emulation via the DRM fbdev helpers.
> Deprecate this driver in favor of Hyper-V DRM driver.
>
> Signed-off-by: P
In preparation to disabling GPU functionality split VM_BIND-related
functions (which are used only for the GPU) from the rest of the GEM VMA
implementation.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/Makefile |1 +
drivers/gpu/drm/msm/msm_gem_vm_bind.c | 1116 ++
In preparation for making the GPU supporting code optional split the
debugfs code into three main pieces: GEM (always enabled), KMS (only
enabled if KMS driver parts are enabled) and GPU (currently always
enabled, will become optional later).
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/m
Currently the KMS and GPU parts of the msm driver are pretty much
intertwined. It is impossible to register a KMS-only device and
registering a GPU-only DRM device requires modifying the DT. Not to
mention that binding the GPU-only device creates an interim platform
devices, which complicates IOMM
On 9/18/2025 9:01 AM, Krzysztof Kozlowski wrote:
On Thu, Sep 11, 2025 at 07:24:03PM +0800, Yongxing Mou wrote:
Document the MDSS hardware found on the Qualcomm QCS8300 platform.
Signed-off-by: Yongxing Mou
Patch v11 and still basic issues. I am very dissapointed.
This is a friendly remi
The armada atomic_check implementation uses the deprecated
drm_atomic_get_existing_crtc_state() helper.
This hook is called as part of the global atomic_check, thus before the
states are swapped. The existing state thus points to the new state, and
we can use drm_atomic_get_new_crtc_state() instea
From: Prasanna Kumar T S M Sent: Wednesday,
September 17, 2025 7:03 AM
>
> The hyperv_fb driver is deprecated in favor of Hyper-V DRM driver. Split
> the hyperv_fb entry from the hyperv drivers list, mark it obsolete.
>
> Signed-off-by: Prasanna Kumar T S M
> ---
> MAINTAINERS | 11 ++
Some of the platforms don't have onboard GPU or don't provide support
for the GPU in the drm/msm driver. Make it possible to disable the GPU
part of the driver and build the KMS-only part.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/Kconfig | 27 +--
drivers/gpu/drm/ms
While applying commit 217ed15bd399 ("drm/msm: enable separate binding of
GPU and display devices") the module param was renamed from
separate_gpu_drm to separate_gpu_kms. However param name inside
MODULE_PARAM_DESC wasn't updated to reflect the new name.
Update MODULE_PARAM_DESC to use current nam
Some drivers, like VKMS, only have access to the drm_crtc_state but not
the drm_atomic_state during composition of the output framebuffer. Store
the state of the post-blend color pipeline client cap in the
drm_crtc_state so those drivers can decide whether to look at the color
pipeline or the legac
On 09/17/2025, Maxime Ripard wrote:
> While the old and new state pointers are somewhat self-explanatory, the
> state pointer and its relation to the other two really isn't.
>
> Now that we've cleaned up everything and it isn't used in any
> modesetting path, we can document what it's still useful
Introduce colorop helper counterparts for post-blend color pipelines
that take a CRTC instead of a plane.
Signed-off-by: Nícolas F. R. A. Prado
---
drivers/gpu/drm/drm_colorop.c | 73 +++
include/drm/drm_colorop.h | 8 +
2 files changed, 81 insert
On 09/17/2025, Maxime Ripard wrote:
> The imx-dc atomic_check implementation uses the deprecated
> drm_atomic_get_existing_crtc_state() helper.
>
> This hook is called as part of the global atomic_check, thus before the
> states are swapped. The existing state thus points to the new state, and
> w
Pass the state of the post-blend color pipeline client cap to the atomic
state so that drivers can rely on it to enable color pipeline
functionality and ignore the deprecated color management CRTC
properties.
Signed-off-by: Nícolas F. R. A. Prado
---
drivers/gpu/drm/drm_atomic_uapi.c | 1 +
inc
>
>
>-Original Message-
>From: Dmitry Baryshkov
>Sent: Wednesday, September 17, 2025 9:47 PM
>To: Hermes Wu (吳佳宏)
>Cc: andrzej.ha...@intel.com; neil.armstr...@linaro.org; rf...@kernel.org;
>laurent.pinch...@ideasonboard.com; jo...@kwiboo.se; jernej.skra...@gmail.com;
>maarten.lankho...
On Wed, Sep 17, 2025 at 11:14:45AM -0400, Nick Bowler wrote:
> On Fri, Aug 29, 2025 at 03:07:14PM +0200, Thomas Zimmermann wrote:
> > The ast driver doesn't do much during shutdown. Could you please out-comment
> > the lines at either [2] xor [3] and report on either effect? These calls
> > turn of
This patch-series adds support for the Sitronix ST7920 controller, which
is a monochrome dot-matrix graphical LCD controller that has SPI and
parallel interfaces.
The st7920 driver only has support for SPI so displays using other
transport protocols are currently not supported.
* Patch #1 adds th
Convert the existing text-based DT bindings for Marvell 8897/8997
(sd8897/sd8997) bluetooth devices controller to a DT schema.
While here:
* bindings for "usb1286,204e" (USB interface) are dropped from the DT
schema definition as these are currently documented in file [0].
* DT binding users ar
Re-spin of RFC patch from ~2.5 years ago [1]. v4l2 controls for privacy
LEDs has landed, but the DT part was left out. Introduce missing
dt-bindings, and commonize 'leds' parameter. Finally, add a patch to
enable privacy-led on Lenovo Thinkpad x13s.
With recent inflow of arm64-power laptops (Snapd
On Thu Sep 4, 2025 at 4:16 AM CEST, Dave Airlie wrote:
> From: Dave Airlie
>
> Before exporting a buffer, make sure it has been populated with
> pages at least once.
NIT: I'd add the rationale of why that's needed from patch 1 to the driver
patches as well.
> Signed-off-by: Dave Airlie
Acked-b
Am 08.09.25 um 22:24 schrieb Nathan Chancellor:
When building with -Wincompatible-function-pointer-types-strict, a
warning designed to catch kernel control flow integrity (kCFI) issues at
build time, there is an instance in the new tiny DRM pixpaper driver:
drivers/gpu/drm/tiny/pixpaper.c:
Reviewed-by: Maciej Falkowski
On 9/9/2025 5:45 PM, Lizhi Hou wrote:
The unpublished smatch static checker reported a warning.
drivers/accel/amdxdna/aie2_pci.c:904 aie2_query_ctx_status_array()
warn: potential user controlled sizeof overflow
'args->num_element * args->element_size' '1-u32max(us
On Wednesday, September 10th, 2025 at 10:35, Konrad Dybcio
wrote:
>
>
> On 9/9/25 10:39 PM, Hans de Goede wrote:
>
> > Hi,
> >
> > On 9-Sep-25 6:57 PM, Aleksandrs Vinarskis wrote:
> >
> > > On Monday, September 8th, 2025 at 01:18, Aleksandrs Vinarskis
> > > a...@vinarskis.com wrote:
On Thu, 11 Sep 2025 11:08:43 +
Alice Ryhl wrote:
> On Thu, Sep 11, 2025 at 12:15:37PM +0200, Boris Brezillon wrote:
> > On Tue, 09 Sep 2025 13:36:23 +
> > Alice Ryhl wrote:
> >
> > > static void panthor_vma_init(struct panthor_vma *vma, u32 flags)
> > > @@ -2084,12 +2010,12 @@ static
Le 16/09/2025 à 12:52, Christian König a écrit :
On 16.09.25 11:46, Pierre-Eric Pelloux-Prayer wrote:
Le 16/09/2025 à 11:25, Christian König a écrit :
On 16.09.25 09:08, Pierre-Eric Pelloux-Prayer wrote:
amdgpu_ttm_copy_mem_to_mem has a single caller, make sure the out
fence is non-NULL t
On Wed, Sep 10, 2025 at 12:52:41PM +0200, Brett A C Sheffield wrote:
On 2025-09-10 12:46, Javier Martinez Canillas wrote:
Brett A C Sheffield writes:
Hello Brett,
> This reverts commit 13d28e0c79cbf69fc6f145767af66905586c1249.
>
> Commit ee7a69aa38d8 ("fbdev: Disable sysfb device registration
On 11.09.25 14:49, Balbir Singh wrote:
On 9/11/25 21:45, David Hildenbrand wrote:
On 08.09.25 02:04, Balbir Singh wrote:
Add routines to support allocation of large order zone device folios
and helper functions for zone device folios, to check if a folio is
device private and helpers for settin
[...]
VM_BUG_ON(haddr & ~HPAGE_PMD_MASK);
VM_BUG_ON_VMA(vma->vm_start > haddr, vma);
VM_BUG_ON_VMA(vma->vm_end < haddr + HPAGE_PMD_SIZE, vma);
- VM_BUG_ON(!is_pmd_migration_entry(*pmd) && !pmd_trans_huge(*pmd));
+
+ VM_WARN_ON(!is_pmd_migration_entry(*pmd) && !pmd_tr
On Tue, Sep 09, 2025 at 08:00:04AM +0300, Svyatoslav Ryhel wrote:
> вт, 9 вер. 2025 р. о 03:57 Rob Herring пише:
> >
> > On Sat, Sep 06, 2025 at 04:53:33PM +0300, Svyatoslav Ryhel wrote:
> > > The avdd-dsi-csi-supply is CSI power supply, it has nothing to do with VI,
> > > like same supply is used
The imx-dc atomic_check implementation uses the deprecated
drm_atomic_get_existing_crtc_state() helper.
This hook is called as part of the global atomic_check, thus before the
states are swapped. The existing state thus points to the new state, and
we can use drm_atomic_get_new_crtc_state() instea
> >+static int mei_lb_component_match(struct device *dev, int subcomponent,
> >+ void *data)
> >+{
> >+/*
> >+ * This function checks if requester is Intel %PCI_CLASS_DISPLAY_VGA
> or
> >+ * %PCI_CLASS_DISPLAY_OTHER device, and checks if the requester is
> t
Iker Pedrosa writes:
> The code contains several instances of chained assignments. The Linux
> kernel coding style generally favors clarity and simplicity over terse
> syntax. Refactor the code to use a separate line for each assignment.
>
> Signed-off-by: Iker Pedrosa
> ---
Reviewed-by: Javier
On Mon, Sep 15, 2025 at 07:29:08PM +0800, Xiangxu Yin wrote:
>
> On 9/12/2025 6:12 PM, Dmitry Baryshkov wrote:
> > On Thu, Sep 11, 2025 at 10:55:04PM +0800, Xiangxu Yin wrote:
> >> Introduce DisplayPort PHY configuration routines for QCS615, including
> >> aux channel setup, lane control, voltage
Hi,
On 11/09/2025 14:07, Swamil Jain wrote:
> From: Jayesh Choudhary
>
> TIDSS hardware, by itself, does not have variable max pixel clock for
> each VP. The maximum pixel clock is determined by the SoC's clocking
> architecture.
>
> The limitation that has been modeled until now comes from the
On Wed, 17 Sept 2025 at 14:23, Nicolas Frattaroli
wrote:
>
> This series introduces two new drivers to accomplish controlling the
> frequency and power of the Mali GPU on MediaTek MT8196 SoCs.
>
> The reason why it's not as straightforward as with other SoCs is that
> the MT8196 has quite complex
On Mon, Sep 15, 2025 at 04:00:40PM +0530, Harikrishna Shenoy wrote:
> From: Swapnil Jakhade
>
> Add binding changes for DSC(Display Stream Compression) in the MHDP8546
> DPI/DP bridge.
>
> Signed-off-by: Swapnil Jakhade
> Signed-off-by: Harikrishna Shenoy
> ---
> .../display/bridge/cdns,mhdp8
This series is based on "Color Pipeline API w/ VKMS" [1]. It reuses the
same concept of a color pipeline API but for the post-blend stage
instead of pre-blend, by attaching the COLOR_PIPELINE property to the
CRTC rather than a plane.
The patches in the series first implement the necessary changes
Introduce a post-blend color pipeline with the same colorop blocks as
the pre-blend color pipeline.
Signed-off-by: Nícolas F. R. A. Prado
---
drivers/gpu/drm/vkms/vkms_colorop.c | 98
drivers/gpu/drm/vkms/vkms_composer.c | 5 +-
drivers/gpu/drm/vkms/vkms_cr
Print the value of the color pipeline in the CRTC state as part of the
CRTC state print.
Signed-off-by: Nícolas F. R. A. Prado
---
drivers/gpu/drm/drm_atomic.c | 8 +---
drivers/gpu/drm/drm_colorop.c | 26 ++
include/drm/drm_colorop.h | 3 +++
3 files changed,
Allow configuring the gamma and ccorr blocks through the post-blend
color pipeline API instead of the GAMMA_LUT and CTM properties.
In order to achieve this, initialize the color pipeline property and
colorops on the CRTC based on the DDP components available in the CRTC
path. Then introduce a str
On Thu, Sep 11, 2025 at 07:24:03PM +0800, Yongxing Mou wrote:
> Document the MDSS hardware found on the Qualcomm QCS8300 platform.
>
> Signed-off-by: Yongxing Mou
Patch v11 and still basic issues. I am very dissapointed.
This is a friendly reminder during the review process.
It looks like you
In order to allow for post-blend color pipelines, colorops need to be
assigned to a crtc rather than a plane. Add a crtc to the colorop
struct to enable this. Either the plane or the crtc will be set for any
given colorop depending on whether it is part of a pre- or post-blend
color pipeline.
Sign
Now that the driver implements post-blend color pipelines, set the
driver cap so they can be used from userspace.
Signed-off-by: Nícolas F. R. A. Prado
---
drivers/gpu/drm/vkms/vkms_drv.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/vkms/vkms_drv.c b/driv
Implement the ctm_set_color_pipeline DDP component function to allow
configuring the CTM through the color pipeline API.
The color pipeline API only defines a 3x4 matrix, while the driver
currently only supports setting the coefficients for a 3x3 matrix.
However the underlying hardware does suppor
Implement the gamma_set_color_pipeline DDP component function to allow
configuring the gamma LUT through the post-blend color pipeline API.
The color pipeline API uses a 32-bit long, rather than 16-bit long, LUT,
so also update the functions to handle both cases.
Also make sure to enable or disab
On 9/17/25 08:47, Nícolas F. R. A. Prado wrote:
On Tue, 2025-09-16 at 19:54 -0600, Alex Hung wrote:
On 9/5/25 11:12, Louis Chauvet wrote:
Le 15/08/2025 à 05:50, Alex Hung a écrit :
From: Harry Wentland
This patch introduces a VKMS color pipeline that includes two
drm_colorops for name
Add a COLOR_PIPELINE property to the CRTC to allow userspace to set a
post-blend color pipeline analogously to how pre-blend color pipelines
are set on planes.
Signed-off-by: Nícolas F. R. A. Prado
---
drivers/gpu/drm/drm_atomic_uapi.c | 49 +++
drivers/gpu/dr
On Thu, Sep 11, 2025 at 07:24:02PM +0800, Yongxing Mou wrote:
> Add compatible string for the DisplayPort controller found on the
> Qualcomm QCS8300 SoC.
>
> The Qualcomm QCS8300 platform comes with one DisplayPort controller
> that supports 4 MST streams, similar to the one found on the SA8775P.
As a preparatory step for supporting post-blend color pipelines in VKMS,
rename pre_blend_color_transform() to color_transform() and make it take
the first colorop instead of a plane state, so it can be shared by both
pre- and post-blend color pipeline code paths.
Signed-off-by: Nícolas F. R. A. P
Rename the existing color pipeline helpers so they contain "pre_blend"
in the name to make them clearly distinguishable from the post-blend
helpers when they're introduced.
Signed-off-by: Nícolas F. R. A. Prado
---
drivers/gpu/drm/vkms/vkms_colorop.c | 8 +---
drivers/gpu/drm/vkms/vkms_drv.h
Export drm_colorop_cleanup() so drivers subclassing drm_colorop can
reuse this function in subclass cleanup routines.
Reviewed-by: Louis Chauvet
Signed-off-by: Nícolas F. R. A. Prado
---
drivers/gpu/drm/drm_colorop.c | 3 ++-
include/drm/drm_colorop.h | 1 +
2 files changed, 3 insertions(+)
Add a new cap that drivers can set to signal they support post-blend
color pipelines.
Signed-off-by: Nícolas F. R. A. Prado
---
drivers/gpu/drm/drm_ioctl.c | 3 +++
include/drm/drm_drv.h | 6 ++
include/uapi/drm/drm.h | 6 ++
3 files changed, 15 insertions(+)
diff --git a/dri
Introduce DRM_CLIENT_CAP_POST_BLEND_COLOR_PIPELINE which a DRM client
can set to enable the usage of post-blend color pipelines instead of the
now deprecated CRTC color management properties: "GAMMA_LUT",
"DEGAMMA_LUT" and "CTM".
Signed-off-by: Nícolas F. R. A. Prado
---
drivers/gpu/drm/drm_atom
On Wed, Sep 17, 2025 at 02:22:33PM +0200, Nicolas Frattaroli wrote:
+
> + shmem:
> +$ref: /schemas/types.yaml#/definitions/phandle
> +description: phandle to the shared memory region of the GPUEB MCU
> +
> + "#performance-domain-cells":
> +const: 0
> +
> +required:
> + - compatible
On Wed, Sep 17, 2025 at 02:22:32PM +0200, Nicolas Frattaroli wrote:
> The Mali-based GPU on the MediaTek MT8196 SoC uses a separate MCU to
> control the power and frequency of the GPU.
>
> It lets us omit the OPP tables from the device tree, as those can now be
> enumerated at runtime from the MCU
On 02.09.25 06:06, Dave Airlie wrote:
> From: Dave Airlie
>
> This adds support for adding a obj cgroup to a buffer object,
> and passing in the placement flags to make sure it's accounted
> properly.
>
> Signed-off-by: Dave Airlie
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c| 2 ++
>
1 - 100 of 307 matches
Mail list logo
