[PATCH v2 5/9] drm/i915/dsb: Send uevent to testapp.

Send uevent to testapp and set test_active flag. To align with link compliance design existing intel_dp_compliance tool will be used to get the phy request in userspace through uevent. Signed-off-by: Animesh Manna --- drivers/gpu/drm/i915/display/intel_dp.c | 10 -- 1 file changed, 8

[PATCH v2 7/9] drm/i915/dp: Register definition for DP compliance register

DP_COMP_CTL and DP_COMP_PAT register used to program DP compliance pattern. Reviewed-by: Manasi Navare Signed-off-by: Animesh Manna --- drivers/gpu/drm/i915/i915_reg.h | 20 1 file changed, 20 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm

[PATCH v2 8/9] drm/i915/dp: Update the pattern as per request

As per request from DP phy compliance test few special test pattern need to set by source. Added function to set pattern in DP_COMP_CTL register. It will be called along with other test parameters like vswing, pre-emphasis programming in atomic_commit_tail path. Signed-off-by: Animesh Manna

[PATCH v2 9/9] drm/i915/dp: [FIXME] Program vswing, pre-emphasis, test-pattern

This patch process phy compliance request by programming requested vswing, pre-emphasis and test pattern. Note: FIXME tag added as design discusion is ongoing in previous patch series. Some temporary fix added and the patch is under-development, not for review. Signed-off-by: Animesh Manna

[PATCH v2 4/9] drm/i915/dp: Preparation for DP phy compliance auto test

During DP phy compliance auto test mode, sink will request combination of different test pattern with differnt level of vswing, pre-emphasis. Function added to prepare for it. Reviewed-by: Manasi Navare Signed-off-by: Animesh Manna --- .../drm/i915/display/intel_display_types.h| 1

[PATCH v2 2/9] drm/amd/display: Fix compilation issue.

[Why]: Aligh with DP spec wanted to follow same naming convention. [How]: Changed the macro name of the dpcd address used for getting requested test-pattern. Cc: Harry Wentland Cc: Alex Deucher Signed-off-by: Animesh Manna --- drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c | 2 +- 1 file

[PATCH v2 1/9] drm/dp: get/set phy compliance pattern

revision as function argument in set_phy_pattern api. - used int for link_rate and u8 for lane_count to align with existing code. Signed-off-by: Animesh Manna --- drivers/gpu/drm/drm_dp_helper.c | 93 + include/drm/drm_dp_helper.h | 33 +++- 2 files changed

[PATCH v2 0/9] DP Phy compliance auto test

. Could not test due to unavailability of test scope, so sending as RFC again to get design feedback. v1: Redesigned the code as per review feedback from Manasi on RFC. v2: Addressed review comments from Manasi. Animesh Manna (9): drm/dp: get/set phy compliance pattern drm/amd/display: Fix

[PATCH 1/1] drm/dp: get/set phy compliance pattern

revision as function argument in set_phy_pattern api. - used int for link_rate and u8 for lane_count to align with existing code. Signed-off-by: Animesh Manna --- drivers/gpu/drm/drm_dp_helper.c | 93 + include/drm/drm_dp_helper.h | 33 +++- 2 files changed

Re: [RFC] drm/i915: adding state checker for gamma lut values

Hi, On 3/20/2019 6:11 PM, Jani Nikula wrote: On Wed, 20 Mar 2019, "Sharma, Swati2" wrote: On 15-Mar-19 3:17 PM, Nikula, Jani wrote: On Fri, 15 Mar 2019, swati2.sha...@intel.com wrote: From: Swati Sharma Added state checker to validate gamma_lut values. This reads hardware state, and

<    1   2