Re: [PATCH v4] drm/i915/pxp: Add drm_dbgs for critical PXP events.

2023-10-12 Thread Balasubrawmanian, Vivaik
On 9/19/2023 11:04 AM, Alan Previn wrote: Debugging PXP issues can't even begin without understanding precedding sequence of important events. Add drm_dbg into the most important PXP events. v3 : - move gt_dbg to after mutex block in function i915_gsc_proxy_component_bind. (Vivaik)

Re: [Intel-gfx] [Patch v1] drm/i915: Add uAPI to query micro-controller FW version

2023-09-27 Thread Balasubrawmanian, Vivaik
On 9/27/2023 2:20 AM, Tvrtko Ursulin wrote: On 27/09/2023 05:14, Balasubrawmanian, Vivaik wrote: Due to a bug in GuC firmware, Mesa can't enable by default the usage of compute engines in DG2 and newer. A new GuC firmware fixed the issue but until now there was no way for Mesa to know

[Patch v1] drm/i915: Add uAPI to query micro-controller FW version

2023-09-26 Thread Balasubrawmanian, Vivaik
Due to a bug in GuC firmware, Mesa can't enable by default the usage of compute engines in DG2 and newer. A new GuC firmware fixed the issue but until now there was no way for Mesa to know if KMD was running with the fixed GuC version or not, so this uAPI is required. It may be expanded in

Re: [PATCH v5 3/3] drm/i915/lrc: User PXP contexts requires runalone bit in lrc

2023-09-14 Thread Balasubrawmanian, Vivaik
X_TIMESTAMP] = ce->stats.runtime.last; Can we please get the bit defined in intel_engine_regs.h with a define instead of a number identification? Review completed conditional to the above fix. Reviewed-by: Balasubrawmanian, Vivaik <mailto:vivaik.balasubrawman...@intel.com>

Re: [PATCH v4 2/3] drm/i915/pxp/mtl: Update pxp-firmware packet size

2023-09-14 Thread Balasubrawmanian, Vivaik
) /* PXP-Packet size for MTL's NEW_HUC_AUTH instruction */ #define PXP43_HUC_AUTH_INOUT_SIZE (SZ_4K) Reviewed-by: Balasubrawmanian, Vivaik <mailto:vivaik.balasubrawman...@intel.com>

Re: [PATCH v5 1/3] drm/i915/pxp/mtl: Update pxp-firmware response timeout

2023-09-14 Thread Balasubrawmanian, Vivaik
(GSC_PENDING_RETRY_MAXCOUNT * GSC_PENDING_RETRY_PAUSE_MS)) #ifdef CONFIG_DRM_I915_PXP void intel_pxp_gsccs_fini(struct intel_pxp *pxp); Reviewed-by: Balasubrawmanian, Vivaik <mailto:vivaik.balasubrawman...@intel.com>

Re: [PATCH v2 1/1] drm/i915/pxp: Add drm_dbgs for critical PXP events.

2023-09-14 Thread Balasubrawmanian, Vivaik
component bound\n"); mutex_unlock(>proxy.mutex); Can we move the debug print to outside the mutex block? review complete conditional to the above fix. Reviewed-by: Balasubrawmanian, Vivaik <mailto:vivaik.balasubrawman...@intel.com> base-commit: 45460a37f9be43072b509ca6044b215648f56221

Re: [PATCH v3] drm/i915/pxp: Optimize GET_PARAM:PXP_STATUS

2023-07-05 Thread Balasubrawmanian, Vivaik
bool platform_cfg_is_bad; + /** * @kcr_base: base mmio offset for the KCR engine which is different on legacy platforms * vs newer platforms where the KCR is inside the media-tile. base-commit: 6f8963ce33be65c67e53b16fa18325e12ab76861 Reviewed-by: Balasubrawmanian, Vivaik

Re: [Intel-gfx] [PATCH] drm/i915/pxp: Optimize GET_PARAM:PXP_STATUS

2023-06-20 Thread Balasubrawmanian, Vivaik
On 6/1/2023 12:45 PM, Alan Previn wrote: After recent discussions with Mesa folks, it was requested that we optimize i915's GET_PARAM for the PXP_STATUS without changing the UAPI spec. This patch adds this additional optimizations: - If any PXP initializatoin flow failed, then ensure that