[PATCH v2] drm/meson/meson_venc: Relax the supported mode checks

Relax a bit the supported modes list by including also 480x1920 and 400x1280. This was actually tested on real hardware and it works correctly. Signed-off-by: Carlo Caione --- In particular relax the resolution checks to allow more resolutions like 480x1920 and 400x1280. --- Changes in v2

Re: [PATCH] drm/meson/meson_venc: Relax the supported mode checks

play > 1200) +       if (mode->vdisplay < 480 || mode->vdisplay > 1920)                 return MODE_BAD_VVALUE; Should these be lowered to 400 instead of 480? If you want to support 400x1280 then we need to tweak mode->hdisplay as well. I'll push a v2. -- Carlo Caione

[PATCH] drm/meson/meson_venc: Relax the supported mode checks

Relax a bit the supported modes list by including also 480x1920. This was actually tested on real hardware and it works correctly. Signed-off-by: Carlo Caione --- drm/meson/meson_venc: Add more supported resolutions. In particular relax the resolution checks to allow more resolutions like

[PATCH v4 1/2] drm/tiny: ili9486: Enable driver module autoloading

SPI devices use the spi_device_id for module autoloading even on systems using device tree. Add the spi_device_id entry to enable autoloading for the 3.5inch RPi Display (rpi-lcd-35 and piscreen). Reviewed-by: Neil Armstrong Signed-off-by: Carlo Caione --- drivers/gpu/drm/tiny/ili9486.c | 2

[PATCH v4 2/2] drm/tiny: ili9486: Do not assume 8-bit only SPI controllers

data. Align the driver to what is done in the MIPI DBI code by adjusting the transfer size to the maximum allowed by the SPI controller. Reviewed-by: Neil Armstrong Signed-off-by: Carlo Caione --- drivers/gpu/drm/tiny/ili9486.c | 13 + 1 file changed, 9 insertions(+), 4 deletions

[PATCH] drm/meson: Reduce the FIFO lines held when AFBC is not used

image. Conditionally increase the number of lines held after vsync only for SoCs using AFBC, leaving the default value for all the others. Signed-off-by: Carlo Caione --- Fix display issues for amlogic SoCs not using AFBC In 24e0d4058eff the number of lines held after VSYNC was incremented

[PATCH v4 0/2] Make ILI9486 driver working with 16-bits SPI controllers

@lists.freedesktop.org Cc: linux-ker...@vger.kernel.org Cc: linux-arm-ker...@lists.infradead.org Cc: linux-amlo...@lists.infradead.org Signed-off-by: Carlo Caione --- Changes in v4: - Removed NAK-ed patch from patchset - Link to v3: https://lore.kernel.org/r/20221116-s905x_spi_ili9486-v3-0-59c6b58cb

Re: [PATCH v3 3/3] drm/tiny: ili9486: remove conflicting framebuffers

and a new DRM-backed fb0 is created by the ILI DRM driver that can be used by fbcon, so the user can correctly see the console on the SPI display. Cheers, -- Carlo Caione

[PATCH v3 0/3] Make ILI9486 driver working with 16-bits SPI controllers

@lists.freedesktop.org Cc: linux-ker...@vger.kernel.org Cc: linux-arm-ker...@lists.infradead.org Cc: linux-amlo...@lists.infradead.org Signed-off-by: Carlo Caione --- Changes in v3: - Added trailers - Added new patch to use drm_aperture_remove_framebuffers() - Link to v2: https://lore.kernel.org/r/20221116

[PATCH v3 2/3] drm/tiny: ili9486: Do not assume 8-bit only SPI controllers

data. Align the driver to what is done in the MIPI DBI code by adjusting the transfer size to the maximum allowed by the SPI controller. Reviewed-by: Neil Armstrong Signed-off-by: Carlo Caione --- drivers/gpu/drm/tiny/ili9486.c | 13 + 1 file changed, 9 insertions(+), 4 deletions

[PATCH v3 1/3] drm/tiny: ili9486: Enable driver module autoloading

SPI devices use the spi_device_id for module autoloading even on systems using device tree. Add the spi_device_id entry to enable autoloading for the 3.5inch RPi Display (rpi-lcd-35 and piscreen). Reviewed-by: Neil Armstrong Signed-off-by: Carlo Caione --- drivers/gpu/drm/tiny/ili9486.c | 2

[PATCH v3 3/3] drm/tiny: ili9486: remove conflicting framebuffers

For platforms using simplefb / efifb, call drm_aperture_remove_framebuffers() to remove the conflicting framebuffer. Signed-off-by: Carlo Caione --- drivers/gpu/drm/tiny/ili9486.c | 5 + 1 file changed, 5 insertions(+) diff --git a/drivers/gpu/drm/tiny/ili9486.c b/drivers/gpu/drm/tiny

Re: [PATCH v2 0/2] Make ILI9486 driver working with 16-bits SPI controllers

On 21/11/2022 10:42, Carlo Caione wrote: This patchset is trying to fix problems seen on S905X boards when interfacing with an ILI9486 equipped SPI panel. Gentle ping on this 2-patch set. Cheers, -- Carlo Caione

[PATCH v2 2/2] drm/tiny: ili9486: Do not assume 8-bit only SPI controllers

data. Align the driver to what is done in the MIPI DBI code by adjusting the tranfer size to the maximum allowed by the SPI controller. Signed-off-by: Carlo Caione --- drivers/gpu/drm/tiny/ili9486.c | 13 + 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm

[PATCH v2 0/2] Make ILI9486 driver working with 16-bits SPI controllers

@lists.freedesktop.org Cc: linux-ker...@vger.kernel.org Cc: linux-arm-ker...@lists.infradead.org Cc: linux-amlo...@lists.infradead.org Signed-off-by: Carlo Caione --- Changes in v2: - Removed SPICC patch - Reworked commit message - Link to v1: https://lore.kernel.org/r/20221116-s905x_spi_ili9486-v1-0

[PATCH v2 1/2] drm/tiny: rpi-lcd-35: Enable driver module autoloading

SPI devices use the spi_device_id for module autoloading even on systems using device tree. Add the spi_device_id entry to enable autoloading for the 3.5inch RPi Display (rpi-lcd-35). Signed-off-by: Carlo Caione --- drivers/gpu/drm/tiny/ili9486.c | 1 + 1 file changed, 1 insertion(+) diff

Re: [PATCH 2/3] drm/tiny: ili9486: Do not assume 8-bit only SPI controllers

to correspond to what you're changing. Gotcha, I'll try to clarify that in the next revision. Thanks, -- Carlo Caione

Re: [PATCH 2/3] drm/tiny: ili9486: Do not assume 8-bit only SPI controllers

. -- Carlo Caione

[PATCH 1/3] drm/tiny: rpi-lcd-35: Enable driver module autoloading

SPI devices use the spi_device_id for module autoloading even on systems using device tree. Add the spi_device_id entry to enable autoloading for the 3.5inch RPi Display (rpi-lcd-35). Signed-off-by: Carlo Caione --- drivers/gpu/drm/tiny/ili9486.c | 1 + 1 file changed, 1 insertion(+) diff

Re: [PATCH 3/3] spi: meson-spicc: Lower CS between bursts

issue and the CLK line pull-up is too weak and an external pull should then be added. Alright, I'll drop this patch in the next respin if needed. Thanks, -- Carlo Caione

[PATCH 2/3] drm/tiny: ili9486: Do not assume 8-bit only SPI controllers

. Make the command function more general to not only support 8-bit only SPI controllers and support sending un-swapped data over SPI using 16 bits-per-word when dealing with pixel data. Signed-off-by: Carlo Caione --- drivers/gpu/drm/tiny/ili9486.c | 13 + 1 file changed, 9 insertions

[PATCH 0/3] Fix SPICC and ILI9486 drivers

-...@vger.kernel.org Cc: linux-arm-ker...@lists.infradead.org Cc: linux-amlo...@lists.infradead.org Signed-off-by: Carlo Caione --- Carlo Caione (3): drm/tiny: rpi-lcd-35: Enable driver module autoloading drm/tiny: ili9486: Do not assume 8-bit only SPI controllers spi: meson-spicc

Re: [PATCH 2/3] drm/tiny: ili9486: Do not assume 8-bit only SPI controllers

lready done in mipi_dbi_spi_init() by using spi_is_bpw_supported(). Cheers, -- Carlo Caione

[PATCH 3/3] spi: meson-spicc: Lower CS between bursts

transmitted. Lower the GPIO CS between bursts to avoid the clock being interpreted as valid. Signed-off-by: Carlo Caione --- drivers/spi/spi-meson-spicc.c | 6 ++ 1 file changed, 6 insertions(+) diff --git a/drivers/spi/spi-meson-spicc.c b/drivers/spi/spi-meson-spicc.c index d47f2623a60f

Re: AMD DC test results

heers, [0] https://www.spinics.net/lists/dri-devel/msg161258.html -- Carlo Caione | +44.7384.69.16.04 | Endless ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel

Re: [PATCH 4.15 0/4] Backport DC commits to fix display corruption

On Wed, Jan 3, 2018 at 5:32 PM, Harry Wentland <harry.wentl...@amd.com> wrote: > On 2018-01-03 12:11 PM, Carlo Caione wrote: >> From: Carlo Caione <ca...@endlessm.com> >> >> Hi, >> on several laptops [0] we are seeing display corruption when using multiple /

[PATCH 4.15 4/4] drm/amd/display: Change frontend/backend programming sequence

From: "Leo (Sunpeng) Li" This is a follow-up to the following change: Yongqiang Sun: Program front end first when set mode. Due to pipe-splitting features, how we handle stream enabling and disabling needs to change. In the case of pipe split disable, two planes need to be

[PATCH 4.15 2/4] drm/amd/display: Multi display synchronization logic

From: Mikita Lipski This feature synchronizes multiple displays with various timings to a display with the highest refresh rate it is enabled if edid caps flag multi_display_sync is set to one There are limitations on refresh rates allowed that can be synchronized. That

[PATCH 4.15 1/4] drm/amd/display: Adding DCN1 registers

From: Mikita Lipski Registers added to definition list that are required for multi display synchronization Signed-off-by: Mikita Lipski Reviewed-by: Tony Cheng Acked-by: Harry Wentland Signed-off-by:

[PATCH 4.15 3/4] drm/amd/display: Both timing_sync and multisync need stream_count > 1

From: Harry Wentland Previous code threw a warning about misleading indentation Signed-off-by: Harry Wentland Reviewed-by: Mikita Lipski Acked-by: Harry Wentland Signed-off-by: Alex Deucher

[PATCH 4.15 0/4] Backport DC commits to fix display corruption

From: Carlo Caione <ca...@endlessm.com> Hi, on several laptops [0] we are seeing display corruption when using multiple / external displays. We already opened an issue upstream [1]. The following 4 patches are taken from agd5f/amd-staging-drm-next and they seem able to solve the issue. Can

Re: amdgpu display corruption and hang on AMD A10-9620P

On Mon, Jun 12, 2017 at 12:24 PM, Carlo Caione <ca...@endlessm.com> wrote: > On Tue, May 9, 2017 at 7:03 PM, Deucher, Alexander > <alexander.deuc...@amd.com> wrote: >>> -Original Message- >>> From: Daniel Drake [mailto:dr...@endlessm.com] >

Re: amdgpu display corruption and hang on AMD A10-9620P

0 R09: 55f51fcd83f0 [ 80.766913] R10: 000b R11: 0246 R12: 55f51fcd9ff0 [ 80.766915] R13: 0007 R14: 7fa5261297b8 R15: 2710 [ 80.766931] Kernel Offset: 0x2280 from 0x8100 (relocation range: 0x8000-0xff