Hi all,
I have a design problem I'm not sure how to solve cleanly.
I have a board using a PTN3460 eDP => LVDS bridge and a LP8556
backlight controller.
Both of these are already supported by the kernel.
The PTN3460 has an electrical output signal (PVCGEN) that is intended
to control power to th
Hi Philipp,
thanks for the quick reply.
On Wed, 8 Jul 2020 at 10:31, Philipp Zabel wrote:
> Could this be just a panel getting confused because the pixel clock is
> disabled, or is there really an issue with the IPU? Have you tried just
> keeping clk_di_pixel enabled in ipu_di_disable(), but co