Am Donnerstag, 6. Juni 2024, 11:53:23 CEST schrieb Cristian Ciocaltea:
> On 6/5/24 5:48 PM, Heiko Stübner wrote:
> > Am Samstag, 1. Juni 2024, 15:12:35 CEST schrieb Cristian Ciocaltea:
> >> The Synopsys DesignWare HDMI 2.1 Quad-Pixel (QP) TX controller supports
> >> th
Am Mittwoch, 5. Juni 2024, 21:58:23 CEST schrieb Luis de Arquer:
> On 6/5/24 16:48, Heiko Stübner wrote:
> > Without this change, connecting to a DVI display does not work, and
> > reading the EDID ends in the "i2c read error" below.
>
> I had a lot of problems i
Am Samstag, 1. Juni 2024, 15:12:35 CEST schrieb Cristian Ciocaltea:
> The Synopsys DesignWare HDMI 2.1 Quad-Pixel (QP) TX controller supports
> the following features, among others:
>
> * Fixed Rate Link (FRL)
> * 4K@120Hz and 8K@60Hz video modes
> * Variable Refresh Rate (VRR) including Quick
Am Sonntag, 2. Juni 2024, 17:57:12 CEST schrieb Andy Shevchenko:
> Make two APIs look similar. Hence convert match_string() to be
> a 2-argument macro. In order to avoid unneeded churn, convert
> all users as well. There is no functional change intended.
>
> Signed-off-by: Andy Shevchenko
> ---
Am Mittwoch, 29. Mai 2024, 17:55:25 CEST schrieb Diederik de Haas:
> On Thursday, 25 April 2024 17:19:58 CEST Heiko Stuebner wrote:
> > On Mon, 22 Apr 2024 18:19:04 +0800, Andy Yan wrote:
> > > From: Andy Yan
> > >
> > > The port mux bits of VP2 should be defined by
> > >
Hey,
Am Dienstag, 28. Mai 2024, 00:13:59 CEST schrieb Val Packett:
> On Mon, May 27 2024 at 22:43:18 +02:00:00, Heiko Stübner
> wrote:
> > Am Montag, 27. Mai 2024, 09:16:33 CEST schrieb Val Packett:
> >> On the RK3066, there is a bit that must be cleared, otherwise
&
Hi Val,
Am Montag, 27. Mai 2024, 09:16:33 CEST schrieb Val Packett:
> On the RK3066, there is a bit that must be cleared, otherwise
> the picture does not show up on the display (at least for RGB).
>
> Fixes: f4a6de8 ("drm: rockchip: vop: add rk3066 vop definitions")
> Cc: sta...@vger.kernel.org
Hi Alex,
Am Dienstag, 21. Mai 2024, 12:58:07 CEST schrieb keith:
> Verisilicon/DC8200 display controller IP has 2 display pipes and each
> pipe support a primary plane and a cursor plane .
> In addition, there are four overlay planes as two display pipes common
> resources.
>
> The first
Am Mittwoch, 15. Mai 2024, 18:19:29 CEST schrieb Conor Dooley:
> On Tue, May 14, 2024 at 11:19:47AM -0400, Detlev Casanova wrote:
> > Add the documentation for VOP2 video ports reset clocks.
> > One reset can be set per video port.
> >
> > Signed-off-by: Detlev Casanova
>
> Are these resets
Hi Alex,
Am Donnerstag, 9. Mai 2024, 14:07:08 CEST schrieb Alex Bee:
> This series aims to add support for the DesignWare MIPI DSI controller and
> the Innoslicon D-PHY found in RK3128 SoCs. The code additions are rather
> tiny: It only need some code in the Rockchip dw-mipi-dsi glue layer for
>
lore.kernel.org/r/20230921192749.1542462-1-diand...@chromium.org
>
> Cc: "Heiko Stübner"
> Signed-off-by: Douglas Anderson
the underlying setup (rockchip-drm with dw-dsi) as well as the
change itself is similar to the ltk050h3146w variant, so I don't
see how this should behave differently ;-)
Reviewed-by: Heiko Stuebner
ed/enabled state. Even if someone was relying on the
> double-check before, that double-check is now in the core and not
> needed in individual drivers.
>
> Cc: "Heiko Stübner"
> Signed-off-by: Douglas Anderson
the underlying setup (rockchip-drm with dw-dsi) as well as t
/lore.kernel.org/r/20230901234202.566951-1-diand...@chromium.org
> [3] https://lore.kernel.org/r/20230921192749.1542462-1-diand...@chromium.org
>
> Cc: "Heiko Stübner"
> Signed-off-by: Douglas Anderson
the underlying setup (rockchip-drm with dw-dsi) as well as the
change itself
ed/enabled state. Even if someone was relying on the
> double-check before, that double-check is now in the core and not
> needed in individual drivers.
>
> Cc: "Heiko Stübner"
> Signed-off-by: Douglas Anderson
the underlying setup (rockchip-drm with dw-dsi) as well as t
lore.kernel.org/r/20230921192749.1542462-1-diand...@chromium.org
>
> Cc: Brian Norris
> Cc: Chris Zhong
> Cc: Nickey Yang
> Cc: "Heiko Stübner"
> Signed-off-by: Douglas Anderson
the underlying setup (rockchip-drm with dw-dsi) as well as the
change itself i
ed/enabled state. Even if someone was relying on the
> double-check before, that double-check is now in the core and not
> needed in individual drivers.
>
> Cc: Brian Norris
> Cc: Chris Zhong
> Cc: Nickey Yang
> Cc: "Heiko Stübner"
> Signed-off-by: Douglas A
lore.kernel.org/r/20230921192749.1542462-1-diand...@chromium.org
>
> Cc: Chris Zhong
> Cc: Lin Huang
> Cc: Brian Norris
> Cc: "Heiko Stübner"
> Signed-off-by: Douglas Anderson
the underlying setup (rockchip-drm with dw-dsi) as well as the
change itself is similar to
ed/enabled state. Even if someone was relying on the
> double-check before, that double-check is now in the core and not
> needed in individual drivers.
>
> Cc: Chris Zhong
> Cc: Lin Huang
> Cc: Brian Norris
> Cc: "Heiko Stübner"
> Signed-off-by: Douglas A
ed/enabled state. Even if someone was relying on the
> double-check before, that double-check is now in the core and not
> needed in individual drivers.
>
> Cc: "Heiko Stübner"
> Cc: Quentin Schulz
> Signed-off-by: Douglas Anderson
Reviewed-by: Heiko Stuebner
on a
/lore.kernel.org/r/20230901234202.566951-1-diand...@chromium.org
> [3] https://lore.kernel.org/r/20230921192749.1542462-1-diand...@chromium.org
>
> Cc: "Heiko Stübner"
> Cc: Quentin Schulz
> Signed-off-by: Douglas Anderson
On a rk3588-tiger with WIP DSI patches and this display
Am Freitag, 3. Mai 2024, 14:57:03 CEST schrieb Quentin Schulz:
> Hi Heiko,
>
> On 4/25/24 9:55 PM, Heiko Stuebner wrote:
> > From: Heiko Stuebner
> >
> > The rk3588 VOP2 has 4 video-ports, yet the driver currently only
> > configures the first 3, as used on the rk3568.
> >
>
> I'm wondering
Am Montag, 22. April 2024, 12:19:05 CEST schrieb Andy Yan:
> From: Andy Yan
>
> The port mux of VP2 should be RK3568_OVL_PORT_SET__PORT2_MUX.
>
> Fixes: 604be85547ce ("drm/rockchip: Add VOP2 driver")
> Signed-off-by: Andy Yan
on a rk3588 with VP3 connected to a DSI display
Tested-by: Heiko
Am Dienstag, 26. März 2024, 18:50:37 CET schrieb Krzysztof Kozlowski:
> On 26/03/2024 18:50, Krzysztof Kozlowski wrote:
> > On 26/03/2024 18:28, Heiko Stuebner wrote:
> >> The #sound-dai-cells DT property is required to describe link between
> >> the HDMI IP block and the SoC's audio subsystem.
>
Am Sonntag, 18. Februar 2024, 22:41:14 CET schrieb Boris Brezillon:
> Hello,
>
> This is the 5th version of the kernel driver for Mali CSF-based GPUs,
> and, unless someone has good reasons to block the merging of this
> driver, I expect it to be the last one (the gallium driver is now
> in a
Am Donnerstag, 22. Februar 2024, 19:14:17 CET schrieb Maxime Ripard:
> The new HDMI connector infrastructure allows to remove some boilerplate,
> especially to generate infoframes. Let's switch to it.
>
> Signed-off-by: Maxime Ripard
Reviewed-by: Heiko Stuebner
> ---
>
Am Donnerstag, 15. Februar 2024, 18:06:06 CET schrieb Conor Dooley:
> On Thu, Feb 15, 2024 at 10:05:14AM +0100, Heiko Stuebner wrote:
> > From: Heiko Stuebner
> >
> > Add the compatible for the ltk101b4029w panel, that is really similar
> > to the ltk500hd1829.
>
> Please mention what makes the
Am Dienstag, 30. Januar 2024, 20:36:22 CET schrieb Manuel Traut:
> Hi Dang,
>
> On Sat, Jan 27, 2024 at 06:35:50PM +0700, Dang Huynh wrote:
> > Hi Manuel,
> >
> > Since the BOE patches have been accepted to next, you do not need to
> > include
> > it in this patch series.
>
> sorry, I thought
Am Montag, 22. Januar 2024, 17:30:42 CET schrieb Boris Brezillon:
> This is the last piece missing to expose the driver to the outside
> world.
>
> This is basically a wrapper between the ioctls and the other logical
> blocks.
>
> v4:
> - Add an ioctl to let the UMD query the VM state
> - Fix
Am Montag, 22. Januar 2024, 17:30:31 CET schrieb Boris Brezillon:
> Hello,
>
> This is the 4th version of the kernel driver for Mali CSF-based GPUs.
>
> A branch based on drm-misc-next and containing all the dependencies
> that are not yet available in drm-misc-next here[1], and another [2]
>
Am Mittwoch, 17. Januar 2024, 14:47:48 CET schrieb Maxime Ripard:
> On Wed, Jan 17, 2024 at 10:52:04AM +0100, Heiko Stübner wrote:
> > Hi Maxime,
> >
> > Am Mittwoch, 17. Januar 2024, 10:46:57 CET schrieb Maxime Ripard:
> > > On Mon, 15 Jan 2024 10:24:35 +0100,
Hi Maxime,
Am Mittwoch, 17. Januar 2024, 10:46:57 CET schrieb Maxime Ripard:
> On Mon, 15 Jan 2024 10:24:35 +0100, Alex Bee wrote:
> > Commit d3e040f450ec ("drm/rockchip: inno_hdmi: Get rid of mode_set")
> > started using drm_atomic_get_new_connector_state and
> > drm_atomic_get_new_crtc_state
Am Montag, 15. Januar 2024, 09:45:10 CET schrieb neil.armstr...@linaro.org:
> Hi,
>
> On 12/01/2024 19:07, Farouk Bouabid wrote:
> > dw-mipi-dsi based drivers such as dw-mipi-dsi-rockchip or dw_mipi_dsi-stm
> > depend on dw_mipi_dsi_probe() to initialize the dw_mipi_dsi driver
> > structure (dmd
Am Freitag, 5. Januar 2024, 18:33:34 CET schrieb Alex Bee:
>
> Am 05.01.24 um 18:02 schrieb Heiko Stübner:
> > Am Freitag, 5. Januar 2024, 17:47:21 CET schrieb Alex Bee:
> >> Hi Heiko,
> >>
> >>
> >> Am 04.01.24 um 09:14 schrieb Heiko Stuebner:
&g
Am Freitag, 5. Januar 2024, 17:47:21 CET schrieb Alex Bee:
> Hi Heiko,
>
>
> Am 04.01.24 um 09:14 schrieb Heiko Stuebner:
> > On Fri, 22 Dec 2023 18:41:51 +0100, Alex Bee wrote:
> >> This is version 4 of my series that aims to add support for the display
> >> controller (VOP) and the HDMI
Hi,
Am Freitag, 5. Januar 2024, 10:04:55 CET schrieb Andy Yan:
> On 1/4/24 23:58, Heiko Stübner wrote:
> > Am Donnerstag, 4. Januar 2024, 15:39:50 CET schrieb Cristian Ciocaltea:
> >> Commit 5a028e8f062f ("drm/rockchip: vop2: Add support for rk3588")
> >>
Am Donnerstag, 4. Januar 2024, 15:39:49 CET schrieb Cristian Ciocaltea:
> The rockchip_drm_fb.h header contains just a single function which is
> not directly used by the VOP2 driver. Drop the unnecessary include.
>
> Signed-off-by: Cristian Ciocaltea
applied to drm-misc-next-fixes as
commit
Hi Christian, Andy,
Am Donnerstag, 4. Januar 2024, 15:39:50 CET schrieb Cristian Ciocaltea:
> Commit 5a028e8f062f ("drm/rockchip: vop2: Add support for rk3588")
> introduced a variable which ended up being unused. Remove it.
>
> rockchip_drm_vop2.c:1688:23: warning: variable ‘if_dclk_rate’ set
Am Freitag, 22. Dezember 2023, 18:41:52 CET schrieb Alex Bee:
> The integration for this SoC is different from the currently existing: It
> needs it's PHY's reference clock rate to calculate the DDC bus frequency
> correctly. The controller is also part of a powerdomain, so this gets added
> as an
Am Freitag, 22. Dezember 2023, 12:05:45 CET schrieb Manuel Traut:
> devicetree checks show some warnings:
>
> video-codec@fdea0400: 'interrupt-names' is a required property
> from schema $id: http://devicetree.org/schemas/media/rockchip-vpu.yaml#
>
> hdmi@fe0a: Unevaluated properties are not
Hi Andy,
Am Samstag, 9. Dezember 2023, 02:26:25 CET schrieb Andy Yan:
> Hi Heiko:
>
> On 12/9/23 00:29, Heiko Stübner wrote:
> > Am Donnerstag, 7. Dezember 2023, 09:02:35 CET schrieb Andy Yan:
> >> From: Andy Yan
> >>
> >> Add a Rockchip RK3588 co
Am Donnerstag, 7. Dezember 2023, 09:02:35 CET schrieb Andy Yan:
> From: Andy Yan
>
> Add a Rockchip RK3588 compatible
>
> Signed-off-by: Andy Yan
Reviewed-by: Heiko Stuebner
In the next iteration, please split this out into a separate patch and send
it to the iommu+dt maintainers.
Hi Andy,
Am Donnerstag, 7. Dezember 2023, 09:02:47 CET schrieb Andy Yan:
> From: Andy Yan
>
> Add vop dt node for rk3588.
>
> Signed-off-by: Andy Yan
> ---
>
> (no changes since v1)
>
> arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 96 +++
> 1 file changed, 96
Hi Andy,
Am Donnerstag, 7. Dezember 2023, 08:59:06 CET schrieb Andy Yan:
> From: Andy Yan
>
> This patch sets aims at enable the VOP2 support on rk3588.
>
> Main feature of VOP2 on rk3588:
> Four video ports:
> VP0 Max 4096x2160
> VP1 Max 4096x2160
> VP2 Max 4096x2160
> VP3 Max 2048x1080
>
>
Am Dienstag, 5. Dezember 2023, 09:28:24 CET schrieb Neil Armstrong:
> On 05/12/2023 09:26, Neil Armstrong wrote:
> > Hi,
> >
> > On Mon, 04 Dec 2023 12:57:09 -0600, Chris Morgan wrote:
> >> From: Chris Morgan
> >>
> >> Add support for the Rockchip RK3566 based Powkiddy X55 handheld gaming
> >>
Hi Alex,
Am Sonntag, 3. Dezember 2023, 17:05:47 CET schrieb Alex Bee:
> Am 02.12.23 um 18:46 schrieb Heiko Stübner:
> > Am Samstag, 2. Dezember 2023, 17:36:15 CET schrieb Alex Bee:
> >> Am 02.12.23 um 16:51 schrieb Heiko Stübner:
> >>> Am Samstag, 2. Dezember 2023,
Hi Alex,
Am Samstag, 2. Dezember 2023, 17:36:15 CET schrieb Alex Bee:
> Am 02.12.23 um 16:51 schrieb Heiko Stübner:
> > Am Samstag, 2. Dezember 2023, 13:51:41 CET schrieb Alex Bee:
> >> Add power controller and qos nodes for RK3128 in order to use
> >> them as power
Hi Alex,
Am Samstag, 2. Dezember 2023, 13:51:41 CET schrieb Alex Bee:
> Add power controller and qos nodes for RK3128 in order to use
> them as powerdomains.
does the power-domain controller work with the incomplete set of
pm-domains too?
What I have in mind is
- adding the power-controller
Hi Andy,
Am Donnerstag, 30. November 2023, 13:25:00 CET schrieb Andy Yan:
> From: Andy Yan
>
> Add a Rockchip RK3588 compatible
>
> Signed-off-by: Andy Yan
> ---
>
> (no changes since v1)
>
> Documentation/devicetree/bindings/iommu/rockchip,iommu.yaml | 1 +
> 1 file changed, 1
Hi Andy,
Am Dienstag, 28. November 2023, 10:32:55 CET schrieb Andy Yan:
> On 11/27/23 23:29, Heiko Stübner wrote:
> > Am Mittwoch, 22. November 2023, 13:55:44 CET schrieb Andy Yan:
> >> From: Andy Yan
> >>
> >> VOP2 on rk3588:
> >>
> >>
Am Dienstag, 28. November 2023, 09:03:46 CET schrieb Andy Yan:
> Hi Heiko:
>
> On 11/27/23 23:02, Heiko Stübner wrote:
> > Am Mittwoch, 22. November 2023, 13:54:25 CET schrieb Andy Yan:
> >> From: Andy Yan
> >>
> >> The enable bit and transform offset
Hi Andy,
Am Mittwoch, 22. November 2023, 13:55:44 CET schrieb Andy Yan:
> From: Andy Yan
>
> VOP2 on rk3588:
>
> Four video ports:
> VP0 Max 4096x2160
> VP1 Max 4096x2160
> VP2 Max 4096x2160
> VP3 Max 2048x1080
>
> 4 4K Cluster windows with AFBC/line RGB and AFBC-only YUV support
> 4 4K
Am Mittwoch, 22. November 2023, 13:54:25 CET schrieb Andy Yan:
> From: Andy Yan
>
> The enable bit and transform offset of cluster windows should be
> cleared when it work at linear mode, or we may have a iommu fault
> issue.
>
> Signed-off-by: Andy Yan
I guess same here?
Fixes: 604be85547ce
Am Mittwoch, 22. November 2023, 13:54:13 CET schrieb Andy Yan:
> From: Andy Yan
>
> At first we thought the half_block_en bit in AFBCD_CTRL register
> only work in afbc mode. But the fact is that it control the line
> buffer in all mode(afbc/tile/line), so we need configure it in
> all case.
>
Hi Johan,
Am Donnerstag, 23. November 2023, 13:54:28 CET schrieb Johan Jonker:
>
> On 11/20/23 18:06, Heiko Stuebner wrote:
> > Hi Johan,
> >
> > Am Donnerstag, 2. November 2023, 14:42:19 CET schrieb Johan Jonker:
> >> The Rk3066 hdmi output format is hard coded to RGB. Remove
> >> all useless
Am Mittwoch, 15. November 2023, 03:02:42 CET schrieb Andy Yan:
> Hi Heiko:
>
> On 11/15/23 07:34, Heiko Stübner wrote:
> > Hi Andy,
> >
> > Am Dienstag, 14. November 2023, 12:28:55 CET schrieb Andy Yan:
> >> From: Andy Yan
> >>
> >> VO
Hi Andy,
Am Dienstag, 14. November 2023, 12:28:55 CET schrieb Andy Yan:
> From: Andy Yan
>
> VOP2 on rk3588:
>
> Four video ports:
> VP0 Max 4096x2160
> VP1 Max 4096x2160
> VP2 Max 4096x2160
> VP3 Max 2048x1080
>
> 4 4K Cluster windows with AFBC/line RGB and AFBC-only YUV support
> 4 4K
Am Dienstag, 14. November 2023, 12:28:41 CET schrieb Andy Yan:
> From: Andy Yan
>
> The vop2 on rk3588 is similar to which on rk356x
> but with 4 video outputs and need to reference
> more grf modules.
>
> Signed-off-by: Andy Yan
> ---
>
> .../display/rockchip/rockchip-vop2.yaml | 25
Am Montag, 13. November 2023, 12:23:25 CET schrieb Heiner Kallweit:
> After removal of the legacy EEPROM driver and I2C_CLASS_DDC support in
> olpc_dcon there's no i2c client driver left supporting I2C_CLASS_DDC.
> Class-based device auto-detection is a legacy mechanism and shouldn't
> be used in
Hi Chris,
Am Freitag, 20. Oktober 2023, 17:03:08 CEST schrieb Chris Morgan:
> On Thu, Oct 19, 2023 at 07:45:17PM +0200, Heiko Stübner wrote:
> > Hey Chris,
> >
> > Am Donnerstag, 19. Oktober 2023, 16:43:56 CEST schrieb Chris Morgan:
> > > On Thu, Oct 19, 2023
Hey Chris,
Am Donnerstag, 19. Oktober 2023, 16:43:56 CEST schrieb Chris Morgan:
> On Thu, Oct 19, 2023 at 11:21:47AM +0200, Krzysztof Kozlowski wrote:
> > On 18/10/2023 18:18, Chris Morgan wrote:
> > > From: Chris Morgan
> > >
> > > The Powkiddy RK2023 is a handheld gaming device made by
Am Donnerstag, 19. Oktober 2023, 11:21:47 CEST schrieb Krzysztof Kozlowski:
> On 18/10/2023 18:18, Chris Morgan wrote:
> > From: Chris Morgan
> >
> > The Powkiddy RK2023 is a handheld gaming device made by Powkiddy and
> > powered by the Rockchip RK3566 SoC.
> >
> > Signed-off-by: Chris Morgan
Hi,
Am Dienstag, 17. Oktober 2023, 12:15:11 CEST schrieb Ying Liu:
> On Tuesday, October 17, 2023 2:15 AM, Heiko Stübner wrote:
> > Am Montag, 17. Juli 2023, 08:18:27 CEST schrieb Liu Ying:
> > > To get better accuration, use pixel clock rate to calculate lbcc instead
> &
Hi Chris,
Am Montag, 16. Oktober 2023, 20:26:58 CEST schrieb Chris Morgan:
> On Mon, Oct 16, 2023 at 08:18:25PM +0200, Heiko Stübner wrote:
> > Hi,
> >
> > Am Montag, 16. Oktober 2023, 18:07:52 CEST schrieb Dragan Simic:
> > > On 2023-10-16 17:52, Chris Morgan wrote
Hi,
Am Montag, 16. Oktober 2023, 18:07:52 CEST schrieb Dragan Simic:
> On 2023-10-16 17:52, Chris Morgan wrote:
> > Confirmed that those pending patches DO fix the panel suspend issues.
> > Thank you.
>
> Awesome, that's great to hear! Perhaps a "Tested-by" in the original
> LKML thread [1]
Hi,
Am Montag, 17. Juli 2023, 08:18:27 CEST schrieb Liu Ying:
> To get better accuration, use pixel clock rate to calculate lbcc instead of
> lane_mbps since the pixel clock rate is in KHz while lane_mbps is in MHz.
> Without this, distorted image can be seen on a HDMI monitor connected with
>
Am Dienstag, 10. Oktober 2023, 18:54:11 CEST schrieb Heiko Stuebner:
> On Mon, 31 Jan 2022 17:47:21 +0100, quentin.sch...@theobroma-systems.com
> wrote:
> > From: Quentin Schulz
> >
> > To prepare for a new display to be supported by this driver which has a
> > slightly different set of DSI
Hi Jonas,
Am Samstag, 12. August 2023, 16:18:05 CEST schrieb Jonas Karlman:
> Please consider reviewing and merging this series [2], and also [3].
during the last months my testfarm aquired some issues, I'm still
working on fixing, so my testing is way limited right now.
> drm/rockchip: Fix
Am Samstag, 17. Juni 2023, 12:12:17 CEST schrieb Krzysztof Kozlowski:
> On 14/06/2023 21:08, Maximilian Weigand wrote:
> > From: Maximilian Weigand
> >
> > Add 'ti,boost_use_1mhz' to switch between 500 kHz and 1 MHz boost
> > converter switching frequency, and add 'ti,boost_frequency_shift' to
>
Am Mittwoch, 7. Juni 2023, 00:37:53 CEST schrieb Conor Dooley:
> On Wed, Jun 07, 2023 at 12:22:33AM +0200, Heiko Stübner wrote:
> > Am Dienstag, 6. Juni 2023, 20:41:17 CEST schrieb Shengyu Qu:
> > > > On Fri, Jun 02, 2023 at 03:40:35PM +0800, Keith Zhao wrote:
> > &
Am Dienstag, 6. Juni 2023, 20:41:17 CEST schrieb Shengyu Qu:
> Hi Conor,
>
> > Hey Keith,
> >
> > On Fri, Jun 02, 2023 at 03:40:35PM +0800, Keith Zhao wrote:
> >> Add bindings for JH7110 display subsystem which
> >> has a display controller verisilicon dc8200
> >> and an HDMI interface.
> >>
> >>
Am Sonntag, 7. Mai 2023, 18:26:01 CEST schrieb Uwe Kleine-König:
> The .remove() callback for a platform driver returns an int which makes
> many driver authors wrongly assume it's possible to do error handling by
> returning an error code. However the value returned is (mostly) ignored
> and this
Hi Sascha,
Am Montag, 17. April 2023, 11:42:15 CEST schrieb Sascha Hauer:
> During a suspend/resume cycle the VO power domain will be disabled and
> the VOP2 registers will reset to their default values. After that the
> cached register values will be out of sync and the read/modify/write
>
Am Donnerstag, 30. März 2023, 17:39:48 CEST schrieb Jani Nikula:
> Prefer the parsed results for has_audio in display info over calling
> drm_detect_monitor_audio().
>
> Cc: Sandy Huang
> Cc: Heiko Stübner
> Signed-off-by: Jani Nikula
Acked-by: Heiko Stuebner
> -
Am Donnerstag, 30. März 2023, 17:39:47 CEST schrieb Jani Nikula:
> Calling drm_connector_update_edid_property() should be done
> unconditionally instead of depending on the number of modes added. Also
> match the call order in inno_hdmi and rk3066_hdmi.
>
> Cc: Sandy Huang
>
Hi Sascha,
Am Donnerstag, 16. Februar 2023, 11:24:44 CET schrieb Sascha Hauer:
> The different VOP variants support different maximum resolutions. Reject
> resolutions that are not supported by a specific variant.
>
> This hasn't been a problem in the upstream driver so far as 1920x1080
> has
Hi,
Am Freitag, 3. Februar 2023, 20:02:54 CET schrieb Johan Jonker:
>
> On 2/3/23 19:21, Rob Herring wrote:
> > On Thu, Dec 22, 2022 at 03:22:14PM +0100, Johan Jonker wrote:
> >> Convert rockchip-lvds.txt to YAML.
> >>
> >> Changed:
> >> Add power-domains property.
> >> Requirements between
Hi Linus,
Am Samstag, 3. Dezember 2022, 10:03:42 CET schrieb Linus Walleij:
> On Tue, Nov 29, 2022 at 6:29 PM Chris Morgan wrote:
>
> > From: Chris Morgan
> >
> > Support Samsung AMS495QA01 panel as found on the Anbernic RG503. Note
> > This panel receives video signals via DSI, however it
> diff --git a/drivers/pwm/pwm-rockchip.c b/drivers/pwm/pwm-rockchip.c
> index a5af859217c1..3ec7d1756903 100644
> --- a/drivers/pwm/pwm-rockchip.c
> +++ b/drivers/pwm/pwm-rockchip.c
> @@ -57,9 +57,9 @@ static inline struct rockchip_pwm_chip
> *to_rockchip_pwm_chip(struct pwm_chip *c)
>
Am Dienstag, 6. September 2022, 19:48:22 CEST schrieb Chris Morgan:
> From: Chris Morgan
>
> Add support for the Rockchip RK3568 DSI-DPHY. Registers were taken from
> the BSP kernel driver and wherever possible cross referenced with the
> TRM.
With the amount of refactoring done below, I'd
Am Dienstag, 6. September 2022, 19:48:20 CEST schrieb Chris Morgan:
> From: Chris Morgan
>
> Add a compatible string for the rk3568 dsi-dphy.
>
> Signed-off-by: Chris Morgan
Reviewed-by: Heiko Stuebner
> ---
> .../devicetree/bindings/phy/rockchip,px30-dsi-dphy.yaml | 1 +
> 1 file
Am Donnerstag, 1. September 2022, 14:47:11 CEST schrieb Jani Nikula:
> Prefer the parsed results for has_audio in display info over calling
> drm_detect_monitor_audio().
>
> Cc: Sandy Huang
> Cc: Heiko Stübner
> Signed-off-by: Jani Nikula
Reviewed-by: Heiko Stuebner
> -
Am Donnerstag, 1. September 2022, 14:47:10 CEST schrieb Jani Nikula:
> Calling drm_connector_update_edid_property() should be done
> unconditionally instead of depending on the number of modes added. Also
> match the call order in inno_hdmi and rk3066_hdmi.
>
> Cc: Sandy Hua
Am Dienstag, 28. Juni 2022, 17:00:56 CEST schrieb Heiko Stübner:
> Hi Conor,
>
> Am Montag, 27. Juni 2022, 21:39:49 CEST schrieb Conor Dooley:
> > From: Conor Dooley
> >
> > A dt-schema binding for the Ilitek ili9341 was created as
> > panel/ilitek,ili9341.yam
Hi Conor,
Am Montag, 27. Juni 2022, 21:39:49 CEST schrieb Conor Dooley:
> From: Conor Dooley
>
> A dt-schema binding for the Ilitek ili9341 was created as
> panel/ilitek,ili9341.yaml but the txt binding was ignored in the
> process. Move the remaining items in the txt binding to the yaml one &
Am Dienstag, 17. Mai 2022, 11:02:06 CEST schrieb Krzysztof Kozlowski:
> On 14/05/2022 00:26, Heiko Stuebner wrote:
> > Hi Rob, Krzysztof,
> >
> > Am Mittwoch, 11. Mai 2022, 10:21:07 CEST schrieb Sascha Hauer:
> >> The VOP2 driver relies on reg-names properties, but these are not
> >> documented.
Hi Sascha,
Am Dienstag, 10. Mai 2022, 09:09:12 CEST schrieb Sascha Hauer:
> The VOP2 driver relies on reg-names properties, but these are not
> documented. Add the missing documentation, make reg-names mandatory
> and increase minItems to 2 as always both register spaces are needed.
>
>
Am Montag, 9. Mai 2022, 11:55:59 CEST schrieb Sascha Hauer:
> On Mon, May 09, 2022 at 10:44:17AM +0200, Heiko Stübner wrote:
> > Hi Sascha,
> >
> > Am Montag, 9. Mai 2022, 10:37:35 CEST schrieb Sascha Hauer:
> > > This is not the full series,
Hi Sascha,
Am Montag, 9. Mai 2022, 10:37:35 CEST schrieb Sascha Hauer:
> This is not the full series, if you want that, look for v11.
>
> This series merely has a last-minute change: The VOP2 driver used
> platform_get_resource_byname() to get its registers, but the reg-names
> property hasn't
Am Donnerstag, 5. Mai 2022, 08:41:31 CEST schrieb Sascha Hauer:
> On Thu, May 05, 2022 at 02:28:24AM +0200, Heiko Stübner wrote:
> > Am Freitag, 22. April 2022, 09:28:33 CEST schrieb Sascha Hauer:
> > > The VOP2 is the display output controller on the RK3568. Add the node
> &
Am Freitag, 22. April 2022, 09:28:33 CEST schrieb Sascha Hauer:
> The VOP2 is the display output controller on the RK3568. Add the node
> for it to the dtsi file along with the required display-subsystem node
> and the iommu node.
>
> Signed-off-by: Sascha Hauer
> Acked-by: Rob Herring
> ---
>
Am Freitag, 22. April 2022, 09:28:28 CEST schrieb Sascha Hauer:
> From: Douglas Anderson
>
> The previous tables for mpll_cfg and curr_ctrl were created using the
> 20-pages of example settings provided by the PHY vendor. Those
> example settings weren't particularly dense, so there were places
Hi,
looks like I wasn't in the original recipient list, so only got Nick's
answer.
Am Mittwoch, 9. März 2022, 00:10:31 CET schrieb Nick Desaulniers:
> On Mon, Mar 7, 2022 at 10:17 AM Colin Ian King wrote:
> >
> > The pointer connector is being assigned a value that is never read,
> > it is
Am Donnerstag, 17. Februar 2022, 14:58:23 CET schrieb Sascha Hauer:
> Hi Andy,
>
> Please trim the context in your answers to the relevant parts, it makes
> it easier to find the things you said.
>
> On Thu, Feb 17, 2022 at 08:00:11PM +0800, Andy Yan wrote:
> > Hi Sascha:
> >
> > > +
> > > +
Am Montag, 14. Februar 2022, 07:08:09 CET schrieb Yong Wu:
> Use the common compare helper from component.
>
> Cc: Sandy Huang
> Cc: "Heiko St¨¹bner"
> Cc: linux-rockc...@lists.infradead.org
> Signed-off-by: Yong Wu
Acked-by: Heiko Stuebner
> ---
>
Am Donnerstag, 10. Februar 2022, 14:37:59 CET schrieb Sascha Hauer:
> On Thu, Feb 10, 2022 at 02:15:17PM +0100, Johan Jonker wrote:
> >
> >
> > On 2/10/22 12:47, Sascha Hauer wrote:
> > > On Thu, Feb 10, 2022 at 01:10:32AM +0100, Johan Jonker wrote:
> > >> Hi Sascha,
> > >>
> > >> Something with
Hi Michael,
Am Mittwoch, 9. Februar 2022, 16:46:28 CET schrieb Michael Riesch:
> Hi Rob,
>
> On 2/9/22 16:35, Rob Herring wrote:
> > On Wed, 09 Feb 2022 09:51:06 +0100, Michael Riesch wrote:
> >> From: Alex Bee
> >>
> >> The Bifrost GPU in Rockchip RK356x SoCs has a core and a bus clock.
> >>
Am Mittwoch, 9. Februar 2022, 10:53:39 CET schrieb Sascha Hauer:
> From: Douglas Anderson
>
> The previous tables for mpll_cfg and curr_ctrl were created using the
> 20-pages of example settings provided by the PHY vendor. Those
> example settings weren't particularly dense, so there were
Am Mittwoch, 9. Februar 2022, 10:53:29 CET schrieb Sascha Hauer:
> The driver returns an error when devm_phy_optional_get() fails leaving
> the previously enabled clock turned on. Change order and enable the
> clock only after the phy has been acquired.
>
> Signed-off-by: Sascha Hauer
just a
Am Montag, 31. Januar 2022, 09:10:42 CET schrieb Sascha Hauer:
> On Sat, Jan 29, 2022 at 06:48:13PM +0100, Heiko Stübner wrote:
> > Am Mittwoch, 26. Januar 2022, 15:55:46 CET schrieb Sascha Hauer:
> > > The pixel clocks dclk_vop[012] can be clocked from hpll, vpll, gpll o
Am Montag, 31. Januar 2022, 17:54:39 CET schrieb
quentin.sch...@theobroma-systems.com:
> From: Quentin Schulz
>
> Heiko does not work at Theobroma Systems anymore and the boards using
> those panels are downstream, maintained internally by the company, so
> let's relieve Heiko of maintainership
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