Hello Dmitry,
On 18/06/24 15:45, Dmitry Baryshkov wrote:
On Tue, 18 Jun 2024 at 12:56, Jayesh Choudhary wrote:
Hello Dmitry,
Thanks for the review.
On 18/06/24 14:29, Dmitry Baryshkov wrote:
On Tue, Jun 18, 2024 at 01:44:17PM GMT, Jayesh Choudhary wrote:
Add the atomic_check hook to
Hello Dmitry,
On 18/06/24 14:33, Dmitry Baryshkov wrote:
On Tue, Jun 18, 2024 at 01:44:18PM GMT, Jayesh Choudhary wrote:
During code inspection, it was found that due to integer calculations,
the rounding off can cause errors in the final value propagated in the
registers.
Considering the
Hello Dmitry,
Thanks for the review.
On 18/06/24 14:29, Dmitry Baryshkov wrote:
On Tue, Jun 18, 2024 at 01:44:17PM GMT, Jayesh Choudhary wrote:
Add the atomic_check hook to ensure that the parameters are within the
valid range.
As of now, dsi clock freqency is being calculated in
0x96. So add check for that.
[0]: <https://www.ti.com/lit/gpn/sn65dsi86>
Signed-off-by: Jayesh Choudhary
---
drivers/gpu/drm/bridge/ti-sn65dsi86.c | 65 +++
1 file changed, 46 insertions(+), 19 deletions(-)
diff --git a/drivers/gpu/drm/bridge/ti-sn65dsi86.c
b/d
during
code inspection.
v1 patch:
<https://lore.kernel.org/all/20240408073623.186489-1-j-choudh...@ti.com/>
[0]: <https://www.ti.com/lit/gpn/sn65dsi86>
Jayesh Choudhary (2):
drm/bridge: ti-sn65dsi86: Add atomic_check hook for the bridge
drm/bridge: ti-sn65dsi86: Fix ti_sn_bri
idge driver")
Signed-off-by: Jayesh Choudhary
---
drivers/gpu/drm/bridge/ti-sn65dsi86.c | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/bridge/ti-sn65dsi86.c
b/drivers/gpu/drm/bridge/ti-sn65dsi86.c
index d13b42d7c512..5bf12af6b657 100644
--- a
Hello Doug,
On 11/04/24 10:12, Doug Anderson wrote:
Hi,
On Wed, Apr 10, 2024 at 4:42 AM Jayesh Choudhary wrote:
Hello Doug,
Thanks for the review.
On 08/04/24 14:33, Doug Anderson wrote:
Hi,
On Mon, Apr 8, 2024 at 12:36 AM Jayesh Choudhary wrote:
Due to integer calculations, the
re clear
- Add the hook for drm_bridge_funcs as well
- Add check in atomic_check dunction call (in a separate patch)
v1 patch:
<https://lore.kernel.org/all/20240408081435.216927-1-j-choudh...@ti.com/>
Jayesh Choudhary (3):
drm/bridge: sii902x: Fix mode_valid hook
drm/bridge: sii902x: Sup
Check the pixel clock for the mode in atomic_check and ensure that
it is within the range supported by the bridge.
Signed-off-by: Jayesh Choudhary
---
drivers/gpu/drm/bridge/sii902x.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/bridge/sii902x.c b/drivers/gpu/drm
t actually checking the
modes.
So move the mode_valid hook to drm_bridge_funcs with proper clock
checks for maximum and minimum pixel clock supported by the bridge.
Signed-off-by: Jayesh Choudhary
Reviewed-by: Dmitry Baryshkov
Acked-by: Sui Jingfeng
---
drivers/gpu/drm/bridge/sii9
Change exisitig enable() and disable() bridge hooks to their atomic
counterparts as the former hooks are deprecated.
Signed-off-by: Jayesh Choudhary
---
drivers/gpu/drm/bridge/sii902x.c | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/bridge
Hello Sui, Sam!
Thanks for the review.
(Sorry for delayed response. I was OoO last week)
On 31/05/24 19:34, Sui Jingfeng wrote:
Hi, Jayesh
On 5/31/24 21:33, Sam Ravnborg wrote:
Hi Jayesh,
+
static const struct drm_bridge_funcs sii902x_bridge_funcs = {
.attach = sii902x_bridge_at
Hello Maxime,
On 30/05/24 15:04, Maxime Ripard wrote:
Hi,
On Thu, May 30, 2024 at 02:59:30PM GMT, Jayesh Choudhary wrote:
Check the pixel clock for the mode in atomic_check and ensure that
it is within the range supported by the bridge.
Signed-off-by: Jayesh Choudhary
---
drivers/gpu/drm
Check the pixel clock for the mode in atomic_check and ensure that
it is within the range supported by the bridge.
Signed-off-by: Jayesh Choudhary
---
drivers/gpu/drm/bridge/sii902x.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/bridge/sii902x.c b/drivers/gpu/drm
(in a separate patch)
v1 patch:
<https://lore.kernel.org/all/20240408081435.216927-1-j-choudh...@ti.com/>
Jayesh Choudhary (2):
drm/bridge: sii902x: Fix mode_valid hook
drm/bridge: Add pixel clock check in atomic_check
drivers/gpu/drm/bridge/sii902x.c | 38
id hook to drm_bridge_funcs with proper clock
checks for maximum and minimum pixel clock supported by the bridge.
Signed-off-by: Jayesh Choudhary
---
drivers/gpu/drm/bridge/sii902x.c | 32 +++-
1 file changed, 23 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/
the modes.
Signed-off-by: Jayesh Choudhary
---
Changelog v1->v2:
- Remove mode_valid hook from connector_helper_funcs as it is not required.
(Function despite being identical has been moved below with other
bridge_funcs instead of keeping it up with drm_connector_helper_funcs)
v1
On 24/05/24 15:13, Dmitry Baryshkov wrote:
On Fri, May 24, 2024 at 12:43:48PM +0530, Jayesh Choudhary wrote:
With the support for the 'DRM_BRIDGE_ATTACH_NO_CONNECTOR' case,
the connector_helper funcs are not initialized if the encoder has this
flag in its bridge_attach call. Till
On 25/05/24 01:16, Dmitry Baryshkov wrote:
On Fri, May 24, 2024 at 05:54:02PM +0530, Jayesh Choudhary wrote:
Hello Dmitry,
On 24/05/24 15:11, Dmitry Baryshkov wrote:
On Fri, May 24, 2024 at 03:05:08PM +0530, Jayesh Choudhary wrote:
Currently, mode_valid hook returns all mode as valid and
Hello Dmitry,
On 24/05/24 15:11, Dmitry Baryshkov wrote:
On Fri, May 24, 2024 at 03:05:08PM +0530, Jayesh Choudhary wrote:
Currently, mode_valid hook returns all mode as valid and it is
defined only in drm_connector_helper_funcs. With the introduction of
'DRM_BRIDGE_ATTACH_NO_CONN
Check the pixel clock for the mode in atomic_check and ensure that
it is within the range supported by the bridge.
Signed-off-by: Jayesh Choudhary
---
drivers/gpu/drm/bridge/sii902x.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/bridge/sii902x.c b/drivers/gpu/drm
id hook in drm_bridge_funcs as well with proper
clock checks for maximum and minimum pixel clock supported by the
bridge.
Signed-off-by: Jayesh Choudhary
---
drivers/gpu/drm/bridge/sii902x.c | 37 ++--
1 file changed, 35 insertions(+), 2 deletions(-)
diff --git a/drive
408081435.216927-1-j-choudh...@ti.com/>
Jayesh Choudhary (2):
drm/bridge: sii902x: Fix mode_valid hook
drm/bridge: Add pixel clock check in atomic_check
drivers/gpu/drm/bridge/sii902x.c | 43 ++--
1 file changed, 41 insertions(+), 2 deletions(-)
--
2.25.1
Hello Sam,
On 24/05/24 13:48, Sam Ravnborg wrote:
Hi Jayesh,
On Fri, May 24, 2024 at 01:03:04PM +0530, Jayesh Choudhary wrote:
Currently, mode_valid hook returns all mode as valid and it is
defined only in drm_connector_helper_funcs. With the introduction of
'DRM_BRIDGE_ATTACH_NO_CONN
id hook in drm_bridge_funcs as well with proper
clock checks for maximum and minimum pixel clock supported by the
bridge.
Signed-off-by: Jayesh Choudhary
---
drivers/gpu/drm/bridge/sii902x.c | 38 ++--
1 file changed, 36 insertions(+), 2 deletions(-)
diff --git a/drive
Check the pixel clock for the mode in atomic_check and ensure that
it is within the range supported by the bridge.
Signed-off-by: Jayesh Choudhary
---
drivers/gpu/drm/bridge/sii902x.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/bridge/sii902x.c b
check in atomic_check dunction call (in a separate patch)
v1 patch:
<https://lore.kernel.org/all/20240408081435.216927-1-j-choudh...@ti.com/>
Jayesh Choudhary (2):
drm/bridge: sii902x: Fix mode_valid hook
drm/bridge: Add pixel clock check in atomic_check
drivers/gpu/drm/bridge/
e modes in this case as well.
Signed-off-by: Jayesh Choudhary
---
.../drm/bridge/cadence/cdns-mhdp8546-core.c | 31 +++
1 file changed, 25 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c
b/drivers/gpu/drm/bridge/cadence/cdns-mhdp8
Hello Maxime,
Thanks for the review.
On 15/04/24 13:10, Maxime Ripard wrote:
Hi,
On Mon, Apr 08, 2024 at 01:44:35PM +0530, Jayesh Choudhary wrote:
Currently, mode_valid hook returns all mode as valid. Add the check
for the maximum and minimum pixel clock that the bridge can support
while
Hello Doug,
Thanks for the review.
On 08/04/24 14:33, Doug Anderson wrote:
Hi,
On Mon, Apr 8, 2024 at 12:36 AM Jayesh Choudhary wrote:
Due to integer calculations, the rounding off can cause errors in the final
value propagated in the registers.
Considering the example of 1080p (very
value is 0x97 (exclusive). So add
check for that.
[0]: <https://www.ti.com/lit/gpn/sn65dsi86>
Fixes: ca1b885cbe9e ("drm/bridge: ti-sn65dsi86: Split the setting of the dp and
dsi rates")
Signed-off-by: Jayesh Choudhary
---
drivers/gpu/drm/bridge/ti-sn65dsi86.c | 48 +
Currently, mode_valid hook returns all mode as valid. Add the check
for the maximum and minimum pixel clock that the bridge can support
while validating a mode.
Signed-off-by: Jayesh Choudhary
---
drivers/gpu/drm/bridge/sii902x.c | 16 +++-
1 file changed, 15 insertions(+), 1
On 11/04/23 11:36, Krzysztof Kozlowski wrote:
On 05/04/2023 16:24, Jayesh Choudhary wrote:
From: Rahul T R
The mhdp bridge can work without its HPD pin hooked up to the connector,
but the current bridge driver throws an error when hpd line is not
connected to the connector. For such cases
On 06/04/23 07:22, Laurent Pinchart wrote:
Hi Jayesh,
Thank you for the patch.
On Wed, Apr 05, 2023 at 07:54:40PM +0530, Jayesh Choudhary wrote:
From: Rahul T R
In J721S2 EVMs DP0 hpd is not connected to correct
hpd pin on SOC, to handle such cases, Add support for
"no-hpd" p
On 06/04/23 07:10, Laurent Pinchart wrote:
Hi Jayesh,
Thank you for the patch.
On Wed, Apr 05, 2023 at 07:54:39PM +0530, Jayesh Choudhary wrote:
From: Rahul T R
The mhdp bridge can work without its HPD pin hooked up to the connector,
but the current bridge driver throws an error when hpd
In J721s2 EVM, DP0 HPD is not connected to correct HPD pin on SOC
which results in HPD detect as always connnected, so when display
is not connected driver continuously retries to read EDID and DPCD
registers.
To handle such cases add support for no hpd configuration in
cdns-mhdp driver.
DT chang
the
auxiliary channels connected to the DP connector to confirm the
connection.
So add no-hpd property to the bindings, to disable hpd when not
connected or unusable.
Signed-off-by: Rahul T R
Signed-off-by: Jayesh Choudhary
---
.../devicetree/bindings/display/bridge/cdns,mhdp8546.yaml | 6
Signed-off-by: Rahul T R
Signed-off-by: Jayesh Choudhary
---
.../drm/bridge/cadence/cdns-mhdp8546-core.c | 37 ---
.../drm/bridge/cadence/cdns-mhdp8546-core.h | 1 +
2 files changed, 33 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546
On 21/03/23 20:47, Krzysztof Kozlowski wrote:
On 21/03/2023 15:28, Jayesh Choudhary wrote:
On 21/03/23 18:08, Krzysztof Kozlowski wrote:
On 21/03/2023 13:02, Jayesh Choudhary wrote:
+type: boolean
+description:
+ Set if the HPD line on the bridge isn't hooked
On 21/03/23 18:08, Krzysztof Kozlowski wrote:
On 21/03/2023 13:02, Jayesh Choudhary wrote:
+type: boolean
+description:
+ Set if the HPD line on the bridge isn't hooked up to anything or is
+ otherwise unusable.
It's the property of the panel, not bridge.
Hello Krzysztof,
On 17/03/23 18:08, Krzysztof Kozlowski wrote:
On 16/03/2023 15:08, Jayesh Choudhary wrote:
From: Rahul T R
Add no-hpd property to the bindings, to disable
hpd when not connected or unusable
Signed-off-by: Rahul T R
Signed-off-by: Jayesh Choudhary
---
.../devicetree
Signed-off-by: Rahul T R
Signed-off-by: Jayesh Choudhary
---
.../drm/bridge/cadence/cdns-mhdp8546-core.c | 37 ---
.../drm/bridge/cadence/cdns-mhdp8546-core.h | 1 +
2 files changed, 33 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546
From: Rahul T R
Add no-hpd property to the bindings, to disable
hpd when not connected or unusable
Signed-off-by: Rahul T R
Signed-off-by: Jayesh Choudhary
---
.../devicetree/bindings/display/bridge/cdns,mhdp8546.yaml | 6 ++
1 file changed, 6 insertions(+)
diff --git
a/Documentation
In J721s2 EVM, DP0 HPD is not connected to correct HPD pin on SOC
which results in HPD detect as always connnected, so when display
is not connected driver continuously retries to read EDID and DPCD
registers.
To handle such cases add support for no hpd configuration in
cdns-mhdp driver.
DT chang
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