Commit 9bf3797796f5 ("drm/sun4i: dw-hdmi: Make HDMI PHY into a platform
device") removed code for PHY deinitialization in fail path.
Add it back.
Fixes: 9bf3797796f5 ("drm/sun4i: dw-hdmi: Make HDMI PHY into a platform device")
Signed-off-by: Jernej Skrabec
---
d
Drivers probing in display pipeline can be deferred for many reasons.
Don't print error for such cases.
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun4i_drv.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/sun4i/sun4i_drv.c
b/drivers/gpu/drm
There is no reason to register two drivers in same place. Using macro
lowers amount of boilerplate code.
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c | 27 +-
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h | 2 --
drivers/gpu/drm/sun4i
Let's make sun8i_hdmi_phy_get() to behave more like other kernel
functions and return phy pointer instead of setting field in struct.
This also makes function more universal.
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c | 5 +++--
drivers/gpu/drm/sun4i
Let's check for phy device first. Since it uses much of the same clocks
and resets it also lowers amount of possible deferred probes.
While at it, don't report error for deferred phy probe.
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c | 35
all drivers are probed.
Fixes: 920169041baa ("drm/sun4i: dw-hdmi: Fix ddc-en GPIO consumer conflict")
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c | 114 +-
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h | 5 ++
2 files changed, 117 insert
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c | 17 +++--
1 file changed, 7 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c
b/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c
index 0b647b030b15..8f8d3bdba5ce 100644
--- a/drivers/gpu
reporting deferred probe
as error. This often confuses users when examining dmesg output, especially
if there is no error code reported.
I also throw 2 refactoring patches for a good measure.
Please take a look.
Best regards,
Jernej
Jernej Skrabec (7):
drm/sun4i: dw-hdmi: Deinit PHY in fail
Add handling of arbitration lost event.
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/bridge/synopsys/dw-hdmi-cec.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi-cec.c
b/drivers/gpu/drm/bridge/synopsys/dw-hdmi-cec.c
index
-by: Jernej Skrabec
---
.../devicetree/bindings/display/bridge/synopsys,dw-hdmi.yaml | 5 +
1 file changed, 5 insertions(+)
diff --git
a/Documentation/devicetree/bindings/display/bridge/synopsys,dw-hdmi.yaml
b/Documentation/devicetree/bindings/display/bridge/synopsys,dw-hdmi.yaml
index
Beelink X2 uses software implementation of CEC even though DW-HDMI has
working hardware implementation.
Disable unused DW-HDMI CEC.
Signed-off-by: Jernej Skrabec
---
arch/arm/boot/dts/sun8i-h3-beelink-x2.dts | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/sun8i-h3-beelink
New DT property allows to skip CEC initialization.
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
index
,
Jernej
Jernej Skrabec (3):
dt-bindings: display: synopsys,dw-hdmi: Add property for disabling CEC
drm/bridge: dw_hdmi: Handle snps,disable-cec property
ARM: dts: sun8i: h3: beelink-x2: Disable DW-HDMI CEC
.../devicetree/bindings/display/bridge/synopsys,dw-hdmi.yaml | 5 +
arch/arm/boot
] el0t_64_sync_handler+0x11c/0x150
[ 184.495723] el0t_64_sync+0x18c/0x190
[ 184.499397] ---[ end trace ]---
Fix that by setting DMA mask and segment size.
Signed-off-by: Jernej Skrabec
---
Changes from v1:
- added comment
- updated commit message with kernel report
drivers
Kernel occasionally complains that there is mismatch in segment size
when trying to render HW decoded videos and rendering them directly with
sun4i DRM driver.
Fix that by setting DMA mask and segment size.
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun4i_drv.c | 4
1 file
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun8i_mixer.h | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.h
b/drivers/gpu/drm/sun4i/sun8i_mixer.h
index 145833a9d82d..5b3fbee18671 100644
--- a/drivers/gpu/drm/sun4i/sun8i_mix
ed helpers with virtual
mapping.
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun4i_drv.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/sun4i/sun4i_drv.c
b/drivers/gpu/drm/sun4i/sun4i_drv.c
index 54dd562e294c..b630614b3d72 100644
--- a/drivers/gpu
Tested on A64, H3, H6 and R40.
Fixes: 9bf3797796f5 ("drm/sun4i: dw-hdmi: Make HDMI PHY into a platform device")
Signed-off-by: Jernej Skrabec
---
Changes from v1:
- if sun8i_hdmi_phy_init() fails, go to error hanling instead of returning
immediately
- rename err_deassert_rst_phy -&g
Tested on A64, H3, H6 and R40.
Fixes: 9bf3797796f5 ("drm/sun4i: dw-hdmi: Make HDMI PHY into a platform device")
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c | 7 +-
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h | 4 +-
drivers/gpu/drm/sun4i/sun
)
Reported-by: Roman Stratiienko
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun8i_csc.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/sun4i/sun8i_csc.h
b/drivers/gpu/drm/sun4i/sun8i_csc.h
index a55a38ad849c..022cafa6c06c 100644
--- a/drivers/gpu/d
is to make
modifier parameter in drm_universal_plane_init() mandatory (non NULL).
Signed-off-by: Piotr Oniszczuk
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun8i_ui_layer.c | 7 ++-
drivers/gpu/drm/sun4i/sun8i_vi_layer.c | 8 +++-
2 files changed, 13 insertions(+), 2 deletions
in HW and fix the comment.
Fixes: cd9063757a22 ("drm/sun4i: DW HDMI: Lower max. supported rate for H6")
Reviewed-by: Chen-Yu Tsai
Tested-by: Andre Heider
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c | 6 ++
1 file changed, 2 insertions(+), 4 deletion
dependant. See i.MX6
documentation for explanation of those values for similar PHY.
Fixes: c71c9b2fee17 ("drm/sun4i: Add support for Synopsys HDMI PHY")
Tested-by: Andre Heider
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c | 26 +-
1 file
("drm/sun4i: Add support for H6 DW HDMI controller")
Reviewed-by: Chen-Yu Tsai
Tested-by: Andre Heider
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c | 4 +---
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h | 1 -
2 files changed, 1 insertion(+), 4 deletions(-)
diff --git
splay Engine support")
Reviewed-by: Chen-Yu Tsai
Tested-by: Andre Heider
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun4i_tcon.c | 25 +
drivers/gpu/drm/sun4i/sun4i_tcon.h | 6 ++
2 files changed, 31 insertions(+)
diff --git a/drivers/gpu/drm/sun4i/su
CLK_SET_RATE_PARENT flag is checked on parent clock instead of current
one. Fix that.
Fixes: 3f790433c3cb ("clk: sunxi-ng: Adjust MP clock parent rate when allowed")
Reviewed-by: Chen-Yu Tsai
Tested-by: Andre Heider
Signed-off-by: Jernej Skrabec
---
drivers/clk/sunxi-ng/ccu_mp.c
on replaced patch 4)
- Added some comments in patch 2
- Replaced patch 4 (see commit log for explanation)
Jernej Skrabec (5):
clk: sunxi-ng: mp: fix parent rate change flag check
drm/sun4i: tcon: set sync polarity for tcon1 channel
drm/sun4i: dw-hdmi: always set clock rate
drm/sun4i: Fix H6 HDMI
in HW and fix the comment.
Fixes: cd9063757a22 ("drm/sun4i: DW HDMI: Lower max. supported rate for H6")
Reviewed-by: Chen-Yu Tsai
Tested-by: Andre Heider
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c | 6 ++
1 file changed, 2 insertions(+), 4 deletion
dependant. See i.MX6
documentation for explanation of those values for similar PHY.
Fixes: c71c9b2fee17 ("drm/sun4i: Add support for Synopsys HDMI PHY")
Tested-by: Andre Heider
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c | 26 +-
1 file
("drm/sun4i: Add support for H6 DW HDMI controller")
Reviewed-by: Chen-Yu Tsai
Tested-by: Andre Heider
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c | 4 +---
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h | 1 -
2 files changed, 1 insertion(+), 4 deletions(-)
diff --git
splay Engine support")
Reviewed-by: Chen-Yu Tsai
Tested-by: Andre Heider
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun4i_tcon.c | 25 +
drivers/gpu/drm/sun4i/sun4i_tcon.h | 6 ++
2 files changed, 31 insertions(+)
diff --git a/drivers/gpu/drm/sun4i/su
CLK_SET_RATE_PARENT flag is checked on parent clock instead of current
one. Fix that.
Fixes: 3f790433c3cb ("clk: sunxi-ng: Adjust MP clock parent rate when allowed")
Reviewed-by: Chen-Yu Tsai
Tested-by: Andre Heider
Signed-off-by: Jernej Skrabec
---
drivers/clk/sunxi-ng/ccu_mp.c
for explanation)
Jernej Skrabec (5):
clk: sunxi-ng: mp: fix parent rate change flag check
drm/sun4i: tcon: set sync polarity for tcon1 channel
drm/sun4i: dw-hdmi: always set clock rate
drm/sun4i: Fix H6 HDMI PHY configuration
drm/sun4i: dw-hdmi: Fix max. frequency for H6
drivers/clk/sunxi-ng
splay Engine support")
Tested-by: Andre Heider
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun4i_tcon.c | 24
drivers/gpu/drm/sun4i/sun4i_tcon.h | 5 +
2 files changed, 29 insertions(+)
diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c
b/drivers/gpu
controller. Patch 4 fixes cpce PHY setting for 594 MHz. Patch 5 fixes
comment and clock rate limit (wrong reasoning).
Please take a look.
Best regards,
Jernej
Jernej Skrabec (5):
clk: sunxi-ng: mp: fix parent rate change flag check
drm/sun4i: tcon: set sync polarity for tcon1 channel
drm
CLK_SET_RATE_PARENT flag is checked on parent clock instead of current
one. Fix that.
Fixes: 3f790433c3cb ("clk: sunxi-ng: Adjust MP clock parent rate when allowed")
Tested-by: Andre Heider
Signed-off-by: Jernej Skrabec
---
drivers/clk/sunxi-ng/ccu_mp.c | 2 +-
1 file changed, 1
cpce value for 594 MHz is set differently in BSP driver. Fix that.
Fixes: c71c9b2fee17 ("drm/sun4i: Add support for Synopsys HDMI PHY")
Tested-by: Andre Heider
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c | 2 +-
1 file changed, 1 insertion(+), 1 deletio
("drm/sun4i: Add support for H6 DW HDMI controller")
Tested-by: Andre Heider
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c | 4 +---
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h | 1 -
2 files changed, 1 insertion(+), 4 deletions(-)
diff --git a/drivers/gpu
in HW and fix the comment.
Fixes: cd9063757a22 ("drm/sun4i: DW HDMI: Lower max. supported rate for H6")
Tested-by: Andre Heider
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu
DE3 supports 10-bit formats, so it's only naturally to also support
BT2020 encoding.
Add support for it.
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun8i_csc.c | 12 +++-
drivers/gpu/drm/sun4i/sun8i_vi_layer.c | 2 ++
2 files changed, 13 insertions(+), 1 deletion
This short series reworks CSC handling to remove duplicated constants
(patch 1 and 2) and adds BT2020 encoding to DE3 (patch 3).
Please take a look.
Best regards,
Jernej
Jernej Skrabec (3):
drm/sun4i: csc: Rework DE3 CSC macros
drm/sun4i: de2/de3: Remove redundant CSC matrices
drm/sun4i
Rework DE3 CSC macros to take just one coordinate instead of two. This
will make its usage easier in subsequent commit.
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun8i_csc.c | 2 +-
drivers/gpu/drm/sun4i/sun8i_mixer.h | 6 ++
2 files changed, 3 insertions(+), 5 deletions
YUV to RGB matrices are almost identical to YVU to RGB matrices. They
only have second and third column reversed. Do that reversion in code in
order to lower amount of static data and redundancy.
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun8i_csc.c | 99
ement zpos for DE2")
Fixes: d8b3f454dab4 ("drm/sun4i: sun8i: Avoid clearing blending order at each
atomic commit")
Signed-off-by: Roman Stratiienko
[rebased, addressed comments]
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun8i_mixer.c| 57 +--
)
Reported-by: Roman Stratiienko
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun8i_vi_layer.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c
b/drivers/gpu/drm/sun4i/sun8i_vi_layer.c
index 22c8c5375d0d..c0147af6a
Allwinner R40 SoC contains Mali400, so add its specific compatible to
bindings.
Signed-off-by: Jernej Skrabec
---
Documentation/devicetree/bindings/gpu/arm,mali-utgard.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-utgard.yaml
b
R40 has Mali400 GP2 GPU. Add a node for it.
Signed-off-by: Jernej Skrabec
---
arch/arm/boot/dts/sun8i-r40.dtsi | 22 ++
1 file changed, 22 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi
index b782041e0e04..b82031b19893 100644
Following two patches enable Mali400 GPU on Allwinner R40 SoC. At this
point I didn't add table for frequency switching because it would
require far more testing and defaults work stable and reasonably well.
Please take a look.
Best regards,
Jernej
Jernej Skrabec (2):
dt-bindings: gpu: mali
caching support in regmap which is also
used here. Such fix is also easier to backport in stable kernels.
Fixes: 9d75b8c0b999 ("drm/sun4i: add support for Allwinner DE2 mixers")
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun8i_mixer.c | 12
1 file changed, 12
m divider in DDC clock register is 4 bits wide. Fix that.
Fixes: 9c5681011a0c ("drm/sun4i: Add HDMI support")
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun4i_hdmi.h | 2 +-
drivers/gpu/drm/sun4i/sun4i_hdmi_ddc_clk.c | 2 +-
2 files changed, 2 insertions(+), 2
CTA-861-F explicitly states that for RGB colorspace colorimetry should
be set to "none". Fix that.
Acked-by: Laurent Pinchart
Fixes: def23aa7e982 ("drm: bridge: dw-hdmi: Switch to V4L bus format and
encodings")
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/bridge/syn
for checking if rgb full to limited range conversion is
needed to is_color_space_conversion()
- reworked logic for csc matrix selection
Jernej Skrabec (3):
drm/bridge: dw-hdmi: fix AVI frame colorimetry
drm/bridge: dw-hdmi: Add support for RGB limited range
drm/bridge: dw-hdmi: rework csc related
quot;
in i915 driver.
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 63 +--
1 file changed, 46 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
index de2c7e
is exactly what
drm_hdmi_avi_infoframe_from_display_mode() already does, so we can just
remove offending line.
Reviewed-by: Neil Armstrong
Acked-by: Laurent Pinchart
Signed-off-by: Jonas Karlman
[updated commit message]
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
).
In order to clear misunderstandings, let's rework
is_color_space_conversion() to do exactly what is supposed to do and add
another function which will determine if CSC block must be enabled or
not.
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 31
st
RGB" in i915 driver.
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 36 +--
1 file changed, 34 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
index 3d6021
is exactly what
drm_hdmi_avi_infoframe_from_display_mode() already does, so we can just
remove offending line.
Signed-off-by: Jonas Karlman
[updated commit message]
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drive
: b21f4b658df8 ("drm: imx: imx-hdmi: move imx-hdmi to bridge/dw_hdmi")
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
b/drivers/gpu/drm/bridge/s
CTA-861-F explicitly states that for RGB colorspace colorimetry should
be set to "none". Fix that.
Fixes: def23aa7e982 ("drm: bridge: dw-hdmi: Switch to V4L bus format and
encodings")
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 46 ++
which is in line with most other hdmi
drivers.
Patch 4 aligns RGB quantization to CEA 861 standard.
Please take a look.
Best regards,
Jernej
Jernej Skrabec (3):
drm/bridge: dw-hdmi: fix AVI frame colorimetry
drm/bridge: dw-hdmi: Fix color space conversion detection
drm/bridge: dw-hdmi: Add
Now that de2_fmt_info contains only DRM <-> HW format mapping, it
doesn't make sense to return pointer to structure when searching by DRM
format. Rework that to return only HW format instead.
This doesn't make any functional change.
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm
sun8i_mixer.h include is misplaced. Move it.
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun8i_ui_layer.c | 2 +-
drivers/gpu/drm/sun4i/sun8i_vi_layer.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/sun4i/sun8i_ui_layer.c
b/drivers/gpu/drm
For RGB formats CSC mode is always set to none and for YUV formats
almost always set to YUV to RGB.
Add a helper function to deduce CSC mode from format.
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun8i_mixer.c| 48 --
drivers/gpu/drm/sun4i
YUV444 and YVU444 are planar formats, but HW format RGB888 is packed.
This means that those two mappings were never correct. Remove them.
Fixes: 60a3dcf96aa8 ("drm/sun4i: Add DE2 definitions for YUV formats")
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun8i_mixer
that if only
patch 1 and 3 go into stable, wrong formats will be reported for DE3 VI
layers.
Please take a look.
Best regards,
Jernej
Jernej Skrabec (7):
drm/sun4i: de2/de3: Remove unsupported VI layer formats
drm/sun4i: Add separate DE3 VI layer formats
drm/sun4i: Fix DE2 VI layer format
DE2 VI layer doesn't support blending which means alpha channel is
ignored. Replace all formats with alpha with "don't care" (X) channel.
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun8i_mixer.c| 56 ++
drivers/gpu/drm/sun4i/sun8i_vi_la
drm_format_info structure already contains information if format is RGB
or YUV. Use that instead.
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun8i_mixer.c| 48 --
drivers/gpu/drm/sun4i/sun8i_mixer.h| 1 -
drivers/gpu/drm/sun4i/sun8i_ui_layer.c | 6
DE3 VI layers support alpha blending, but DE2 VI layers do not.
Additionally, DE3 VI layers support 10-bit RGB and YUV formats.
Make a separate list for DE3.
Fixes: c50519e6db4d ("drm/sun4i: Add basic support for DE3")
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun
support any modifiers beside linear. Modifiers
aware applications can be confused by provided empty modifier list - at
least linear modifier should be included, but it's not for DE2 and DE3.
Fixes: 9db9c0cf5895 ("drm/sun4i: drv: Allow framebuffer modifiers in mode
config")
Signed-off-
-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun8i_csc.c | 144 -
drivers/gpu/drm/sun4i/sun8i_csc.h | 6 +-
drivers/gpu/drm/sun4i/sun8i_vi_layer.c | 4 +-
3 files changed, 126 insertions(+), 28 deletions(-)
diff --git a/drivers/gpu/drm/sun4i/sun8i_csc.c
b
It turns out addition of 0x200 to constant parts (+0.5) is not really
necessary. Besides, we can consider that before and fix value in CSC
matrix.
This simplifies register writes quiet a bit.
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun8i_csc.c | 11 +++
1 file changed
HDMI bridge driver has to be extended to have a property to select
limited (TVs) or full (PC monitors) range. But that will be done at a
later time.
Please take a look.
Best regards,
Jernej
Jernej Skrabec (3):
drm/sun4i: Introduce color encoding and range properties
drm/sun4i: sun8i_csc
In order to correctly convert YUV color space to RGB, we have to know
color encoding and range.
Introduce these two properties using helper method.
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun8i_vi_layer.c | 17 +
1 file changed, 17 insertions(+)
diff --git
Vendor provided documentation says that EMP bits should be set to 3 for
pixel clocks greater than 148.5 MHz.
Fix that.
Cc: sta...@vger.kernel.org # 4.17+
Fixes: 4f86e81748fe ("drm/sun4i: Add support for H3 HDMI PHY variant")
Signed-off-by: Jernej Skrabec
---
drivers/gpu
of HDMI PHY clock driver after reset
line is deasserted and clocks enabled.
Cc: sta...@vger.kernel.org # 4.17+
Fixes: 4f86e81748fe ("drm/sun4i: Add support for H3 HDMI PHY variant")
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c | 26 ++--
.
In the process of researching the bug, I also found out that few bits
in HDMI PHY registers were not set correctly. While there is no
noticeable change (4K resolution works with both settings), I've
added fix anyway, to be conformant with vendor documentation.
Please check it out.
Best regards,
Jernej
Jernej
work (H6) or the status is
unknown (A83T).
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/Kconfig | 10
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h | 11
drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c | 83 +-
3 files changed, 102 insertions(+), 2 deletions
what do you think.
Best regards,
Jernej
Changes from v1:
- renamed is_cec_unusable to disable_cec
- added review-by tag
Jernej Skrabec (2):
drm/bridge/synopsys: dw-hdmi: Add an option to suppress loading CEC
driver
drm/sun4i: dw-hdmi: Bit bang CEC on some SoCs
drivers/gpu/drm/bridge
to suppress loading CEC driver. If
DW HDMI CEC driver would be loaded, it wouldn't work anyway and would only
cause a confusion with multiple /dev entries.
Reviewed-by: Neil Armstrong
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 2 +-
include/drm/bridge/dw_hdmi.h
work (H6) or the status is
unknown (A83T).
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/Kconfig | 10
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h | 11
drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c | 83 +-
3 files changed, 102 insertions(+), 2 deletions
what do you think.
Best regards,
Jernej
Jernej Skrabec (2):
drm/bridge/synopsys: dw-hdmi: Add an option to suppress loading CEC
driver
drm/sun4i: dw-hdmi: Bit bang CEC on some SoCs
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 2 +-
drivers/gpu/drm/sun4i/Kconfig | 10 +++
drivers
HDMI controller")
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c
b/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c
index caea5a9f8f1d..ba4ce576b471 100644
--- a/d
to suppress loading CEC driver. If
DW HDMI CEC driver would be loaded, it wouldn't work anyway and only
cause a confusion with multiple /dev entries.
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 2 +-
include/drm/bridge/dw_hdmi.h | 2 ++
2 files changed
a look.
Best regards,
Jernej
Jernej Skrabec (3):
clk: sunxi-ng: Allow DE clock to set parent rate
drm/sun4i: Add VI scaler line size quirk for DE2/DE3
drm/sun4i: Improve VI scaling for DE2/DE3
drivers/clk/sunxi-ng/ccu-sun50i-a64.c | 3 +-
drivers/clk/sunxi-ng/ccu-sun50i-h6.c | 2
scaling is currently used to fit one line to VI scaler
buffer.
Vertical coarse scaling is used to assure that VI scaler is actually
capable of processing framebuffer in one frame time.
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun8i_vi_layer.c | 54 --
drivers
While all RGB scalers have maximum line size of 2048, some YUV scalers
have maximum line size of 2048 and some have line size of 4096.
Since there is no rule for that, add a quirk.
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun8i_mixer.c | 9 +
drivers/gpu/drm/sun4i
DE2/DE3 mixers have to run at specific frequency in order to work
optimally. This wasn't actually possible for some SoCs because "de"
clock wasn't allowed to adjust parent rate.
Add CLK_SET_RATE_PARENT flag to all "de" clocks which didn't have it
yet.
Signed-off-by: Jernej S
Some sub-engines are unused. Disable them explicitly.
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun8i_mixer.c | 8
drivers/gpu/drm/sun4i/sun8i_mixer.h | 4 ++--
2 files changed, 10 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c
b/drivers
H6 has DW HDMI 2.0b controller v2.12a.
It supports 4K at 60 Hz and HDCP 2.2.
Reviewed-by: Chen-Yu Tsai
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c | 19 +++
1 file changed, 19 insertions(+)
diff --git a/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c
b
Since it is not possible to access sun8i-dw-hdmi driver private data
inside mode_valid function, make it configurable. That way different
versions of HDMI controllers can set different function, depending on
it's limitations.
Reviewed-by: Chen-Yu Tsai
Signed-off-by: Jernej Skrabec
---
drivers
Currently, quirks and compatibles are sorted alphabetically. However,
they should be sorted by family release date and then alphabetically.
Fix that by moving A64 quirks and compatible to bottom. No functional
change is made.
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i
This commit adds all entries needed for HDMI to function properly.
Signed-off-by: Jernej Skrabec
[added DE3 bus]
Signed-off-by: Icenowy Zheng
---
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 201 +++
1 file changed, 201 insertions(+)
diff --git a/arch/arm64/boot/dts
From: Icenowy Zheng
The TCON TOP on Allwinner H6 SoC is a cut down version of the R40 TCON
TOP, which dropped TCON_TV1 and DSI (which do not exist on H6).
Add support for it.
Signed-off-by: Icenowy Zheng
---
drivers/gpu/drm/sun4i/sun8i_tcon_top.c | 8
1 file changed, 8 insertions(+)
It turns out that H6 HDMI BSP kernel driver doesn't change TMDS rate at
all. At this point it is not clear whether it is just not necessary or
it would cause some kind of issues.
Add a quirk for it.
Acked-by: Maxime Ripard
Reviewed-by: Chen-Yu Tsai
Signed-off-by: Jernej Skrabec
---
drivers
H6 is first Allwinner SoC which supports 10 bit colors, HDR and AFBC.
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun4i_drv.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/sun4i/sun4i_drv.c
b/drivers/gpu/drm/sun4i/sun4i_drv.c
index 1e41c3f5fd6d..1ca7b70cbbfa
Support for mixer0, mixer1, writeback and rotation units is added.
Signed-off-by: Jernej Skrabec
Signed-off-by: Icenowy Zheng
---
drivers/clk/sunxi-ng/ccu-sun8i-de2.c | 71 ++--
drivers/clk/sunxi-ng/ccu-sun8i-de2.h | 4 +-
2 files changed, 71 insertions(+), 4 deletions
, will be added later.
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun8i_csc.c | 83 +
drivers/gpu/drm/sun4i/sun8i_mixer.c | 38 +++
drivers/gpu/drm/sun4i/sun8i_mixer.h | 34 +-
drivers/gpu/drm/sun4i/sun8i_ui_scaler.c | 10 ++-
drivers/gpu/drm
for Allwinner H6 DW HDMI
drm: sun4i: add quirks for TCON TOP
dt-bindings: display: sun4i-drm: document H6 TCON TOP
drm: sun4i: add support for H6 TCON TOP
Jernej Skrabec (23):
clk: sunxi-ng: Adjust MP clock parent rate when allowed
clk: sunxi-ng: Use u64 for calculation of NM rate
clk: sun
name]
Signed-off-by: Jernej Skrabec
---
Documentation/devicetree/bindings/bus/sun50i-de2-bus.txt | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/bus/sun50i-de2-bus.txt
b/Documentation/devicetree/bindings/bus/sun50i-de2-bus.txt
index
and call it from init function.
Reviewed-by: Chen-Yu Tsai
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c | 23 +++
1 file changed, 15 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
b/drivers/gpu/drm/sun4i
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