On 04/24/2013 08:48 PM, Tony Breeds wrote:
> On Wed, Apr 24, 2013 at 07:54:49PM -0300, lucaskt at linux.vnet.ibm.com wrote:
>> From: Lucas Kannebley Tavares
>>
>> On pseries machines the detection for max_bus_speed should be done
>> through an OpenFirmware property.
);
if (pcie_link_speed_stats)
break;
}
is this your suggestion, or was it another approach that will have the
same result?
Thanks,
--
Lucas Kannebley Tavares
Software Engineer
IBM Linux Technology Center
___
dri-devel
On 04/15/2013 08:42 AM, Michael Ellerman wrote:
> On Thu, Apr 11, 2013 at 10:13:13AM -0300, Lucas Kannebley Tavares wrote:
>> On pseries machines the detection for max_bus_speed should be done
>> through an OpenFirmware property. This patch adds a function to perform this
>>
On 04/15/2013 02:00 AM, Michael Ellerman wrote:
> On Thu, Apr 11, 2013 at 10:13:13AM -0300, Lucas Kannebley Tavares wrote:
>> On pseries machines the detection for max_bus_speed should be done
>> through an OpenFirmware property. This patch adds a function to perform this
>>
On 04/12/2013 01:38 PM, Bjorn Helgaas wrote:
> On Thu, Apr 11, 2013 at 7:13 AM, Lucas Kannebley Tavares
> wrote:
>> radeon currently uses a drm function to get the speed capabilities for
>> the bus. However, this is a non-standard method of performing this
>> detectio
On 04/12/2013 01:38 PM, Bjorn Helgaas wrote:
On Thu, Apr 11, 2013 at 7:13 AM, Lucas Kannebley Tavares
luca...@linux.vnet.ibm.com wrote:
radeon currently uses a drm function to get the speed capabilities for
the bus. However, this is a non-standard method of performing this
detection
On 04/15/2013 02:00 AM, Michael Ellerman wrote:
On Thu, Apr 11, 2013 at 10:13:13AM -0300, Lucas Kannebley Tavares wrote:
On pseries machines the detection for max_bus_speed should be done
through an OpenFirmware property. This patch adds a function to perform this
detection and a hook
On 04/15/2013 08:42 AM, Michael Ellerman wrote:
On Thu, Apr 11, 2013 at 10:13:13AM -0300, Lucas Kannebley Tavares wrote:
On pseries machines the detection for max_bus_speed should be done
through an OpenFirmware property. This patch adds a function to perform this
detection and a hook
radeon currently uses a drm function to get the speed capabilities for
the bus. However, this is a non-standard method of performing this
detection and this patch changes it to use the max_bus_speed attribute.
---
drivers/gpu/drm/radeon/evergreen.c |9 ++---
drivers/gpu/drm/radeon/r600.c
On pseries machines the detection for max_bus_speed should be done
through an OpenFirmware property. This patch adds a function to perform this
detection and a hook to perform dynamic adding of the function only for
pseries.
Signed-off-by: Lucas Kannebley Tavares
---
arch/powerpc/include/asm
ume that on x86 machines, the
max_bus_speed property will be properly set already.
Lucas Kannebley Tavares (2):
ppc64: perform proper max_bus_speed detection
radeon: use max_bus_speed to activate gen2 speeds
arch/powerpc/include/asm/machdep.h |2 +
arch/powerpc/kernel/pci-commo
that on x86 machines, the
max_bus_speed property will be properly set already.
Lucas Kannebley Tavares (2):
ppc64: perform proper max_bus_speed detection
radeon: use max_bus_speed to activate gen2 speeds
arch/powerpc/include/asm/machdep.h |2 +
arch/powerpc/kernel/pci-common.c |8
radeon currently uses a drm function to get the speed capabilities for
the bus. However, this is a non-standard method of performing this
detection and this patch changes it to use the max_bus_speed attribute.
---
drivers/gpu/drm/radeon/evergreen.c |9 ++---
drivers/gpu/drm/radeon/r600.c
Implementation of a architecture-specific pcibios_get_speed_cap_mask.
This implementation detects bus capabilities based on OF
ibm,pcie-link-speed-stats property.
Signed-off-by: Lucas Kannebley Tavares
---
arch/powerpc/platforms/pseries/pci.c | 35 ++
1 files
subsystem to the pci one.
Signed-off-by: Lucas Kannebley Tavares
---
drivers/gpu/drm/drm_pci.c | 38
drivers/gpu/drm/radeon/evergreen.c |5 ++-
drivers/gpu/drm/radeon/r600.c |5 ++-
drivers/gpu/drm/radeon/rv770.c |5 ++-
include/drm
subsystem to the pci one.
Signed-off-by: Lucas Kannebley Tavares
---
drivers/pci/pci.c | 44
include/linux/pci.h |6 ++
2 files changed, 50 insertions(+), 0 deletions(-)
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index b099e00
for ppc64.
The refactor is done because the function that was used by drm is more
architecture goo than module-specific. Whilst the function also needed a
platform-specific implementation to get PCIE Gen2 speeds on ppc64.
Lucas Kannebley Tavares (3):
pci: added pcie_get_speed_cap_mask function
subsystem to the pci one.
Signed-off-by: Lucas Kannebley Tavares luca...@linux.vnet.ibm.com
---
drivers/gpu/drm/drm_pci.c | 38
drivers/gpu/drm/radeon/evergreen.c |5 ++-
drivers/gpu/drm/radeon/r600.c |5 ++-
drivers/gpu/drm/radeon/rv770.c
for ppc64.
The refactor is done because the function that was used by drm is more
architecture goo than module-specific. Whilst the function also needed a
platform-specific implementation to get PCIE Gen2 speeds on ppc64.
Lucas Kannebley Tavares (3):
pci: added pcie_get_speed_cap_mask function
Implementation of a architecture-specific pcibios_get_speed_cap_mask.
This implementation detects bus capabilities based on OF
ibm,pcie-link-speed-stats property.
Signed-off-by: Lucas Kannebley Tavares luca...@linux.vnet.ibm.com
---
arch/powerpc/platforms/pseries/pci.c | 35
subsystem to the pci one.
Signed-off-by: Lucas Kannebley Tavares luca...@linux.vnet.ibm.com
---
drivers/pci/pci.c | 44
include/linux/pci.h |6 ++
2 files changed, 50 insertions(+), 0 deletions(-)
diff --git a/drivers/pci/pci.c b/drivers
Replacing these calls avoids compatibility problems with PCIe v1/v2
Capability structures.
Signed-off-by: Lucas Kannebley Tavares
---
drivers/gpu/drm/drm_pci.c |8 ++--
1 files changed, 2 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/drm_pci.c b/drivers/gpu/drm/drm_pci.c
During the process of obtaining the speed cap for the device, it
attempts go get the PCI Host bus. However on architectures such as PPC
or IA64, those do not appear as devices.
Signed-off-by: Lucas Kannebley Tavares
---
drivers/gpu/drm/drm_pci.c |5 +
1 files changed, 5 insertions
On 12/13/2012 09:31 PM, Bjorn Helgaas wrote:
> [+cc Betty]
>
> On Thu, Dec 13, 2012 at 4:04 PM, Lucas Kannebley Tavares
> wrote:
>> On architectures such as ppc64, there is no root bus device (it belongs
>> to the hypervisor). DRM attempted to get one, causing a nul
On 12/13/2012 09:31 PM, Bjorn Helgaas wrote:
[+cc Betty]
On Thu, Dec 13, 2012 at 4:04 PM, Lucas Kannebley Tavares
luca...@linux.vnet.ibm.com wrote:
On architectures such as ppc64, there is no root bus device (it belongs
to the hypervisor). DRM attempted to get one, causing a null-pointer
During the process of obtaining the speed cap for the device, it
attempts go get the PCI Host bus. However on architectures such as PPC
or IA64, those do not appear as devices.
Signed-off-by: Lucas Kannebley Tavares luca...@linux.vnet.ibm.com
---
drivers/gpu/drm/drm_pci.c |5 +
1 files
Replacing these calls avoids compatibility problems with PCIe v1/v2
Capability structures.
Signed-off-by: Lucas Kannebley Tavares luca...@linux.vnet.ibm.com
---
drivers/gpu/drm/drm_pci.c |8 ++--
1 files changed, 2 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/drm_pci.c b
On architectures such as ppc64, there is no root bus device (it belongs
to the hypervisor). DRM attempted to get one, causing a null-pointer
dereference.
Signed-off-by: Lucas Kannebley Tavares
--
diff --git a/arch/powerpc/platforms/pseries/Makefile
b/arch/powerpc/platforms/pseries/Makefile
On architectures such as ppc64, there is no root bus device (it belongs
to the hypervisor). DRM attempted to get one, causing a null-pointer
dereference.
Signed-off-by: Lucas Kannebley Tavares luca...@linux.vnet.ibm.com
--
diff --git a/arch/powerpc/platforms/pseries/Makefile
b/arch/powerpc
);
pos = pci_pcie_cap(root);
if (!pos)
--
Lucas Kannebley Tavares
Software Engineer
IBM Linux Technology Center
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dri-devel@lists.freedesktop.org
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;pdev->bus->self;
+ root = drm_get_pcie_root_dev(dev->pdev);
pos = pci_pcie_cap(root);
if (!pos)
--
Lucas Kannebley Tavares
Software Engineer
IBM Linux Technology Center
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